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1. 发明专利

JPS60226172A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60226172A
公开(公告)日：1985-11-11
申请号：JP8174984
申请日：1984-04-25
申请人： HITACHI LTD
发明人： ANDOU HARUHISA , OOBA SHINYA , NAKAI MASAAKI , OZAKI TOSHIBUMI , TAKEMOTO KAYAO , OZAWA NAOKI
IPC分类号： H01L27/146 , H01L27/14 , H04N5/335 , H04N5/341 , H04N5/372 , H04N5/374
摘要： PURPOSE:To realize a high-sensitivity image pickup element with less random noise by a method wherein a level shift circuit adds to an inversion amplifier inserted between a transfer transistor and a vertical signal line capacitating a depletion mode transistor with low 1/f noise to work as a driving transistor. CONSTITUTION:A level shift circuit A composed of transistors 44, 45 is located between a transfer transistor 41 and the output terminal of an inversion amplifoer constituted of transistors 42, 43. This causes the threshold voltage of the transistor 41 to be apparently higher by the level shift voltage VGS. The increase sufficiently makes up for the threshold voltage that may be low of the driving transistor 43. The leve shift voltage may be freely regulated with the transistor 45 controlling the current in the transistor 44. Of the noise present in the level shift circuit A itself, especially when a depletion mode transistor is used, the level of the 1/f component changes subject to the current level. Operation is possible in the region of low 1/f noise when the quantity of level shift is regulated for the proper operation of the inversion amplifier.

2. 发明专利

JPS60220968A SOLID-STATE IMAGE PICKUP DEVICE 失效
公开(公告)号：JPS60220968A
公开(公告)日：1985-11-05
申请号：JP4264185
申请日：1985-03-06
申请人： HITACHI LTD
发明人： ANDOU HARUHISA , TAKEMOTO KAYAO , OOBA SHINYA , AOKI MASAKAZU , NAKAI MASAAKI , OZAKI TOSHIBUMI , NAGATA MUTSUO
IPC分类号： H01L27/146 , H04N5/335 , H04N5/359 , H04N5/369 , H04N5/374
摘要： PURPOSE:To reduce noises generated in an element, and to improve the sensitivity of the whole device by providing a phototransistor having amplifying functions at every picture element and a switching means. CONSTITUTION:An n type Si substrate 31, a p type impurity diffusion layer 32 and an n type impurity diffusion layer 33 constitute a phototransistor (a photo- Tr), and each function as a collector, a base and an emitter. The n type impurity diffusion layer 33 is brought into ohmic-contact with an n type impurity diffusion layer 35 formed in a p type impurity diffusion layer 34. n type impurity diffusion layers 35, 37 and poly Si 38 each represent a drain, a source and a gate in an MOSTr. When beams are projected to the base 32, the potential of the base 32, the source 33, is changed in the forward direction. That is, a reverse bias is applied between the source 35 and the well 34. Consequently, electrons are not injected from the source 35 even when intense beams are projected, and no blooming is generated. Electrons generated in the substrate 31 cannot intrude into the well 34, and no blooming is generated.

3. 发明专利

JPS59103381A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59103381A
公开(公告)日：1984-06-14
申请号：JP21084983
申请日：1983-11-11
申请人： Hitachi Ltd
发明人： ANDOU HARUHISA , OOBA SHINYA , KURE TOKUO , TAKEMOTO KAYAO , AOKI MASAKAZU , NAKAI MASAAKI , IZAWA RIYUUICHI , KUBO SEIJI
IPC分类号： H01L29/78
CPC分类号： H01L29/78
摘要： PURPOSE:To contrive improvement in characteristics of the titled semiconductor device by a method wherein an insulating film is provided between at least one of the source and drain located on an IGFET and a substrate. CONSTITUTION:Insulating films 201 and 202 such as SiO2 and the like are interposed between a P type Si substrate and an N type source and drain layer. According to this constitution, the capacitance between the source-drain and the substrate is lowered, and the leak current generating between them is also reduced. Besides, the punch-through withstand voltage of the device is increased, the parasitic bipolar transistor effect which is a short-channel effect can also be suppressed, and no deterioration is generated on the other characteristics.
摘要翻译：目的：通过在位于IGFET和基板上的源极和漏极中的至少一个之间提供绝缘膜的方法来改进标题半导体器件的特性的改进。构成：在P型Si衬底和N型源漏层之间插入诸如SiO 2等的绝缘膜201和202。根据该结构，源极 - 漏极和衬底之间的电容降低，并且它们之间产生的漏电流也降低。此外，器件的穿通耐受电压增加，也可以抑制作为短沟道效应的寄生双极晶体管效应，并且不会在其他特性上产生劣化。

4. 发明专利

JPS58125959A SOLID-STATE IMAGE PICKUP DEVICE 失效
公开(公告)号：JPS58125959A
公开(公告)日：1983-07-27
申请号：JP760982
申请日：1982-01-22
申请人： HITACHI LTD
发明人： AKIYAMA TOSHIYUKI , ANDOU HARUHISA , IMAIDE TAKUYA , NAGAHARA SHIYUUSAKU , TAKAHASHI KENJI , OOBA SHINYA , OZAKI TOSHIBUMI , NAKAI MASAAKI , TAKEMOTO KAYAO , AOKI MASAKAZU
IPC分类号： H01L27/146 , H04N5/335 , H04N5/341 , H04N5/365 , H04N5/372
摘要： PURPOSE:To reduce the fixed pattern noise, by varying ON level of a transfer gate while the video information is read out of a vertical signal line. CONSTITUTION:First the gate voltage of a transfer gate MOS transistor TRTX2 is turned off, and at the same time a sufficiently large level of electric charge is stored to a vertical signal line through an MOSTRBLG. When the MOSTRBLG is turned off again, the electric charge is taken outside from the vertical signal line. At the same time, a pseudo signal is also extracted. While some variance remains with the electric charge of each vertical signal line. On the other hand, the gate voltage of the TRTX2 is turned on again by an amount equivalent to VG/n after a prescribed period. Thus the electric charge is taken outside of the vertical signal line to be used as the bias voltage. Then the variance of the electric charge can be reduced. Thereafter, the same operation is repeated (n) times to reduce more the variance of the electric charge.

5. 发明专利

JPS58117779A DRIVING METHOD OF SOLID-STATE IMAGE PICKUP DEVICE 失效
公开(公告)号：JPS58117779A
公开(公告)日：1983-07-13
申请号：JP33682
申请日：1982-01-06
申请人： HITACHI LTD
发明人： AOKI MASAKAZU , OOBA SHINYA , TAKEMOTO KAYAO , NAKAI MASAAKI , ANDOU HARUHISA , OZAKI TOSHIBUMI , IMAIDE TAKUYA , NAGAHARA SHIYUUSAKU , TAKAHASHI KENJI , AKIYAMA TOSHIYUKI
IPC分类号： H04N5/335 , H04N5/341 , H04N5/359 , H04N5/365 , H04N5/369 , H04N5/372 , H04N5/374
摘要： PURPOSE:To obtain video signals with excellent picture quality at a high transfer efficiency, by providing bias charges of >=2 sets for a CTD in response to one vertical signal output line and using one for the sweep-out of a virtual signal and the other for the readout of the signal charges. CONSTITUTION:A bias charge 44 out of bias charges 43, 44 and 43' stored in advance under storage electrodes 41, 45 and 47 of the CTD is first applied to a vertical signal output line 26 to sweep out a virtual signal such as smear leaked on the line 26 to the CTD. Thus, the electric charges comprising the bias charges and the virtual signal are swept out in a drain 31. The bias charge 43 under the adjacent electrode 41 is transferred under the electrode 45 and this charge is used for the readout of the signal charges by taking the charge as the bias charge. Thus, the charges are transferred very efficiently and smoothly, and the generation of fixed pattern noise due to the dispersion in threshold voltage and transfer rate of horizontal switches 28 and 29.

6. 发明专利

JPS57181155A SOLID IMAGE PICK-UP DEVICE 失效
公开(公告)号：JPS57181155A
公开(公告)日：1982-11-08
申请号：JP6244882
申请日：1982-04-16
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： ANDOU HARUHISA , OOBA SHINYA , NAKAI MASAAKI , HANAMURA SHIYOUJI , TAKEMOTO KAYAO , KOIKE NORIO , KUBO SEIJI , TANAKA SHIYUUHEI , IZAWA RIYUUICHI , AOKI MASAKAZU
IPC分类号： H01L27/146 , H04N5/335 , H04N5/359 , H04N5/369 , H04N5/372 , H04N5/374
摘要： PURPOSE:To prevent blooming phenomenon by a method wherein the unit connecting the source of a first MOSTr and that of a second MOSTr to one-sided terminals in photodiodes is used as the basic unit of photoelectric conversion elements and excessive charges are sucked out by the second MOSTr. CONSTITUTION:Photo signal charges stored in photodiodes 1 formed on a first conductivity type Si substrate are transferred to vertical output lines 5 through MOS transistors 4 linked to a gate line 3 connected to a scanning circuit 2. Charges moved to the output lines 5 are supplied to a horizontal output line 8 through MOS transistors 7 controlled by a scanning circuit 6 and are read from a terminal OUT. Excessive charges generated from the photodiodes 1 are sucked out by applying voltage to the drain lines 10 of MOS transistors 9 having the same gate lines as those of the MOS transistors. Therefore, the excessive charges will not be overflowed to the output lines 5 and blooming phenomenon can be controlled.

7. 发明专利

JPS56129378A SOLID IMAGE-PICKUP ELEMENT 失效
公开(公告)号：JPS56129378A
公开(公告)日：1981-10-09
申请号：JP3155880
申请日：1980-03-14
申请人： HITACHI LTD
发明人： IWATA YOSHIO , HORIUCHI TSUNEHISA , KOISHIKAWA SUSUMU , FUJITA TSUTOMU , AOKI MASAKAZU , TAKEMOTO KAYAO , NAGAHARA SHIYUUSAKU , SASANO AKIRA , OOBA SHINYA , ANDOU HARUHISA
IPC分类号： H01L27/14 , H01L31/0203 , H04N5/335 , H04N5/357
摘要： PURPOSE:To obtain the small-size solid image-pickup element capable of picking up a clear image by arranging a light receiving face side of a light receipt element adjacently to an inner surface of glass levelled in high precision, and increasing positional precisions of the light receipt element and a front glass surface. CONSTITUTION:A conductive lead 9 is attach-formed by a thick film printing method at prescribed positions on the inner side of the glass 8 having the high precise flat plane, the front side of the light receipt part 5a of the light receipt element 5 being oppositely arranged in contact with the central position on the inner side of the glass 8, and one end of the lead 9 and a bonding pad 5b being fixed with solder 10 to be arranged. The other end of the lead 9 is connected to an end of a lead 4 for connecting the outside. The plateau precision of the plane of the glass 8 is adjusted in advance attached to the glass 8 in high positional precision to enable the clear image to be picked up through the small size solid image-pickup element.

8. 发明专利

JPS55161471A SOLID IMAGE PICKUP DEVICE 失效
公开(公告)号：JPS55161471A
公开(公告)日：1980-12-16
申请号：JP6897079
申请日：1979-06-04
申请人： HITACHI LTD
发明人： KOIKE NORIO , TSUKADA TOSHIHISA , ANDOU HARUHISA , YAMAMOTO HIDEAKI , HIRAI TADAAKI , KUBO SEIJI , MARUYAMA EIICHI , UMAJI TOORU , TAKASAKI YUKIO , NAGAHARA SHIYUUSAKU
IPC分类号： H01L27/146 , H04N5/335 , H04N5/341 , H04N5/369 , H04N5/372 , H04N5/374
摘要： PURPOSE:To improve the photoelectric conversion efficiency of a solid image pickup device, by forming a photoconductive film on the scanning IC substrate which is constituted by a scanning circuit and an N or P-channel MOSFET where switch groups are integrated. CONSTITUTION:Through excitation electric charge is generated in photoconductive film 25 when a light is incident onto this film, the main material of conduction electric change is a positive hole of a high mobility, and the positive hole runs toward electrode 24 due to electric field 31 formed between the lower face of transparent electrode 26 and electrode 24 and is stored on electrode 24. The positive hole stored in one frame period is read as a signal through switch 15 and a horizontal switch and becomes a video signal when selected next.

9. 发明专利

JPS5333524A SOLID STATE PICKUP DEVICE 失效
公开(公告)号：JPS5333524A
公开(公告)日：1978-03-29
申请号：JP10779576
申请日：1976-09-10
申请人： HITACHI LTD
发明人： ANDOU HARUHISA , KOIKE AKIO
IPC分类号： H01L27/146 , H01L31/00 , H04N5/30 , H04N5/335 , H04N5/369 , H04N5/374
摘要： PURPOSE:To increase the breakdown voltage at the drain junction part where a high voltage is applied for a solid state pickup device by decreasing the impurity concentration.

10. 发明专利

JPS60171765A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60171765A
公开(公告)日：1985-09-05
申请号：JP2704184
申请日：1984-02-17
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , OOBA SHINYA , ANDOU HARUHISA , NAKAI MASAAKI , TAKEMOTO KAYAO , OZAWA NAOKI
IPC分类号： H01L27/146 , H03K17/687 , H04N5/335 , H04N5/341 , H04N5/365 , H04N5/372 , H04N5/374 , H04N5/378
摘要： PURPOSE:To enable to enhance the S/N ratio of a semiconductor device by a method wherein the gate capacity of each driver MOS transistor of the inverter constituting the inversion circuit is set at more than specific times as much as an accumulating capacity for charge to be transferred and random noises to generate at the transferring time of charge are made to reduce by such the increasing of the gate capacity of each driver MOS transistor. CONSTITUTION:The gate capacity of each driver MOS transistor is set at more than 0.3 times as much as the capacity of each vertical signal conductor. For example, the channel width Ld of each driver MOS transistor 10 of the inverter constituting the inversion circuit is made longer than the channel length Wd of each load MOS transistor 10 of the inverter to raise the gain, and moreover, the gate capacity of each of the driver MOS transistors 20 is made equal to the capacity of each of the vertical signal conductors, thereby enabling to reduce the random noises.

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