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1. 发明专利

JP2006154855A Liquid crystal display device 审中-公开
标题翻译：液晶显示装置
公开(公告)号：JP2006154855A
公开(公告)日：2006-06-15
申请号：JP2006035345
申请日：2006-02-13
申请人： Hitachi Device Eng Co Ltd , Hitachi Displays Ltd , Hitachi Ulsi Systems Co Ltd , 日立デバイスエンジニアリング株式会社 , 株式会社日立ディスプレイズ , 株式会社日立超エル・エス・アイ・システムズ
发明人： GOTO MITSURU , KATAYANAGI HIROSHI , OTE YUKIHIDE , SAITO YOSHIYUKI , KODERA KOICHI
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To secure a timing margin when display data are latched in a semiconductor integrated circuit constituting a video signal line driving means even when a clock for display data latching and display data are made high in operating frequency. SOLUTION: The video signal line driving means has a bus line where display data of one pixel consisting of red, green, and blue are transmitted, a negative video signal voltage generating means couple comprising a 1st video signal voltage generating means comprising two positive video signal voltage generating means and one negative video signal voltage generating means and a 2nd video signal voltage generating means comprising one positive video signal voltage generating means and two negative video signal voltage generating means, a means of distributing display data of one pixel transmitted from the bus line to the 1st video signal voltage generating means or 2nd video signal voltage generating means, and a video signal voltage switching means of switching and outputting a pair of video signal voltages outputted from the video signal voltage generating means to a pair of video signal lines. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：即使当显示数据锁存和显示数据的时钟使工作频率高时，也可以在构成视频信号线驱动装置的半导体集成电路中锁存显示数据时确保时序余量。解决方案：视频信号线驱动装置具有发送由红色，绿色和蓝色组成的一个像素的显示数据的总线，负视频信号电压产生装置耦合，包括第一视频信号电压产生装置，包括两个正视频信号电压产生装置和一个负视频信号电压产生装置和第二视频信号电压产生装置，包括一个正视频信号电压产生装置和两个负视频信号电压产生装置，一个分配从一个像素发送的一个像素的显示数据的装置到第一视频信号电压产生装置或第二视频信号电压产生装置的总线;以及视频信号电压切换装置，用于将从视频信号电压产生装置输出的一对视频信号电压切换并输出到一对视频信号线。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2004318170A Liquid crystal display 有权
公开(公告)号：JP2004318170A
公开(公告)日：2004-11-11
申请号：JP2004177874
申请日：2004-06-16
申请人： Hitachi Device Eng Co Ltd , Hitachi Displays Ltd , Hitachi Ulsi Systems Co Ltd , 日立デバイスエンジニアリング株式会社 , 株式会社日立ディスプレイズ , 株式会社日立超エル・エス・アイ・システムズ
发明人： GOTO MITSURU , KATAYANAGI HIROSHI , OTE YUKIHIDE , SAITO YOSHIYUKI , KODERA KOICHI
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To secure a timing margin when display data are latched in a semiconductor integrated circuit constituting a video signal line driving means even when a clock for display data latch and the operating frequency of display data are made fast. SOLUTION: A video signal line driving means has a prelatch part which latches display data of one pixel consisting of red, green, and blue by two pixels, bus lines of two systems to which display data of two pixels are transmitted, and a display data switching means of switching and outputting display data of one pixel outputted from the prelatch part to one of the bus lines of the two systems and display data of the other pixel outputted from the prelatch part to the other bus line. Further, provided are a video signal voltage generating means comprising a positive video signal voltage generating means of inputting display data of one of the two systems of bus lines and generates a positive-polarity video signal voltage and a negative video signal voltage generating means of inputting video data of the other bus line, and generates a negative video signal voltage. COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2004310129A Liquid crystal display device and video signal line driver 有权
公开(公告)号：JP2004310129A
公开(公告)日：2004-11-04
申请号：JP2004177876
申请日：2004-06-16
申请人： Hitachi Device Eng Co Ltd , Hitachi Displays Ltd , Hitachi Ulsi Systems Co Ltd , 日立デバイスエンジニアリング株式会社 , 株式会社日立ディスプレイズ , 株式会社日立超エル・エス・アイ・システムズ
发明人： GOTO MITSURU , KATAYANAGI HIROSHI , OTE YUKIHIDE , SAITO YOSHIYUKI , KODERA KOICHI
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display device and a video signal line driver in which timing margin is secured within a semiconductor integrated circuit that constitutes of a video signal line driving means while latching display data.
SOLUTION: The video signal line driving means has a video signal voltage generating means pair that is provided with a pre-latch section which latches display data, that are made of red, green and blue and are equivalent to one pixel, for equivalent to two pixels, two system bus lines to which the display data equivalent to two pixels are transmitted, a display data switching means which conducts switching and outputs one of the display data equivalent to one pixel outputted from the pre-latch section to one of the two system bus lines and the other display data equivalent to one pixel outputted from the pre-latch section to the other one of the two system bus lines, a positive polarity video signal voltage generating means which receives the display data from one of the two system bus lines and generates positive polarity video signal voltages and a negative polarity video signal voltage generating means which receives the display data from the other two system bus lines and generates negative polarity video signals.
COPYRIGHT: (C)2005,JPO&NCIPI

4. 发明专利

JP2006163426A Liquid crystal display device 审中-公开
标题翻译：液晶显示装置
公开(公告)号：JP2006163426A
公开(公告)日：2006-06-22
申请号：JP2005367414
申请日：2005-12-21
申请人： Hitachi Device Eng Co Ltd , Hitachi Ltd , 日立デバイスエンジニアリング株式会社 , 株式会社日立製作所
发明人： FUJIOKA TAKAHIRO , ITO SHIGERU , GOTO MITSURU , NAKAYASU YOZO , SAITO YOSHIYUKI
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To input a video signal normally by compensating variation in duty ratio of a clock signal inputted to a liquid crystal driving circuit.
SOLUTION: A clock compensating circuit 200 generates an internal clock signal of 50% in duty ratio based upon a latch clock signal for display data inputted from outside. Display data sent out of a data input/arithmetic circuit 133 are latched by a latch circuit 135 one after another and outputted to the outside through a data output circuit 134. The data input/arithmetic circuit 133 inputs 1st and 2nd data when the clock signal rises and falls, and sends out the 1st data out to one internal bus line and the 2nd data to the other internal bus line in response to an AC-converted signal. A positive-polarity side circuit which supplies a gradation voltage with the positive polarity is connected to the 1st internal bus line and a negative-polarity side circuit which supplies a gradation voltage with the negative polarity is connected to the 2nd bus line.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过补偿输入到液晶驱动电路的时钟信号的占空比的变化来正常地输入视频信号。解决方案：时钟补偿电路200基于从外部输入的显示数据的锁存时钟信号，产生占空比为50％的内部时钟信号。从数据输入/运算电路133发出的显示数据由锁存电路135一个接一个锁存，并通过数据输出电路134输出到外部。数据输入/运算电路133当时钟信号响应于AC转换信号，将第一数据发送到一条内部总线，将第二数据发送到另一条内部总线。提供具有正极性的灰度电压的正极侧电路连接到第一内部总线，并且将负极性的灰度电压的负极侧电路连接到第二总线。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2007059663A Display device, and method of manufacturing same 审中-公开
标题翻译：显示装置及其制造方法
公开(公告)号：JP2007059663A
公开(公告)日：2007-03-08
申请号：JP2005243955
申请日：2005-08-25
申请人： Hitachi Displays Ltd , 株式会社日立ディスプレイズ
发明人： SAITO KAZUNARI , SAITO YOSHIYUKI , KUWATA MASAHIRO , SHIINA MASAHIDE , ODA TETSUO
IPC分类号： H01L21/316 , H01L21/76 , H01L21/8234 , H01L27/08 , H01L27/088
摘要： PROBLEM TO BE SOLVED: To achieve microfabrication of semiconductor chips used in a drive circuit and reduce its cost, by using each element isolation film for isolating active regions from each other.
SOLUTION: In a method of manufacturing a display device, the semiconductor chip is isolated into a low breakdown voltage region and a high breakdown voltage region; and both the low breakdown voltage region and the high breakdown voltage region have element isolation films, each of which comprises an oxide film and have their respective active regions two of which are isolated from each other by the element isolation film. More specifically, this manufacturing method has a step for so oxidizing selectively the semiconductor substrate of the semiconductor chip as to form in the principal surfaces of both the low breakdown voltage region, and the high breakdown voltage region the oxide films of the semiconductor chip by each of which the active regions are isolated from each other; a step for forming thereafter each silicon film on each oxide film; a step for so oxidizing the semiconductor substrate as to form gate oxide films on the active regions of both the low breakdown voltage region and the high breakdown voltage region, and as to form element separating films of the low breakdown voltage region and the high breakdown voltage region; a step for so etching the low breakdown voltage region as to remove the gate oxide films present on the low breakdown voltage region; and a step for so oxidizing the principal surface of the low breakdown voltage region as to form each gate oxide film on each active region of the low breakdown voltage region.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了实现用于驱动电路中的半导体芯片的微细加工，并且通过使用每个元件隔离膜来隔离有源区域来降低其成本。解决方案：在制造显示装置的方法中，将半导体芯片隔离成低击穿电压区域和高击穿电压区域; 并且低击穿电压区域和高击穿电压区域都具有元件隔离膜，每个元件隔离膜包括氧化膜并且其各自的有源区域通过元件隔离膜彼此隔离。更具体地说，该制造方法具有如下步骤：选择性地氧化半导体芯片的半导体衬底，以便在低击穿电压区域和高击穿电压区域中形成半导体芯片的氧化物膜的每个其中活性区域彼此隔离; 在每个氧化膜上形成每个硅膜的步骤; 使半导体基板氧化以在低击穿电压区域和高击穿电压区域的有源区域上形成栅极氧化膜的步骤，以及形成低击穿电压区域和高击穿电压的元件分离膜地区; 用于蚀刻低击穿电压区域以去除存在于低击穿电压区域上的栅极氧化膜的步骤; 以及使低击穿电压区域的主表面氧化以在低击穿电压区域的每个有源区上形成每个栅极氧化膜的步骤。版权所有（C）2007，JPO＆INPIT

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