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1. 发明专利

JP2010199598A Group iii-v nitride semiconductor substrate 有权
标题翻译： III-V族氮化物半导体衬底
公开(公告)号：JP2010199598A
公开(公告)日：2010-09-09
申请号：JP2010090577
申请日：2010-04-09
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： KAWAGUCHI YUSUKE
IPC分类号： H01L21/66 , C30B29/38 , C30B33/00 , H01L21/205 , H01L21/306 , H01L33/32
摘要： PROBLEM TO BE SOLVED: To provide a group III-V nitride based semiconductor substrate on which a compound semiconductor layer can be grown so as to be flat and uniform in impurity distribution.
SOLUTION: Photoluminescence is measured at an arbitrary position on the surface of an independent group III-V nitride based semiconductor substrate. The group III-V nitride based semiconductor substrate is determined as a product of good yield if 0.01≤α≤0.98, where intensity ratio α=N
1 /N
2 , emission intensity at band edge peak is N
1 , and emission intensity at band edge peak on the rear surface side of the same substrate corresponding to the measurement position is N
2 .
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供其上可以生长化合物半导体层以使其杂质分布平坦和均匀的III-V族氮化物基半导体衬底。解决方案：在独立的基于III-V族氮化物的半导体衬底的表面上的任意位置处测量光致发光。如果0.01≤α≤0.98，其中强度比α= N / N 2 ，则将III-V族氮化物基半导体衬底确定为良好产率的乘积，发射在带边缘峰值处的强度为N 1 ，并且与测量位置对应的相同基板的背面侧的带边缘峰值处的发射强度为N 2 。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2005183668A Manufacturing method of compound semiconductor element 审中-公开
标题翻译：复合半导体元件的制造方法
公开(公告)号：JP2005183668A
公开(公告)日：2005-07-07
申请号：JP2003422317
申请日：2003-12-19
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： KAWAGUCHI YUSUKE
IPC分类号： H01L21/265
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a compound semiconductor element wherein the conductivity of the nitride-based compound semiconductor is made to be a p-type or an n-type by doping the nitride-based compound semiconductor uniformly with good controllability.
SOLUTION: The nitride-based compound semiconductors GaN, AlN and InN, or mixtures thereof such as AlGaN and InGaN are doped using an ion beam as a means for imparting p-type or n-type conductivity to the nitride-based compound semiconductor. Thereafter, the semiconductor is subjected to heat treatment to activate impurities.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供通过均匀掺杂氮化物基化合物半导体使氮化物系化合物半导体的导电性为p型或n型的化合物半导体元件的制造方法具有良好的可控性。解决方案：氮化物基化合物半导体GaN，AlN和InN，或其混合物，例如AlGaN和InGaN，使用离子束掺杂作为用于赋予氮化物基化合物p型或n型导电性的手段半导体。此后，对半导体进行热处理以活化杂质。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2007197240A Method for manufacturing gallium nitride single crystal substrate and gallium nitride single crystal substrate 审中-公开
标题翻译：氮化硅单晶基板和氮化镓单晶基板的制造方法
公开(公告)号：JP2007197240A
公开(公告)日：2007-08-09
申请号：JP2006016316
申请日：2006-01-25
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： MEGURO TAKESHI , SUZUKI TAKAMASA , KAWAGUCHI YUSUKE
IPC分类号： C30B29/38
摘要： PROBLEM TO BE SOLVED: To manufacture a gallium nitride single crystal substrate having low defect density.
SOLUTION: A gallium nitride ingot 2 is obtained by growing a gallium nitride crystal on a gallium nitride single crystal substrate 1. If necessary, the outer shape of the obtained ingot 2 is processed to obtain a columnar gallium nitride ingot 3. Then, gallium nitride single crystal substrates 4a are cut out of the part, grown at last half, of the gallium nitride ingot 2 (or 3), and a new gallium nitride ingot 2 is prepared by growing a gallium nitride crystal on a gallium nitride single crystal substrate 1 being a seed crystal substrate, by using one of the substrates 4a as the seed crystal substrate. Gallium nitride single crystal substrates 4 are manufactured by cutting the newly grown gallium nitride ingot 2. This manufacturing process is repeated, and thereby, the gallium nitride single crystal substrate having few defects can be obtained.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：制造具有低缺陷密度的氮化镓单晶衬底。解决方案：通过在氮化镓单晶衬底1上生长氮化镓晶体来获得氮化镓锭2.如果需要，将获得的锭2的外形加工成柱状氮化镓锭3.然后在氮化镓锭2（或3）的后半部分生长的部分切掉氮化镓单晶衬底4a，并且通过在氮化镓单晶上生长氮化镓晶体来制备新的氮化镓锭2 晶体基板1是晶种基板，通过使用基板4a中的一个作为晶种基板。通过切割新生长的氮化镓锭2来制造氮化镓单晶衬底4.重复该制造工艺，从而可以获得缺陷少的氮化镓单晶衬底。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2007153712A Free-standing gallium nitride single crystal substrate and its manufacturing method 有权
标题翻译：自由式氮化钠单晶基板及其制造方法
公开(公告)号：JP2007153712A
公开(公告)日：2007-06-21
申请号：JP2005354454
申请日：2005-12-08
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： KAWAGUCHI YUSUKE , MEGURO TAKESHI
IPC分类号： C30B29/38 , C23C16/01 , C23C16/34 , C23C16/56 , H01L21/304 , H01L21/306 , H01L33/06 , H01L33/32
CPC分类号： H01L21/02008
摘要： PROBLEM TO BE SOLVED: To provide a free-standing gallium nitride single crystal substrate, which can improve the conforming product yield of nitride semiconductor devices, by enhancing its adhesion with a substrate holder and reducing the warp of a GaN free-standing substrate, and its manufacturing method, and also to provide a method of manufacturing the nitride semiconductor device. SOLUTION: The nitride semiconductor device is manufactured by a vapor-phase growing method by using the GaN free-standing substrate 1, wherein the surface (Ga face) 2 is polished to be a specular surface and the arithmetic mean roughness Ra of the rear surface (N face) 3 is made 1 μm to 10 μm (the roughness in surface in contact with the substrate holder of a vapor phase growing apparatus) by etching treatment after lapping. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种独立的氮化镓单晶衬底，其可以通过增强其与衬底保持器的粘附性并减少GaN独立的翘曲来改善氮化物半导体器件的一致产品产率衬底及其制造方法，并且还提供一种制造氮化物半导体器件的方法。解决方案：通过使用GaN自支撑衬底1通过气相生长方法制造氮化物半导体器件，其中将表面（Ga面）2抛光为镜面，并且算术平均粗糙度Ra 通过研磨后的蚀刻处理，将后表面（N面）3制成1μm至10μm（与气相生长设备的衬底保持器接触的表面的粗糙度）。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2005019578A Semiconductor photodetector 审中-公开
标题翻译： SEMICONDUCTOR PHOTODETEOROR
公开(公告)号：JP2005019578A
公开(公告)日：2005-01-20
申请号：JP2003180482
申请日：2003-06-25
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： KAWAGUCHI YUSUKE , OSHIMA YUICHI
IPC分类号： H01L31/10
摘要： PROBLEM TO BE SOLVED: To obtain a structure which can prevent inconvenience of reducing light passing through a photodetector without photodetecting by a light receiving layer and receiving the light from a rear surface side of a substrate which is not assumed to have to be originally incident in a GaN photodetector.
SOLUTION: A semiconductor photodetector includes the substrate 15, at least a p-type GaN semiconductor 12 on the substrate 15, an n-type GaN semiconductor 14, and the light receiving layer 13 interposed between the p-type GaN semiconductor 12 and the n-type GaN semiconductor 14. In the semiconductor photodetector, a texture structure 16 is provided in which many hexagonal cones or cones are disposed at a rear surface side of the substrate 15.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了获得能够防止通过光电检测器而导致的光的不便的结构，而不受光接收层的光电检测和接收来自不被认为必须是的基板的背面侧的光最初入射到GaN光电探测器中。解决方案：半导体光电检测器包括基板15，至少衬底15上的p型GaN半导体12，n型GaN半导体14和插入在p型GaN半导体12之间的光接收层13 和n型GaN半导体14.在半导体光电检测器中，提供纹理结构16，其中许多六角锥或锥体设置在基板15的后表面侧。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2006147849A Group iii-v nitride semiconductor substrate and its evaluation method 有权
标题翻译： III-V族氮化物半导体衬底及其评估方法
公开(公告)号：JP2006147849A
公开(公告)日：2006-06-08
申请号：JP2004335913
申请日：2004-11-19
申请人： Hitachi Cable Ltd , 日立電線株式会社
发明人： KAWAGUCHI YUSUKE
IPC分类号： H01L21/205 , H01L21/66
CPC分类号： G01N21/6489 , H01L21/02389 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/0262 , H01L33/0075
摘要： PROBLEM TO BE SOLVED: To provide a group III-V nitride semiconductor substrate of which a compound semiconductor layer can be grown flat on the substrate with uniform impurity distribution, and to provide a method of simply evaluating, in a short time, whether it is the substrate of which a compound semiconductor layer can be grown flat on the substrate with uniform impurity distribution or not.
SOLUTION: Photoluminescence is measured at an arbitrary position on the surface of an independent group III-V nitride semiconductor substrate. A group III-V nitride semiconductor substrate is determined as sound product of good yield if α 1 /N
2 , emission intensity at band end peak is N
1 , and the emission intensity at band end peak on the rear surface side of the same substrate corresponding to the measurement position is N
2 .
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供其中化合物半导体层可以在均匀杂质分布的基板上平坦地生长的III-V族氮化物半导体衬底，并且提供简单地在短时间内评估的方法，化合物半导体层是否可以在基板上平坦地生长均匀的杂质分布的基板。解决方案：在独立的III-V族氮化物半导体衬底的表面上的任意位置处测量光致发光。如果α<1，其中强度比α= N / N 2 ，则III-V族氮化物半导体衬底被确定为良品率的良品，末端峰值为N 1 ，并且与测量位置对应的相同基板的背面侧的带端峰值的发射强度为N 2 。版权所有（C）2006，JPO＆NCIPI

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