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1. 发明专利

JPH1167626A METHOD AND DEVICE FOR REMOVING RESIST 失效
公开(公告)号：JPH1167626A
公开(公告)日：1999-03-09
申请号：JP21735897
申请日：1997-08-12
申请人： HITACHI LTD , NITTO DENKO CORP
发明人： SHIRAI SEIICHIRO , ONOZUKA TOSHIHIKO , NOISSHIKI TAKAYUKI , SAKAI SATORU , SASAJIMA KATSUHIRO , TOYODA HIDESHI , NAMIKAWA AKIRA
IPC分类号： C09J7/00 , C09J5/00 , G03F7/34 , G03F7/42 , H01L21/027 , H01L21/311
摘要： PROBLEM TO BE SOLVED: To readily perform the removal of a resist film, without imparting damages to a gate oxide film. SOLUTION: In a semiconductor water 1 on which many kinds of gate oxide films 2 are formed, a resist film 3 as a mask when the unnecessary part of the gate oxide film 2 is etched is formed on the gate oxide film 2 formed on the semiconductor wafer 1. With the resist film 3 as a mask, the unnecessary part of the gate oxide film 2 is etched. Thereafter, the resist film 3 is removed by an adhesive cape 4. Thus, the first gate oxide film 2 is formed on the semiconductor wafer 1. Thereafter, the second gate oxide film 2 is formed at the upper layer of this first gate oxide film 2.

2. 发明专利

JP2002100765A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2002100765A
公开(公告)日：2002-04-05
申请号：JP2000290185
申请日：2000-09-25
申请人： HITACHI LTD
发明人： HIRAIWA ATSUSHI , KASHU NOBUYOSHI , SAKAI SATORU
IPC分类号： H01L29/78 , H01L21/318 , H01L21/8238 , H01L27/092
摘要： PROBLEM TO BE SOLVED: To provide a technology to realize a faster semiconductor device by improving the driving ability of a MISFET comprising a gate insulating film of 2 nm or smaller. SOLUTION: An oxide silicon film 7a is formed on the surface of a substrate 1, and applied with a nitriding process which uses a nitrogen active radical generated by plasma, so that the surface of oxide silicon film 7a is changed into a nitride layer 7b. Then an element which is charged negative with the nitride layer 7b, for example boron, is introduced so that the nitride layer 7b is allowed to be an electrically neutral state. Thus, the capacity of the gate insulating film 7 is increased, while the carrier mobility is suppressed low for improved driving ability of the MISFET.

3. 发明专利

JP2000200836A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000200836A
公开(公告)日：2000-07-18
申请号：JP156999
申请日：1999-01-07
申请人： HITACHI LTD
发明人： SAKAI SATORU , YOSHIDA MAKOTO
IPC分类号： H01L21/8234 , H01L27/088
摘要： PROBLEM TO BE SOLVED: To prevent a boundary between an active region and an element isolation region from moving back in a case where a double-gate insulating film is utilized. SOLUTION: A semiconductor device is equipped with MISFETs(Metal Insulator Semiconductor Field Effect Transistors) which comprise an element isolation region 3 formed on the main surface of a semiconductor substrate 1, active regions 4a and 4b specified by the element isolation region 3, and gate electrodes 9 each formed on the active regions 4a and 4b through the intermediary of gate insulating films 5 and 8 respectively. At this point, an inner part of the gate insulating film 8 on the active region 4b is made thinner than the gate insulating film 5, so that the semiconductor device is provided with a double-gate insulating film. The gate insulating film 8 in a boundary region 7 between the active region 4b and the element isolation region 3 is formed nearly as thick as the gate insulating film 5. The gate insulating film 8 is formed through a manner where the gate insulating film 5 is etched using a photoresist film with an opening smaller than the plane pattern of the active region 4b as a mask, and then the semiconductor substrate 1 is subjected to an oxidizing treatment.

4. 发明专利

JPH09172011A OXIDE FILM FORMING METHOD 失效
公开(公告)号：JPH09172011A
公开(公告)日：1997-06-30
申请号：JP33018795
申请日：1995-12-19
申请人： HITACHI LTD
发明人： TANABE YOSHIKAZU , SAKAI SATORU , KASHU NOBUYOSHI
IPC分类号： H01L29/78 , H01L21/31 , H01L21/316
摘要： PROBLEM TO BE SOLVED: To provide an oxide film forming method providing a good film thickness reproducibility wherein taking-in of H and OH is suppressed. SOLUTION: A method of forming an oxide film by heating a semiconductor wafer in an oxidative atmosphere filling a treating chamber 1 is provided according to which H is fed into a reactor 26 capable of chemically activating H, the reactor is heated at temp. below the firing point of H to produce H radicals, and the radicals are reacted with O fed into a treating chamber 1 to produce H while forming the oxide film on a semiconductor wafer.

5. 发明专利

JPH07254635A SEMICONDUCTOR PRODUCING APPARATUS 失效
公开(公告)号：JPH07254635A
公开(公告)日：1995-10-03
申请号：JP4401894
申请日：1994-03-15
申请人： HITACHI LTD , KOKUSAI ELECTRIC CO LTD
发明人： SAKAI SATORU , NITTA TAKEHISA , TOMIOKA HIDEKI , SAITO YOSHIO , KASHU NOBUYOSHI , MIZUKAMI KOICHIRO , SHINKAWA SHUJI , IKEDA FUMIHIDE , TANABE MIKIO
IPC分类号： F16K27/06 , B05C15/00 , H01L21/205 , H01L21/22 , H01L21/302 , H01L21/304 , H01L21/3065 , H01L21/324 , H01L21/677 , H01L21/68
摘要： PURPOSE:To provide an ON/OFF valve mechanism (gate valve, load lock mechanism) excellent in heat resistance and useful for reduction of size of semiconductor producing apparatus in which production of dust due to sliding is eliminated. CONSTITUTION:A valve 41 is moved along a similar plane while keeping a micro gap with respect to a valve cage 51 thus controlling the rotational position of the opening 42 of valve with respect to the openings 52, 53 of valve cage and turning the valve ON/OFF. The micro gap between the valve 41 and the valve cage 51 is provided with grooves 54, 55, 56, 57 for supplying and discharging a fluid while surrounding the openings 52, 53 of the valve cage in order to interrupt the atmosphere by means of the fluid thus forming a gate valve. Furthermore, a work (wafer 1) is placed in the region defined by the valve 41 and the valve cage 51 thus forming a load lock.

6. 发明专利

JP2003158195A MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
公开(公告)号：JP2003158195A
公开(公告)日：2003-05-30
申请号：JP2001355053
申请日：2001-11-20
申请人： HITACHI LTD
发明人： OTSUKA FUMIO , YAMAMOTO TOMOSHI , SAKAI SATORU
IPC分类号： H01L29/78 , H01L21/28 , H01L21/285 , H01L21/60 , H01L21/768 , H01L21/8234 , H01L21/8238 , H01L21/8242 , H01L27/088 , H01L27/092 , H01L27/10 , H01L29/51
摘要： PROBLEM TO BE SOLVED: To form a circuit which can operate fast and a circuit which has high reliability on the same substrate for a semiconductor integrated circuit device having an MIS transistor whose gate insulating film is formed of a high dielectric-constant insulating film. SOLUTION: At a logic part A2 and an I/O part A3, a high dielectric-constant film 7 on a diffusion area 12b of the MIS transistor is removed and a silicide layer 14 with low resistance is formed on its surface. At a memory part A1, on the other hand, the silicide layer 14 is not formed on the diffusion area 12b, which is covered with the high dielectric-constant insulating film 7 to prevent the semiconductor substrate 1 from being damaged when a spacer 13, the silicide layer 14, and a contact hole 17 are formed.

7. 发明专利

JP2003152102A METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
公开(公告)号：JP2003152102A
公开(公告)日：2003-05-23
申请号：JP2001350636
申请日：2001-11-15
申请人： HITACHI LTD
发明人： FURUKAWA RYOICHI , SAKAI SATORU , YAMAMOTO TOMOSHI
IPC分类号： H01L27/092 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To suppress the formation of undesirable natural oxide films on the boundary planes between a semiconductor substrate and gate insulating films of MIS-FETs, which have the respective gate insulation films with thicknesses different from each other in a process in which the MIS-FETS are formed on the same semiconductor substrate. SOLUTION: Gate insulation films 9a of MIS-FETs (Qn1 and Qp1) of which an internal circuit is composed comprise oxidized silicon nitride films and gate insulation films 9b of MIS-FETs (Qn2 and Qp2) of which an I/O circuit is composed comprise laminated films of oxidized silicon nitride films and high dielectric films. As a process in which two types of gate insulation films 9a and 9b are formed on the substrate 1 is carried out continuously in a multichamber type processing apparatus and the substrate is not exposed to the atmosphere, the penetration of undesirable foreign substances and the formation of undesirable natural oxide films on boundary planes between the substrate 1 and the gate insulation films 9a and 9b can be suppressed.

8. 发明专利

JP2002093871A SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR 失效
公开(公告)号：JP2002093871A
公开(公告)日：2002-03-29
申请号：JP2000284556
申请日：2000-09-20
申请人： HITACHI LTD
发明人： SAKAI SATORU , HIRAIWA ATSUSHI
IPC分类号： G01B11/06 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To improve accuracy of the measurement of film thickness. SOLUTION: After a gate insulating film has been formed on a semiconductor substrate, external factors which disturb film thickness measurement, such as water, organic matters, etc., left on the surface of the semiconductor substrate are removed, immediately before or during the optical measurement of the thickness, quality, etc., of the insulating film.

9. 发明专利

JP2001085531A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2001085531A
公开(公告)日：2001-03-30
申请号：JP25748799
申请日：1999-09-10
申请人： HITACHI LTD
发明人： KANDA TAKAYUKI , HIRAIWA ATSUSHI , SUZUKI NORIO , SAKAI SATORU
IPC分类号： H01L21/8234 , H01L27/088
摘要： PROBLEM TO BE SOLVED: To improve reliability of a semiconductor integrated circuit device which has multiple kinds of MISFETs (metal insulator semiconductor field-effect transistor) which differ in gate insulating film thickness. SOLUTION: By this manufacturing method, a silicon nitride film 7 of about 4 nm or smaller in thickness is formed on a silicon oxide film 6 formed on the top surface of a semiconductor substrate 1 and then the silicon nitride film 7 and silicon oxide film 6 in an region B where a thin gate insulating film is formed are removed in the order, by using a resist pattern 8 as a mask. Then the resist pattern 8 is removed, followed by the entire silicon nitride film 7 and the silicon oxide film 6 of about 0.2 nm or smaller in thickness are removed, and the semiconductor substrate 1 is treated by thermal oxidation to form gate insulating films which are different in thickness.

10. 发明专利

JPH08213355A SEMICONDUCTOR DEVICE AND CLEANING METHOD OF STAGE WHICH IS USED FOR THE SAME 失效
公开(公告)号：JPH08213355A
公开(公告)日：1996-08-20
申请号：JP1758195
申请日：1995-02-06
申请人： HITACHI LTD
发明人： HONDA MITSUHARU , SUZUKI TADASHI , SAKAI SATORU , OGASAWARA MAKOTO , YANAGISAWA YASUNOBU
IPC分类号： H01J37/20 , H01L21/265 , H01L21/304
摘要： PURPOSE: To reduce foreign matters adhering to an object to be treated, by a method wherein, when a process treatment is performed on one stage, at least another one stage is cleaned, by cleaning at least one stage out of a plurality of stages which are connected via a chamber and a gate valve. CONSTITUTION: The process treatment surface 1a of a wafer 1 is irradiated with an ion beam 13, and ions are implanted in the wafer 1. When ions are implanted in the wafer 1, a second stage 3 of another stage is cleaned by a cleaning mechanism 6. After that, the inside of the cleaning tank 11 in the cleaning mechanism 6 is turned into a vacuum atmosphere by a vacuumizing means 14. After a gate valve 5 is opened, a first stage wherein ion implantation has been performed and the second stage of another stage wherein cleaning has been performed are mutually moved and exchanged. In this state, ion implantation is again performed.

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