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    • 2. 发明专利
    • CIRCUIT-SWITCHING CONTROLLER
    • JPH10294776A
    • 1998-11-04
    • JP10133497
    • 1997-04-18
    • HITACHI LTD
    • ARAKI YUKITOHASHIMOTO TOYOKAZU
    • H04L1/22H04L29/14H04M11/00
    • PROBLEM TO BE SOLVED: To prevent data from being lost and to prevent the transmission efficiency of data communication from being lowered by sending data which is stored in memory at the point of time, when data communication due to a line interchangeable ISDN line becomes available. SOLUTION: As soon as an abnormality is detected in a fast digital line and a fast digital line interface part, a receiving memory 9 stores data that is received from a data terminal. Next, a controlling part 7 sends an instruction that connects to an ISDN line to an ISDN line interfacing part 6, in order to perform data communication by using the ISDN line and the part 6 is connected to the ISDN line. After the connection is completed, a switch 8 switches a data transmission route from a fast digital line to the ISDN line, and data stored in the memory 9 is sent to the part 6, via the switch 8 and sent to the ISDN line. This enables prevention of data in the process of line-switching processing from the digital line to the ISDN line from being lost and to perform communication, without lowering the data communication efficiency.
    • 6. 发明专利
    • Loop terminal equipment
    • 环形终端设备
    • JPS58195341A
    • 1983-11-14
    • JP7672182
    • 1982-05-10
    • Hitachi Ltd
    • WADA HIROYUKIHASHIMOTO TOYOKAZU
    • H04L1/22H04L12/437
    • H04L12/437
    • PURPOSE:To improve reliability, by providing a shift register circuit to two pairs of transmission lines individually, erasing a GA code and decreasing the amount of hardware of a duplex loop transmission system. CONSTITUTION:Shift register circuits 5-1, 5-2 have bit length longer than that of the GA code given with the right of transmission, the GA code is received and the bit length of the GA code for erasing the GA code is required when the data to be transmitted from the calling station exists. A reception data is inputted to the shift registers 5-1, 5-2, a signal of an existing reception circuit 3-1 is inputted to a reception controlling circuit 6 with a selection circuit 4, and the data addressed to the calling station is transmitted to a common controlling section 10. The input data of the registers 5-1, 5-2 is outputted to transmission lines 1, 2 by transmission circuits 9-1, 9-2 via a switching circuit 8. The data of the register 5-1 is the GA code, and when a data transfer request signal is transmitted to a transmission controlling circuit 7 from the common controlling section 10, a transmission controlling circuit 7 transmits the signal.
    • 目的:为了提高可靠性,通过分别向两对传输线提供移位寄存器电路,擦除GA代码并减少双工回路传输系统的硬件数量。 构成:移位寄存器电路5-1,5-2的位长度长于发送权赋予的GA代码的长度,接收到GA代码,并且需要用于擦除GA代码的GA代码的位长度, 存在从主叫台发送的数据。 接收数据被输入到移位寄存器5-1,5-2,现有接收电路3-1的信号通过选择电路4被输入到接收控制电路6,并且寻址到呼叫站的数据是 发送到公共控制部分10.寄存器5-1,5-2的输入数据经由切换电路8由发送电路9-1,9-2输出到传输线路1,2。 5-1是GA代码,并且当数据传送请求信号从公共控制部分10发送到发送控制电路7时,发送控制电路7发送该信号。
    • 9. 发明专利
    • FAULT PROCESSING METHOD FOR LOOP TRANSMISSION SYSTEM
    • JPH06338896A
    • 1994-12-06
    • JP12574593
    • 1993-05-27
    • HITACHI LTDHITACHI JOHO NETWORK KKHITACHI COMPUTER ENG
    • MIYAGAWA TORUHASHIMOTO TOYOKAZUMAEBA TAKAHIROINOUE MASAHIRO
    • G06F13/00H04L12/42
    • PURPOSE:To attain a stuck fault operation from which a faulty node is excluded by temporarily separating a self node from a transmission line, allowing its own node to perform a self-diagnostic test when an abnormality is detected by a fault processing, resubscribing it to the transmission line when the result is normal, and separating it from the transmission line as it is when the result is abnormal. CONSTITUTION:A node control part 22 being the host processor of a control processor 17 is provided with the transmitting and receiving function of the data frame of its own node destination and a compare check state corresponding to it, so that a processing can be attained even when the fault of a loop transmission control part 10 occurs in addition to the conventional fault processing. The control part 22 transmits the data frame of its own node destination to the processor 17 at a prescribed interval, so that the reception monitor and compare check of the data frame circulating through a transmission line 1 can be performed and when the frame is not matched, the self- diagnostic test can be executed. Thus, it is possible to confirm not only the normality of the transmission line 1 but also the normality of the processor 17 and to facilitate a countermeasure at the time of the occurrence of the fault of the control part 10 and the processor 17.