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1. 发明专利

JPH03228335A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH03228335A
公开(公告)日：1991-10-09
申请号：JP2200090
申请日：1990-02-02
申请人： HITACHI LTD , HITACHI DEVICE ENG , HITACHI VLSI ENG
发明人： SHIBA TAKEO , OGIWARA ITARU , TAMAOKI YOICHI , SHIMAMOTO HIROMI , KOBAYASHI TAKASHI , NANBA MITSUO
IPC分类号： H01L29/73 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L27/082 , H01L29/732
摘要： PURPOSE:To reduce the specific resistance and the parasitic resistance of a polycrystalline silicon electrode in a bipolar transistor by using polycrystalline silicon with a grain size above a specific value for the polycrystalline silicon electrode of base, emitter, or collector. CONSTITUTION:In a vertical bipolar transistor consisting of a conductivity-I first layer 2 provided in a semiconductor substrate 1, a conductivity-II second layer 7 provided on it, and a conductivity-I third layer 8 provided further on it, electrodes 5, 10 made of polycrystalline silicon film are connected to the first layer 2, second layer 7, or third layer 8, so that the largest side of its polycrystalline silicon grain is 1mum or larger. For example, amorphous silicon layers are deposited, injected with impurity atoms, and heat-treated at 900 deg.C or higher temperature, thus forming base electrodes 5 and emitter electrodes 10 consisting of polycrystalline silicon with a grain size of 2mu or larger. Thereafter, a passivation film 11 is deposited to form base, emitter, and collector metal electrodes 12, 14.

2. 发明专利

JPS6292369A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6292369A
公开(公告)日：1987-04-27
申请号：JP23123185
申请日：1985-10-18
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： OGIWARA ITARU , TAMAOKI YOICHI , NAKAMURA TORU , KURE TOKUO , IKEDA SEIJI , SAGARA KAZUHIKO , HAYASHIDA TETSUYA
IPC分类号： H01L29/73 , H01L21/331 , H01L29/72
摘要： PURPOSE:To prevent the generation of a crystal defect by forming a semiconductor oxide film between a semiconductor epitaxial layer in a collector leading-out region of a vertical type transistor and a semiconductor nitride film. CONSTITUTION:An N type buried layer 32 is shaped onto a P-type silicon substrate 31, and N-type silicon epitaxial layers 33 are gown. Three layers 301, 302, 303 are left only to active sections for transistors and collector leading- out sections for vertical transistors, and the layers 33 are etched. Thermal oxidation is conducted, and silicon oxide films 304 and silicon nitride films 305 are left only on the side surfaces of projecting type silicon layers through selective etching. An silicon oxide film 37 is shaped through thermal oxidation, and etched selectively. An silicon oxide film 306 and a silicon nitride film 307 are formed on the whole surface and patterned. Part of a plycrystalline silicon layer is changed into oxide film s 310. The silicon oxide films 303, 306 and the silicon nitride film 308 are removed, a P-type impurity is diffused to silicon layers 38, and silicon oxide films 39 are shaped through thermal oxidation.

3. 发明专利

JPH0418733A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0418733A
公开(公告)日：1992-01-22
申请号：JP12110790
申请日：1990-05-14
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： TAMAOKI YOICHI , SHIBA TAKEO , SAGARA KAZUHIKO , KURE TOKUO , NAKAMURA TORU , OGIWARA ITARU
IPC分类号： H01L29/73 , H01L21/31 , H01L21/331 , H01L21/76 , H01L29/732
摘要： PURPOSE:To manufacture the title semiconductor device capable of flattening the upper part of trenches by a method wherein the insulation separating trenches are formed between elements on a substrate and after forming buried material on the whole surface and etching away the material previously formed around projection parts only, the buried material on the whole surface is further etched away. CONSTITUTION:An n type buried layer 2 for collector is formed on a P type substrate 1 to form an Si epitaxial growing layer 3 on the film 2 and then an SiO2 film 4, an Si3O4 film 5 and another SiO2 film 6 are successively formed. After halfway etching away the epitaxial growing layer 3 using the three layer film as a mask to form the SiO2 film by thermal process, another Si3N4 film 7 is deposited on the whole surface to be left only on the sidewall of projection parts by etching away process. Next, Si trenches 8 for element separation are formed further to form the other SiO2 film 9. After removing the Si3N4 film 7, the other Si3N4 film 10 is formed on the whole surface to form a polycrystal silicon film 11. Next, after the whole surface is coated with a photoresist film 13 so as to be flattened, the film 13 is removed until the projection part of the film 11 is exposed and furthermore after removing the film 13, the film 11 is etched away until the surface of the trenches 8 is exposed.

4. 发明专利

JP2002076011A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2002076011A
公开(公告)日：2002-03-15
申请号：JP2000253933
申请日：2000-08-24
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD , HITACHI ULSI SYS CO LTD
发明人： IWASAKI TAKAYUKI , TAMAOKI YOICHI , CHIDA YOSHINOBU , TSUJI KOSUKE
IPC分类号： H01L29/73 , H01L21/331 , H01L21/76 , H01L21/762
摘要： PROBLEM TO BE SOLVED: To allow enlargement of a collector lead-out region to prevent the dielectric strength between a collector and a base from declining caused by decrease of a distance from the end of the collector lead-out region to the base region. SOLUTION: A semiconductor device comprises a collector layer formed in a semiconductor substrate, a base region and an emitter region on a main surface of the semiconductor substrate, and a collector lead-out region connecting the collector layer and a collector electrode formed on the surface of the semiconductor substrate. A trench is formed as a region for the collector lead-out region, ion implantation is performed through the trench to form the collector lead-out region, and the trench is embedded by the collector electrode. Since there is no need to increase the energy of the ion implantation for forming a collector lead-out region, this construction allows enlargement of the collector lead-out region to prevent the collector lead-out region from enlarging in a horizontal direction, and the dielectric strength between the collector and the base from declining.

5. 发明专利

JP2002050709A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2002050709A
公开(公告)日：2002-02-15
申请号：JP2000237407
申请日：2000-08-04
申请人： HITACHI LTD
发明人： TAMAOKI YOICHI , IWASAKI TAKAYUKI , TOMATSURI TOMOYUKI , YOSHIDA EIICHI , KAMATA CHIYOSHI , TAKAKU ATSUSHI
IPC分类号： H01L21/76 , H01L21/8222 , H01L21/8248 , H01L21/8249 , H01L27/06
摘要： PROBLEM TO BE SOLVED: To realize increase in the performance of a semiconductor integrated circuit device having an n-channel MISFET, a p-channel MISFET, an npn bipolar transistor and a pnp bipolar transistor. SOLUTION: An SOI substrate 1 consists of a support substrate 2, consisting of a single crystal silicon film, a silicon oxide layer 3, a single-crystal silicon layer 4 and epitaxial layers 7. A deep U-shaped groove (deep groove) 11 is formed in one part of a field oxide film 8, formed on the surface of each of the layers 7. An n-channel MISFET (Mn), a p-channel MISFET (Mp), an npn bipolar transistor (Bn) and a pnp bipolar transistor (Bp) are respectively formed on semiconductor insular regions, being electrically separated from each other by the grooves 11 and the layer 3.

6. 发明专利

JP2000183355A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2000183355A
公开(公告)日：2000-06-30
申请号：JP36022498
申请日：1998-12-18
申请人： HITACHI LTD
发明人： WAKAHARA YOSHIFUMI , TAMAOKI YOICHI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a technology for speeding up a semiconductor integrated circuit device which has a MISFET formed on an SOI substrate and improving reliability. SOLUTION: A groove, which is surrounded by a side wall spacer 11 and whose depth (d) is about 90-100 nm is formed on a polycrystalline silicon film 6, constituting the gate electrode of a MISFET. Silicons 13a and 13b with a thickness of about 100 nm are stacked on the surface of the exposed thin-film silicon layer 3. Thereafter, a titanium silicide layer is formed on the surfaces of the silicons 13a and 13b through self-matching.

7. 发明专利

JPH0955387A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0955387A
公开(公告)日：1997-02-25
申请号：JP20589395
申请日：1995-08-11
申请人： HITACHI LTD
发明人： HASHIMOTO TAKASHI , MIURA HIDEO , KIKUCHI TOSHIYUKI , MINE TOSHIYUKI , TAMAOKI YOICHI , KUMAUCHI TAKAHIRO
IPC分类号： H01L29/73 , H01L21/205 , H01L21/306 , H01L21/331 , H01L21/8222 , H01L21/8249 , H01L27/06 , H01L29/165 , H01L29/732 , H01L29/737
摘要： PROBLEM TO BE SOLVED: To prevent the increase in parasitic component and the decrease in withstand voltage when the leaking current and the parasitic capacity between an emitter and a base are decreased and the intrinsic base layer of a bipolar transistor is formed in self-aligning mode by using a selective epitaxial technology without decreasing the current amplification factor of the bipolar transistor. SOLUTION: Hydrogen and OH-group termination are removed before the formation of an emitter leader electrode. Thus, amorphous silicon in (111) orientation is grown on a silicon substrate in (100) orientation. Furthermore, a buffer layer 25b in low impurity concentration is formed on the surface of an intrinsic base layer 25a. Thus, the decrease in leaking current and the improvement of the withstand voltage of a collector and an emitter are made compatible.

8. 发明专利

JPH08195483A SOI SUBSTRATE, AND ITS MANUFACTURE 失效
公开(公告)号：JPH08195483A
公开(公告)日：1996-07-30
申请号：JP629195
申请日：1995-01-19
申请人： HITACHI LTD
发明人： TAMAOKI YOICHI , IKEDA TAKAHIDE
IPC分类号： H01L27/12 , H01L21/02
摘要： PURPOSE: To provide an SOI substrate where an insulator does not exert a bad influence upon process. CONSTITUTION: An SOI substrate is composed of a silicon single crystal substrate 2 being a semiconductor substrate, an oxide film 3 being the insulator made on this silicon single crystal substrate 2, and a silicon single crystal layer 4 being the semiconductor layer being made on this oxide film 3 not to expose the oxide film 3 to the outside by covering the periphery 3A of this oxide film 3. Since the oxide film 3 is not exposed to the outside by the periphery 3A being covered with the silicon single crystal layer 4, the insulator does not exert a bad influence upon the process.

9. 发明专利

JPH06120237A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH06120237A
公开(公告)日：1994-04-28
申请号：JP26842292
申请日：1992-10-07
申请人： HITACHI LTD
发明人： KOBAYASHI TAKASHI , IIJIMA SHINPEI , TAMAOKI YOICHI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
摘要： PURPOSE:To decrease resistance also at a step-difference part, realize the high speed operation and the high level integration of an LSI, simplify a process, and improve productivity, by depositing an Si film in an amorphous state while introducing impurities, and crystallizing the Si film to apply it to a base leading- out electrode. CONSTITUTION:After a first conductivity type layer 202 is formed on a semiconductor substrate 201, and a layer 203 of a second conductivity type opposite to the first conductivity type is formed, first insulating films 204, 205 are formed, and an aperture is formed in the films 204, 205. After an amorphous silicon film 209 is deposited while second conductivity type impurities are introduced, the amorphous silicon film 209 which is deposited while the second conductivity type impurities are introduced is crystallized 211 by heat treatment, and the impurities in the silicon films 209, 211 are diffused in the semiconductor substrate. After a second insulating film 213 is formed and an aperture is formed in the film 23, a silicon film 214 containing the first conductivity type impurities is formed.

10. 发明专利

JPH053204A SEMICONDUCTOR DEVICE RESISTANT TO ALPHA-RAY, INTEGRATED CIRCUIT, AND LOGIC CALCULATION DEVICE 失效
公开(公告)号：JPH053204A
公开(公告)日：1993-01-08
申请号：JP15436691
申请日：1991-06-26
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： NAKAMURA TORU , ONOUCHI YUKIHIRO , SHIBA TAKEO , TAMAOKI YOICHI , NANBA MITSUO , WASHIO KATSUYOSHI , SHIMAMOTO HIROMI , TANABE MASAMICHI , HONMA NORIYUKI
IPC分类号： H01L27/06 , H01L21/331 , H01L21/8222 , H01L21/8249 , H01L27/082 , H01L29/73 , H01L29/732
摘要： PURPOSE:To provide a transistor structure capable of ultrahigh speed operation while preventing malfunctions such as soft errors so as to improve the reliability of ULSIs and large computers. CONSTITUTION:A transistor composed of a first region (101), a second region (102), and a third region (103) has at least one silicon part including an intrinsic region. The silicon part is bent in a plane or cross section. Therefore, the transistor having the bent structure is irradiated only at a small part with alpha-rays that tend to advance straight. The charge produced by a-ray irradiation is smaller as compared with the transistor's capacitance, and thus it is possible to prevent malfunction and realize ultrahigh speed operation.

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