专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2001195555A IC CARD AND MICROCOMPUTER 失效
公开(公告)号：JP2001195555A
公开(公告)日：2001-07-19
申请号：JP2000003297
申请日：2000-01-12
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： TERAUCHI CHIAKI , NAKADA KUNIHIKO , TSUKAMOTO TAKU , WATASE HIROSHI
IPC分类号： G06F12/14 , G06F21/24 , G06K19/07 , G09C1/00
摘要： PROBLEM TO BE SOLVED: To provide an IC card and a microcomputer, for which the strengthening of secrecy protection is realized. SOLUTION: Concerning the IC card or microcomputer in module configuration provided with the input/output operation of data accompanied with enciphering or deciphering processing by an arithmetic unit for cipher processing to be operated by supplying an operating voltage by electrically connecting an external terminal with a reader/writer and receiving an instruction from a central processing unit, the arithmetic unit for cipher processing is provided with a register for storing data to be used for operation for enciphering or deciphering processing for the unit of plural bits and before enciphering or deciphering processing, the required data are fetched into such a register.

2. 发明专利

JP2001005731A INFORMATION PROCESSOR, CARD MEMBER, AND INFORMATION PROCESSING SYSTEM 失效
公开(公告)号：JP2001005731A
公开(公告)日：2001-01-12
申请号：JP17875099
申请日：1999-06-24
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , OKI MASARU , TSUKAMOTO TAKU , WATASE HIROSHI , TERAUCHI CHIAKI , NAKADA KUNIHIKO , NAGASAKI NOBUTAKA , TAIRA SATOSHI , NARIYOSHI YUICHIRO , FUKUZAWA YASUKO
IPC分类号： G06F12/14 , G06F15/16 , G06F21/62 , G06F21/75 , G06F21/86 , G06K19/063 , G06K19/073 , G07F7/10 , G09C1/00 , H04L9/10
摘要： PROBLEM TO BE SOLVED: To obtain high security by providing a signal line connected to an information processor, and consuming electric power differently from a power consumption state of electric power by a signal line transmitting signals from the information processor. SOLUTION: When 1st data 1 is sent, a signal line 0113 is charged and at this time, the same data 1 is inputted to a stationary consumed power generating device C0114. A latch circuit 0111 of the power generating device C0114 inputs the held data 1 in a capacitor 0110 to an exclusive OR operation device 0104, which therefore outputs 0. This value is inputted to an inverter 0105, which outputs a value 1. The value 1 outputted by the inverter 0105 is inputted to an NMOS gate 0108, which is electrified to discharge the capacitor 0111. Consequently, the total power consumption of the signal line 0113 and capacitor 0111 is equal to that when one signal line is charged.

3. 发明专利

JP2001266103A IC CARD AND MICROCOMPUTER 失效
公开(公告)号：JP2001266103A
公开(公告)日：2001-09-28
申请号：JP2000323178
申请日：2000-10-23
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： TANIMOTO CHIAKI , NAKADA KUNIHIKO , NARIYOSHI YUICHIRO , TSUKAMOTO TAKU , HIRABAYASHI SHIGEO , WATASE HIROSHI , TAKAHASHI MASAAKI
IPC分类号： G06K19/073 , G06F9/30 , G06F9/38 , G06F15/78 , G06F21/06 , G09C1/00
摘要： PROBLEM TO BE SOLVED: To provide an IC card and a microcomputer, which reinforce security and speed up and reinforce a signal processing for security. SOLUTION: In an IC card, an operation voltage is supplied by the electrical connection of an outer terminal with a read/write device and the input/output operation of data with a ciphering processing and a decoding processing is performed. A dummy processing operation aiming at disturbance is included in the ciphering processing or the decoding processing and the operation timing and the operation current of an inner circuit are unified. In the microcomputer of module constitution, which includes the input/output operation of data with the ciphering processing or the decoding processing, the dummy processing operation aiming at disturbance is included in the ciphering processing or the decoding processing and the operation timing and the operation current of the inner circuit are unified.

4. 发明专利

JP2000259799A IC CARD AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2000259799A
公开(公告)日：2000-09-22
申请号：JP6156199
申请日：1999-03-09
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： WATASE HIROSHI , NAGASAKI NOBUTAKA , TSUKAMOTO TAKU , TAIRA SATOSHI , TAKAHASHI MASAAKI , NAKADA KUNIHIKO , TERAUCHI CHIAKI , OKI MASARU , KAMINAGA MASAHIRO
IPC分类号： G06K19/07 , G06F12/14 , G06F15/78 , G09C1/00 , H01L27/10
摘要： PROBLEM TO BE SOLVED: To provide an IC card and a semiconductor integrated circuit device realizing the enhancement of security. SOLUTION: In the IC card or semiconductor integrated circuit device which includes a data processor and a ROM where data processing procedures including security information processing by such a data processor are written and to which an operation voltage is applied by such a manner that an external terminal is electrically connected to an external device such as a reader-writer and in which a data processing operation following the data processing procedures is performed, the security is obtained by making it substantially impossible to perform data dependence analysis such as to compare a current waveform on the time base because the procedure and timing for cipher processing change every time and a consumption current waveform in the case of being seen from a time base change by providing a means that makes the timing of the data processing procedures change.

5. 发明专利

JPH06274341A MICROCOMPUTER 失效
公开(公告)号：JPH06274341A
公开(公告)日：1994-09-30
申请号：JP8273693
申请日：1993-03-17
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： WATASE HIROSHI , KUBO MITSUYUKI , MIURA MASAHARU , KUROIWA TAKASHI , NEGISHI SEIICHI , TAKAKUBO KATSUHARU , HASHIMOTO KOJI
IPC分类号： G06F9/38
摘要： PURPOSE:To provide a technique for relieving the decrease of instruction look- ahead efficiency, which transitionally occurs when a program is branched. CONSTITUTION:A branch destination instruction part 7 which can hold the execution history of a branch instruction, a branch destination address part 8, an address association part 6 monitoring an instruction look-ahead address and a pre-fetch address generation part 2 generating an address for next look- ahead based on execution history when the instruction look-ahead address hits the execution history of the branch instruction are Provided. The decrease of instruction look-ahead efficiency is relieved by predicting branching.

6. 发明专利

JP2004259287A Information processor, card member, and information processing system 审中-公开
公开(公告)号：JP2004259287A
公开(公告)日：2004-09-16
申请号：JP2004055853
申请日：2004-03-01
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , OKI MASARU , TSUKAMOTO TAKU , WATASE HIROSHI , TERAUCHI CHIAKI , NAKADA KUNIHIKO , NAGASAKI NOBUTAKA , TAIRA SATOSHI , NARIYOSHI YUICHIRO , FUKUZAWA YASUKO
IPC分类号： G06F1/26 , G06F3/06 , G06F3/08 , G06F12/14 , G06F21/06 , G06F21/24 , G06K19/073
CPC分类号： Y02D10/13
摘要： PROBLEM TO BE SOLVED: To provide a card member and a card system having high security. SOLUTION: This information processor is allowed to consume, in response to a power consumption state in a signal line for transmitting a signal from the information processor, power separated from the power consumption state. Another embodiment has at least the information processor, and a signal line connected to the information processor and can encrypt a signal from the information processor between the information processor and the signal line; and the information processor can decrypt the signal encrypted and transmitted from the signal line. A still another embodiment has at least the information processor, an information storage device and a signal line connected to at least the information processor; storage of information at least into the information storage device is carried out by encrypting the information to be stored; and the information processor can decrypt the information stored in the information storage device. COPYRIGHT: (C)2004,JPO&NCIPI

7. 发明专利

JPH02214938A DATA PROCESSOR 失效
公开(公告)号：JPH02214938A
公开(公告)日：1990-08-27
申请号：JP3561989
申请日：1989-02-15
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： WATASE HIROSHI , KAWASAKI SHUNPEI
IPC分类号： G06F9/34
摘要： PURPOSE:To effectively use a stack area by comparing the value of a stack pointer with that of a limit pointer to detect the overflow of the stack area and changing the control procedures set for storage of a state. CONSTITUTION:The overflow of a stack area is detected by a comparator 30 when the coincidence is obtained between the value of a stack pointer 23 which points the place of the latest information written into a stack area set to a register file 6 and the value of a limit pointer 24 which points the limit address of the stack area. A microaddress controller 43 of a control part 4 selects the head address of a series of microinstruction systems set to save the information on the stack area into an external memory in the prescribed timing and gives the head address to a microaddress decoder 41. Thus the switch control is given to the control procedure set for storage of a state based on the detection of the overflow of the stack area. As a result, the stack area is effectively used up to its overflow state.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式