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1. 发明专利

JPH07298193A DISK DEVICE 失效
公开(公告)号：JPH07298193A
公开(公告)日：1995-11-10
申请号：JP9102794
申请日：1994-04-28
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： OGAWA HITOSHI , HOCCHI YASUO , NISHINA MASATOSHI
IPC分类号： H04N5/92 , G11B20/10
摘要： PURPOSE:To provide high-speed transfer without thickening any wire by providing an analog video output interface at the disk device. CONSTITUTION:Data are extracted from a disk medium 2 to an R/W control circuit 3. The circuit 3 demodulates the data to digital data and transfers them to a disk controller HDC 4. The data read out to the HDC 4 are buffered in a memory 5. The data buffered in the memory 5 are transferred through the HDC 4 and a bus 19 to a digital/analog converter DAC 10. The DAC 10 modulates the transferred digital data to analog data and transfers them to an output connector 12. On the other hand, a synchronizing circuit 7 generates a synchronizing signal 23 for displaying video data and outputs it to the connector 12. The synchronizing signal 23 and the analog data are transferred through the connector 12, cable 28 and input connector 13 to a host 15.

2. 发明专利

JPH07325667A DATA TRANSFER SYSTEM AND DISK CONTROL LSI 失效
公开(公告)号：JPH07325667A
公开(公告)日：1995-12-12
申请号：JP11981694
申请日：1994-06-01
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： OGAWA HITOSHI , NOGIWA TOYOAKI , NISHINA MASATOSHI , FUJII YOSHIKATSU , MIYAZAWA SHOICHI
IPC分类号： G06F13/36 , G06F3/06 , G11B20/10
摘要： PURPOSE:To make it possible to set the width of a transfer bus performing the data transfer between the disk control LSI and the signal processing LSI of a disk device to an arbitrary optimum bit width according to transfer speed. CONSTITUTION:A disk control LSI 10 and a signal processing LSI 20 are provided with counters 43 and 44, data width conversion circuits 41 and 42 and synchronizing detections 45. The counters 43 and 44 count the numbers of transferred bits, delimit data every time the numbers reach prescribed numbers of bits and impart the numbers of transfer surplus bits to the data width conversion circuits 41 and 42. The data width conversion circuits 41 and 42 convert the transfer widths of the input and output of transfer data by storing transfer data by a storage means storing the data as temporary storage data and selecting data lines by selection circuits having plural selecting methods. The synchronizing detections 45 detect the start location of transfer data and perform the settings of the counters 43 and 44. As a result, the numbers of pin of the disk control LSI and the signal processing LSI are reduced and the wiring amount of a device substrate is decreased.

3. 发明专利

JPH08278849A DATA TRANSFER DEVICE 失效
公开(公告)号：JPH08278849A
公开(公告)日：1996-10-22
申请号：JP8225795
申请日：1995-04-07
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： OGAWA HITOSHI , HOCCHI YASUO , YAMAMOTO KATSUMI , NISHINA MASATOSHI
IPC分类号： G06F3/06
摘要： PURPOSE: To simplify a circuit and to accelerate a processing by converting data read from a data sector to an ECC symbol length and giving access to a memory by byte alliance with dummy data supplemented. CONSTITUTION: A buffer transfer circuit 1 is constituted of a buffer interface 2, an ECC generation error detection and correction circuit 3, a drive sequencer 4, a buffer drive data transfer part 5 and a buffer host data transfer part 6, etc. Then, a conversion circuit for converting byte alliance data to the bus width of the ECC symbol length data-shifts inputted transfer data continuing at a byte boundary and converts them to the bus width of the ECC symbol length and the conversion circuit for converting the data of the bus width of the ECC symbol length to the byte alliance data data-shifts the inputted transfer data continuing at an ECC symbol boundary and converts them to the bus width of the byte alliance. Then, a buffer memory is given access by the byte alliance.

4. 发明专利

JPH0894712A REDUNDANCY CIRCUIT SYSTEM 失效
公开(公告)号：JPH0894712A
公开(公告)日：1996-04-12
申请号：JP22922094
申请日：1994-09-26
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： OGAWA HITOSHI , HOCCHI YASUO , NISHINA MASATOSHI
IPC分类号： G01R31/28 , G06F11/16 , G06F11/22 , G06F15/78
摘要： PURPOSE: To improve the reliability of an LSI without increasing the circuit scale of the LSI by provided a means for selecting an internal signal according to the instruction of an external CPU in a mode other than a test mode and enabling an external CPU to consecutively making comparison with verification data. CONSTITUTION: First, an external CPU accesses a normal region and activates a gate array 101. Then, the test region of an array map is accessed to verify the operation of the gate array 101. A read signal 73 is outputted to a control bus 173 by making selecting with a scan address bus 171 for output FF153-154 of combination logic which a user tries to verify. Then, an external CPU specifies a timing and outputs the operation result of a combination circuit to a scan data bus 172. Then, the result is compared with an expectation value outside the LSI for verification and this procedure is repeated for verifying operation.

5. 发明专利

JP2004030771A Recording and reproducing device 有权
公开(公告)号：JP2004030771A
公开(公告)日：2004-01-29
申请号：JP2002184836
申请日：2002-06-25
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OGAWA HITOSHI , DOMYO SEIICHI , HIRATSUKA YUKIE
IPC分类号： G11B20/12 , G11B20/10 , G11B20/18 , G11B27/00 , G11B27/02 , G11B27/034 , G11B27/10 , G11B27/32
CPC分类号： G11B20/1883 , G11B27/105 , G11B27/329 , G11B2020/1896 , G11B2220/20 , G11B2220/216
摘要： PROBLEM TO BE SOLVED: To provide a disk device being suitable for recording and reproducing of data continued in time series such as AV data. SOLUTION: When data received as data to be written in a recording medium is audio data and/or video data (hereinafter written as AV data), address information 403c specifying the head sector at which the data is written in the recording medium is registered to file control information 402. Also, it is judged whether AV data have contents continued to the AV data written in the previous time or not, when it is continued, the head sector is not registered to a control information storing means. Thereby, continued data can be treated as batch data. COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2003208761A DISK DRIVE 审中-公开
公开(公告)号：JP2003208761A
公开(公告)日：2003-07-25
申请号：JP2002003622
申请日：2002-01-10
申请人： HITACHI LTD
发明人： OGAWA HITOSHI , HIRAI TATSUYA , DOMYO SEIICHI
IPC分类号： G11B5/09 , G11B20/10 , G11B20/12
摘要： PROBLEM TO BE SOLVED: To contrive the improvement of performance of a disk drive by producing a data sector number while minimizing the moving time of a head. SOLUTION: For the sector that it is decided to be going to become the defective sector soon by that the number of error correcting times is increased, the sector information is assigned to the exchanging sector by the skip process, and also the defective sector is continued to use as long as it is corrected. Also, when the write is requested to the defective sector, the defective section is replaced with the slip process so as to store in the skip part by the number of sectors counted from the rear equal to the number of slips of the write sector, and the replacement of the exchanging sector at generation of the defective sector is realized in the manner of preventing the increase of the data access time by the skip process. Thus, the read performance at read is improved and the moving amount of the head to the skip part at write is reduced. COPYRIGHT: (C)2003,JPO

7. 发明专利

JP2003173294A DISK DEVICE 审中-公开
公开(公告)号：JP2003173294A
公开(公告)日：2003-06-20
申请号：JP2001373518
申请日：2001-12-07
申请人： HITACHI LTD
发明人： HIRATSUKA YUKIE , OGAWA HITOSHI , NISHIKAWA MANABU
IPC分类号： G06F12/08 , G06F3/06
摘要： PROBLEM TO BE SOLVED: To increase the efficiency of using a cache to enhance its hit rate by controlling the way of prefetching so that data from the same area on a disk will not exist in the cache at the same time. SOLUTION: When prefetching is started or continued while the range of prefetching is limited, a cache data management table is used to check whether data in the range to be prefetched exists on the cache; if data within the range to be prefetched is determined to exist on the cache as effective data, and if it is determined that the data existing on the cache will not be overwritten even when untransferred data in the range to be prefetched is transferred to the cache, then the read gate of a disk formatter is controlled for opening or closing to prevent the transferred data in the range to be prefetched from being transferred to the cache. COPYRIGHT: (C)2003,JPO

8. 发明专利

JPH10334620A RECORDING MEDIUM REPRODUCING APPARATUS, RECORDING MEDIUM RECORDING/REPRODUCING APPARATUS, RECORDING MEDIUM WRITING APPARATUS, ERROR CORRECTING CIRCUIT, ERROR CORRECTING CODE GENERATING METHOD, DATA TRANSFER ERROR CORRECTING METHOD, STORAGE MEDIUM AND RECORDING MEDIUM 失效
公开(公告)号：JPH10334620A
公开(公告)日：1998-12-18
申请号：JP14414897
申请日：1997-06-02
申请人： HITACHI LTD
发明人： NAKAI KOSUKE , NISHITANI TAKUJI , ISONO SOICHI , OGAWA HITOSHI , YAMAMOTO KATSUMI , NISHINA MASATOSHI
IPC分类号： G11B20/12 , G11B20/18
摘要： PROBLEM TO BE SOLVED: To enhance the detecting performance for error correction caused by ECC circuit without lowering recording capacity of user data to enable the transfer of highly reliable user data by generating an error code by adding predetermined dummy bit for each symbol of the predetermined number of bits. SOLUTION: A user data transmitted from a host is divided to the predetermined blocks of every eight bits, a dummy bit of two bits is added to the higher position of respective byte data to form the 10-bit symbol and the ECC parity is calculated depending on the Reed-Solomon code generating method. To an ECC circuit 30, data from the host and data read from the magnetic disk 10 are input. Since it is no longer required to record the CRC check byte, the user data can be recorded on the magnetic disk 10 and thereby error correcting data capacity can be increased and detecting capability for error detection can be enhance.

9. 发明专利

JPH09330562A DISC DEVICE 失效
公开(公告)号：JPH09330562A
公开(公告)日：1997-12-22
申请号：JP14890296
申请日：1996-06-11
申请人： HITACHI LTD
发明人： TSUNODA MOTOYASU , MIYAZAWA SHOICHI , OGAWA HITOSHI , HOTTA RYUTARO , NARA TAKASHI , NISHINA MASATOSHI
IPC分类号： G11B20/10
摘要： PROBLEM TO BE SOLVED: To lower cost by a method wherein an A/D conversion of a servo signal is performed by a signal processor and the resulting data is sent to a data processing section using a data bus for holding to prevent increase in the number of terminals of the signal processor. SOLUTION: A servo control section 4 outputs a servo gate, a discharge signal and a charge signal to a signal processor 12. The discharge signal is used to initialize an analog value of each Aout 38 to be outputted from a burst signal detecting section 22. The charge signal is used to output burst information to be detected on each POS to each Aout 38. The Aout 38 is converted to a burst data 81 of a digital value by an A/D conversion circuit 24 to be outputted to MPXA57A. The selected burst data 81 is sent to a drive I/F control section 6 through an NRZ data bus 82. Data on the bus 82 contain the data 81 and a lead data in time division. The control section 6 takes in the data 81 to be held by a burst register 25.

10. 发明专利

JPH09128152A DISK CONTROLLER 失效
公开(公告)号：JPH09128152A
公开(公告)日：1997-05-16
申请号：JP28130095
申请日：1995-10-30
申请人： HITACHI LTD
发明人： TAKAHASHI HIDETO , TSUNODA MOTOYASU , OGAWA HITOSHI , MIYAZAWA SHOICHI , NISHINA MASATOSHI , YAMAMOTO KATSUMI
IPC分类号： G06F3/06 , G11B27/10
摘要： PROBLEM TO BE SOLVED: To prevent the destruction of user data and the transfer of error data, and to improve the reliability of the disk controller and a system. SOLUTION: The controller is provided with a function for detecting an index pulse/sector pulse during the processing of a specified sector. The pulse is regarded as a misgenerated pulse, the processing of a succeeding sector is stopped and a CPU 101 is interrupted to inform of the misgeneration of the index pulse/sector pulse. The controller is also provided with a function for detecting whether the index pulse/sector pulse of a sector specified by a host computer is misgenerated or not.

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