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    • 3. 发明专利
    • Apparatus and method for semiconductor device testing and semiconductor device manufacturing method
    • 半导体器件测试和半导体器件制造方法的装置和方法
    • JP2005166856A
    • 2005-06-23
    • JP2003402422
    • 2003-12-02
    • Hitachi Ltd株式会社日立製作所
    • MATSUO MITSUHISAMATSUNAGA TOSHIHIROTANAKA TAMOTSU
    • H01L23/12H01L21/60
    • PROBLEM TO BE SOLVED: To provide a method for testing a semiconductor device for strength against impact, wherein quantification is easy and loss due to friction drag or the like is low.
      SOLUTION: The semiconductor device testing apparatus wherein an impact is applied to a part of a specimen semiconductor device for testing the part for strength, comprises a stage for fixing immovable the specimen in the vertical direction as the direction of impact application, a piston movable in the direction of impact application with one of its ends in contact with the part of the specimen to be tested, and a plummet that freely falls in the direction of impact application for colliding with the other end of the piston. By using this method, friction drag is reduced because impact is applied to the specimen by a freely falling plummet, and because the impact of the plummet is applied to the specimen through a piston one of whose end is in contact with the specimen.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种用于测试抗冲击强度的半导体器件的方法,其中量化容易并且由于摩擦阻力等而导致的损耗低。 解决方案:将冲击施加到用于强度测试的部件的试样半导体器件的一部分的半导体器件测试装置包括用于沿垂直方向固定试样的冲击应用方向的台, 活塞可沿着冲击施加的方向移动,其一端与被测试样品的一部分接触,以及一个自动落在冲击施加方向上以与活塞另一端碰撞的倾斜器。 通过使用这种方法,由于通过自由下落的对接头对样品施加冲击,并且由于通过其端部与试样接触的活塞将试样施加到试样上,因此摩擦阻力减小。 版权所有(C)2005,JPO&NCIPI
    • 10. 发明专利
    • SEMICONDUCTOR PACKAGE
    • JPH0445564A
    • 1992-02-14
    • JP15280390
    • 1990-06-13
    • HITACHI LTD
    • MIWA TAKASHISHIRAI MASAYUKIMATSUNAGA TOSHIHIRO
    • H01L23/36
    • PURPOSE:To adjust the height of a semiconductor chip and also keep enough conductivity and relax stress by arranging a heat conductor between a heat radiating plate and a semiconductor chip, and letting the surplus of a binder in joining move to a binder escape. CONSTITUTION:High heat-conductive conductors 4, which have escapes for a binder and have functions of adjusting the height of a chip 2 to the height of a base 3, are arranged on the region for mounting a semiconductor 2 of a heat radiating plate 1. The chip 2 is placed on spherical heat conductors 4, and the binder 5 is dried while pressing down the semiconductor chip 2 as in this condition. When joining heat conductors 4 to a heat radiating plate 1, a binder 5 permeates into the under space between heat conductors 4, and the heat conductors 4 joins in point contact with the heat radiating plate 1 without causing the floating-up. Furthermore, as regards the joining between the heat conductors 4 and the chip 2, the binder 5 permeates into the upper space between the heat conductors 4. Hereby, the chip 2 is joined in point contact condition with the spherical heat conductors 4, without causing floating-up.