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1. 发明专利

JPH01211170A POS TERMINAL EQUIPMENT 失效
公开(公告)号：JPH01211170A
公开(公告)日：1989-08-24
申请号：JP3688388
申请日：1988-02-19
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： ISHIKAWA TORU , TAKAHASHI TORU , SHIBATA YOSUKE , YOSHIDA KATSUMI
IPC分类号： G07G1/12 , G06K17/00
摘要： PURPOSE:To simplify register business by setting a value, whose fraction is dropped or raised, at a claimed amount, and writing the dropped or raised fraction amount into a recording medium as the residual fraction amount of a next transaction. CONSTITUTION:Before the start of the commodity registration of a customer, by reading a magnetic card 30 possessed by the customer, a residual fraction amount 32 (X) recorded on the card 30 i set at a last residual fraction amount buffer 23. At the time of the completion of the commodity registration, the total amount (Y) of purchased commodities is set at a purchased total amount buffer 24. Here, the residual fraction amount X is subtracted from the purchased total amount Y, and its result (Z) is set at a temporary buffer 25. Next, according to the number of fraction digits set at a fraction digit number presetting area 26 beforehand, the value Z of the fraction amount is raised, its result is set at a claimed amount buffer 21 as a claimed amount (P), and a raised fraction amount (Q) is set at a present residual fraction amount buffer 22. Further, the fraction amount Q is written on the card 30.

2. 发明专利

JPH02130698A POS TERMINAL EQUIPMENT 失效
公开(公告)号：JPH02130698A
公开(公告)日：1990-05-18
申请号：JP28368888
申请日：1988-11-11
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： SAITO TAKESHI , YOSHIDA KATSUMI , SHIMANUKI IKUO , SATO KOICHI , TAKAGI SHIGENORI
IPC分类号： G07G1/12 , G07G1/00 , G07G1/14 , G07G3/00
摘要： PURPOSE:To prevent the image of a shop to be brought down by providing a timer mechanism, executing the check of date data in a commodity code when data are inputted and warning that the limit of effectivity is close. CONSTITUTION:When the commodity code is inputted from an input part 1, the code is written to an input area code 51. Next, a date data control information table 56 is searched by the head two digits of the commodity code and it is investigated whether the inputted commodity code includes the date data or not. When the date data are included, the part of the date data is taken out of the commodity code of the area 51 and written to an input date data area 52. A value, for which the value of delivery limit days to correspond to the head two digits of the commodity code is added to these date data, is written to a delivery limit data area 54. The value of a timer mechanism 4 is compared with the value of the area 54. Then, when the limit of the effectivity is close, a warning part 2 outputs a warning and executes processing to prevent the image-down of the shop.

3. 发明专利

JP2013182360A Hot line insertion/extraction device and hot line insertion/extraction method 有权
标题翻译：热线插入/提取装置和热线插入/提取方法
公开(公告)号：JP2013182360A
公开(公告)日：2013-09-12
申请号：JP2012044956
申请日：2012-03-01
申请人： Hitachi Ltd , 株式会社日立製作所 , Hitachi Information & Control Solutions Ltd , 株式会社日立情報制御ソリューションズ
发明人： ARIMA TOSHIHIRO , YOSHIDA KATSUMI , KUMAKURA KIKUYA , NAGAYAMA HISAO , NAGASHIMA HIRONORI
IPC分类号： G06F3/00
摘要： PROBLEM TO BE SOLVED: To prevent an input/output operation from being started in an incomplete connection state after the insertion of a hot line.SOLUTION: A hot line insertion/extraction device 1 controls the execution or stop of the input/output operation of information in the case of attaching/detaching a process input/output device 50 in a control system 100. Concretely, the hot line insertion/extraction device 1 includes: a switching part 11 for hot line insertion/extraction for switching the signal level of a switching part signal 142 by accepting the operation of a user; a reset part 12 for switching the signal level of a reset part signal 145 after the lapse of a predetermined time after the insertion of a hot line; an arithmetic part 14 for acquiring and calculating the signal level of the switching part signal 142 and the signal level of the reset part signal 145, and for outputting a hot line insertion/extraction signal 147 and a reset signal 148; and an input/output control part 13 for controlling the execution or stop of the input/output operation of information on the basis of the combination of the signal levels of the hot line insertion/extraction signal 147 and the reset signal 148.
摘要翻译：要解决的问题：在插入热线之后，防止输入/输出操作在不完全连接状态下启动。解决方案：热线插入/拔出装置1控制输入/输出操作的执行或停止具体地，热线插入/拔出装置1包括：用于热线插入/提取的切换部分11，用于切换信号电平的信号电平通过接受用户的操作来切换部分信号142; 复位部分12，用于在插入热线之后经过预定时间之后切换复位部分信号145的信号电平; 用于获取和计算切换部分信号142的信号电平和复位部分信号145的信号电平，并输出热线插入/提取信号147和复位信号148的算术部分14; 以及输入/输出控制部分13，用于基于热线插入/提取信号147和复位信号148的信号电平的组合来控制信息的输入/输出操作的执行或停止。

4. 发明专利

JP2015022401A 通信制御装置、通信制御方法及び通信制御システム有权
标题翻译：通信控制装置，通信控制方法和通信控制系统
公开(公告)号：JP2015022401A
公开(公告)日：2015-02-02
申请号：JP2013148441
申请日：2013-07-17
申请人：株式会社日立製作所 , Hitachi Ltd
发明人： IMAZAWA TAKAO , OTANI TATSUYUKI , YOSHIDA KATSUMI , TAYAMA HIROYUKI , NAGASHIMA HIRONORI , DOKEN TOMOHIKO
IPC分类号： G05B19/05 , G05B23/02
摘要：【課題】演算装置とプロセス入出力装置との間で伝送される入出力データの伝送単位を最適化する。【解決手段】演算装置1と複数のプロセス入出力装置31との間で互いに非同期にメモリ転写によるデータ伝送を行う通信制御装置2は、入出力データのデータサイズと前記通信制御装置に接続されている機器の構成情報とから前記演算装置とのデータ転送単位となるノードの数を決定するノード数決定部27と、前記演算装置と前記ノードを含む通信フレームを送受信する上流通信制御部21と、複数のプロセス入出力装置と前記入出力データを送受信する下流通信制御部24と、を備え、前記下流通信制御部は、複数のプロセス入力装置から受信した複数の入力データを前記ノード数決定部により決定された数のノードに統合し、前記上流通信制御部は、前記演算装置から受信した前記ノードに含まれる複数の出力データを、対応する複数のプロセス出力装置に展開する。【選択図】図1
摘要翻译：要解决的问题：优化在运算单元和过程输入/输出设备之间传输的输入/输出数据的传输单元。解决方案：通信控制设备2通过存储器传输在运算单元1之间彼此异步地进行数据传输多个处理输入/输出装置31.通信控制装置包括：节点编号确定单元27，根据输入/输出数据和配置的数据大小确定使用算术装置的数据传送单元的节点数与通信控制装置连接的装置的信息; 上行通信控制单元21，向包含运算装置的运算装置发送包含各节点的通信帧; 以及向/从多个处理输入/输出装置发送和接收输入/输出数据的下游通信控制单元24。下游通信控制单元将从多个处理输入设备接收的多条输入数据合并到由节点号确定单元确定的节点中。上游通信控制单元将包括在从运算单元接收的节点中的多个输出数据扩展到多个对应的处理输出设备。

5. 发明专利

JP2010212808A Device and method for diagnosis of fault in multi-channel analog input output circuit 有权
标题翻译：用于诊断多通道模拟输入输出电路故障的装置和方法
公开(公告)号：JP2010212808A
公开(公告)日：2010-09-24
申请号：JP2009054194
申请日：2009-03-06
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TERAE NAO , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , YOSHIDA KATSUMI , NISHIOKA ATSUSHI , KIYOFUJI YASUHIRO , KASAHARA TAKENORI , NAGAYAMA SHUICHI , KAWAKAZU FUJIYA , KUBOTA MANABU , OTANI TATSUYUKI , TANAKA HIDECHIYO
IPC分类号： H03K17/00 , G01R31/316 , H03M1/10
CPC分类号： G05B19/0425 , G05B2219/21137 , G05B2219/24069 , G05B2219/25435
摘要： PROBLEM TO BE SOLVED: To provide a device and method for diagnosis of a fault capable of simultaneously detecting the fault of a multiplexer used for a multi-channel analog input-output circuit and the fault of an A/D converter, and classifying the causes of the faults.
SOLUTION: A diagnosis voltage input unit inputs test voltage values different per channel of a multiplexer to the multiplexer having a plurality of channels configuring an analog signal conversion unit and to the A/D converter for converting the output of the multiplexer into a digital signal. Then, a digital voltage value output per channel is compared with the input test voltage value to determine whether a fault is in the multiplexer or the A/D converter on the basis of results of comparison.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供用于诊断能够同时检测用于多通道模拟输入 - 输出电路的多路复用器的故障和A / D转换器的故障的故障的装置和方法，以及分类故障原因。解决方案：诊断电压输入单元将具有多路复用器的每个通道不同的测试电压值输入到具有构成模拟信号转换单元的多个通道的复用器和用于将多路复用器的输出转换成A / 数字信号。然后，将每个通道的数字电压值输出与输入的测试电压值进行比较，以根据比较结果确定故障是在多路复用器还是A / D转换器中。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2012128610A Control system and node address setting method of control system 有权
标题翻译：控制系统和节点地址设置方法
公开(公告)号：JP2012128610A
公开(公告)日：2012-07-05
申请号：JP2010278740
申请日：2010-12-15
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ARIMA TOSHIHIRO , OHASHI AKIHIRO , SHIRAISHI MASAHIRO , YOSHIDA KATSUMI , OTANI TATSUYUKI , KOBAYASHI EIJI
IPC分类号： G05B9/03 , G06F13/00
CPC分类号： Y02P90/02
摘要： PROBLEM TO BE SOLVED: To provide a duplex control system capable of dealing with unsatisfaction such as erroneous address setting without increasing man-hour for setting in setting a node address.SOLUTION: A control system is provided which includes an arithmetic unit which outputs a control instruction, a plurality of input/output device each of which receives the control instruction and outputs it to a control object, and a duplexed relay device which relays the control instruction and outputs it to the input/output device. The relay device includes a high-order address setting section which outputs high-order address information to the input/output device. Each of the input/output devices includes a high-address comparison section which compares the received high-address information, a high-order address setting section which selects the high-order address information on the basis of a result of the comparison, and a line control section which sets a node address by combining the selected high-order address and low-order address information determined in the input/output device itself.
摘要翻译：要解决的问题：提供能够处理不满意的双工控制系统，例如错误的地址设置，而不增加设置节点地址的设置时间。解决方案：提供了一种控制系统，其包括输出控制指令的运算单元，多个输入/输出装置，每个输入/输出装置接收控制指令并将其输出到控制对象;以及双工继电器控制指令并将其输出到输入/输出设备。中继装置包括向输入/输出装置输出高阶地址信息的高阶地址设定部。每个输入/输出设备包括：高地址比较部分，用于比较接收到的高地址信息;基于比较结果选择高阶地址信息的高阶地址设置部分和线路控制部分，其通过组合在输入/输出设备本身中确定的所选择的高阶地址和低阶地址信息来设置节点地址。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2008015901A Access control method for external storage device, and controller, host system or external storage device performing access control method 有权
标题翻译：用于外部存储设备的访问控制方法和控制器，主机系统或执行访问控制方法的外部存储设备
公开(公告)号：JP2008015901A
公开(公告)日：2008-01-24
申请号：JP2006188151
申请日：2006-07-07
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： YOSHIDA KATSUMI , NAKANO YOSHIHIRO , FUKUMARU HIROAKI , HIUGA KAZUHIRO , SUZUKI MASAHIRO
IPC分类号： G06F3/06
摘要： PROBLEM TO BE SOLVED: To provide an access control method for a controller, capable of enabling error recovery processing of HDD without changing the time-out time of a conventional host. SOLUTION: In the controller 20 including a processing part for attaining various functions by a control program through respective interface parts for accessing the host 10 and the HDD 30, the processing part reports an error to the host (U323) without giving reset instruction to the HDD (U322) when a normal response including completion of error recovery processing is not received from the HDD within the time-out time in accessing the HDD based on an access request from the host, and accesses (U325) the HDD again after giving the reset instruction to the HDD (U324) based on a repeated access request from the host (U311). The error recovery processing (U330) of the HDD is completed during this period. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在不改变常规主机的超时时间的情况下实现HDD的错误恢复处理的控制器的访问控制方法。解决方案：在包括用于通过控制程序通过用于访问主机10和HDD 30的各个接口部分实现各种功能的处理部分的控制器20中，处理部分向主机（U323）报告错误而不给出复位基于来自主机的访问请求在超时时间内从HDD接收到包括完成错误恢复处理的正常响应的指令（U322），并再次访问（U325）HDD 在基于来自主机（U311）的重复访问请求给予HDD（U324）的复位指令之后。在此期间完成HDD的错误恢复处理（U330）。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2012008818A Connection type controller 有权
标题翻译：连接型控制器
公开(公告)号：JP2012008818A
公开(公告)日：2012-01-12
申请号：JP2010144400
申请日：2010-06-25
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SUGIMOTO YUTA , NISHIOKA ATSUSHI , KOBAYASHI EIJI , OHASHI AKIHIRO , YOSHIDA KATSUMI , NAKAMURA SATOSHI , NEMOTO FUMIHIKO
IPC分类号： G05B19/05 , H01R9/00
CPC分类号： G05B19/042 , G05B2219/2203 , G05B2219/2214
摘要： PROBLEM TO BE SOLVED: To solve such a problem that wiring operation man-hours are large after mounting a control equipment on a control panel cabinet in a mounting technique of a controller onto the control panel cabinet, and the wires in the control equipment need to be removed when replacing the control equipment and also rewiring operation is required after replacing the control equipment, which takes many operation man-hours.SOLUTION: There is provided means capable of performing more efficient wiring operations compared to conventional techniques with respect to wiring operations in a control panel by connecting a plurality of base units constructing a controller in a longitudinal direction by a base unit connection connector, and changing how to mount the control equipment on the control panel. The means also allows the controller to be replaced without performing rewiring operations of wires connected to the control equipment when replacing the control equipment.
摘要翻译：要解决的问题为了解决在将控制器的安装技术安装在控制面板机柜上的控制设备安装到控制面板机柜上的接线操作工时大的问题以及控制中的电线在更换控制设备时需要拆除设备，更换控制设备后需要重新布线操作，这需要很多操作工时。解决方案：提供了与传统技术相比，与通过基本单元连接连接器在纵向方向上构造控制器的多个基座单元相关的控制面板中的布线操作，能够执行更有效的布线操作的装置，并改变如何在控制面板上安装控制设备。该装置还允许更换控制器，而不必在更换控制设备时执行连接到控制设备的电线的重新布线操作。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2009272793A Frequency abnormality detecting circuit 有权
标题翻译：频率异常检测电路
公开(公告)号：JP2009272793A
公开(公告)日：2009-11-19
申请号：JP2008120189
申请日：2008-05-02
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YOSHIDA KATSUMI , BANDO AKIRA , OGURA MAKOTO , ISHIKAWA MASAKAZU , KOBAYASHI EIJI , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , UMEHARA TAKASHI , FURUTA YASUYUKI , OTANI TATSUYUKI
IPC分类号： H03K5/19 , G01R23/15 , H03K5/26
摘要： PROBLEM TO BE SOLVED: To solve the problem that a conventional frequency abnormality detecting circuit, in which a monitoring clock uses a frequency higher than that of a clock to be monitored, is expensive, requires a countermeasure against noise, and is difficult to mount on a substrate, and also, a conventional frequency abnormality detecting circuit, in which the monitoring clock uses a frequency lower than that of a clock to be monitored, is not only unable to detect an abnormality depending on timing of clock fixing but requires a separate configuration that prevents a warning from being issued since all register outputs constituting a shift register become "0" during a reset.
SOLUTION: An upper-limit abnormality of a clock frequency is detected by comparing the magnitude of a count value of the number of clocks to be monitored with that of an upper-limit value. A lower-limit abnormality is detected by an output of a logical AND of a positive pulse outputted at a rising edge of synchronized monitoring clocks, an initial edge hold circuit output that outputs "High" by the pulse output, and a comparator output that compares the magnitude of a lower-limit value and that of the count value of the number of clocks to be monitored.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：为了解决监视时钟使用比要监视的时钟频率高的频率的现有的频率异常检测电路的问题，需要对抗噪声的对策，并且是困难的而且，监视时钟使用比要监视的时钟低的频率的常规频率异常检测电路，不仅不能根据时钟固定的定时检测到异常，而且需要由于构成移位寄存器的所有寄存器输出在复位期间变为“0”，因此可以防止发出警告的单独配置。解决方案：通过将要监视的时钟数的计数值与上限值的大小进行比较来检测时钟频率的上限异常。通过在同步监视时钟的上升沿输出的正脉冲的逻辑AND的输出，通过脉冲输出输出“高”的初始边沿保持电路输出和比较器输出比较来检测下限异常下限值的大小以及要监视的时钟数的计数值的大小。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2006331106A Apparatus and method for duplicating rfid tag, rfid tag, management server, method for providing rfid tag duplication information, and method for displaying rfid tag duplication information 有权
标题翻译：用于复制RFID标签，RFID标签，管理服务器，用于提供RFID标签重复信息的方法的装置和方法，以及用于显示RFID标签重复信息的方法
公开(公告)号：JP2006331106A
公开(公告)日：2006-12-07
申请号：JP2005154224
申请日：2005-05-26
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YOSHIDA KATSUMI , MATSUDA KOJI , MIYAO TAKESHI
IPC分类号： G06K17/00 , G06K19/07
摘要： PROBLEM TO BE SOLVED: To provide an RFID tag duplication apparatus capable of identifying an RFID tag to be a duplication source tag and an RFID tag to be a duplicated tag and capable of efficiently duplicating article information. SOLUTION: The RFID duplication apparatus for performing processing for discriminating a written RFID tag and an unwritten RFID tag on the basis of the information of first and second RFID tags stored in a storage part and duplicating article information from the discriminated written RFID tag to the unwritten RFID tag is provided. COPYRIGHT: (C)2007,JPO&INPIT

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