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1. 发明专利

JP2002141121A ANISOTROPIC CONDUCTIVE FILM, SEMICONDUCTOR DEVICE USING THE FILM, AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2002141121A
公开(公告)日：2002-05-17
申请号：JP2000338005
申请日：2000-11-06
申请人： HITACHI LTD , HITACHI CABLE
发明人： FUJITA YUJI , USHIFUSA NOBUYUKI , SHIGI HIDETAKA , HARADA MASAHIDE , NAKAMURA MASATO , YODA TOMOKO , FUJIWARA SHINICHI , YOSHIMI KENJI , YOKOZUKA TAKEHIDE , YOSHIDA TORU , ONDA MAMORU , OKABE NORIO
IPC分类号： H01R11/01 , H01B5/16 , H01B13/00 , H01L21/60 , H01L23/32 , H01R33/76 , H01R43/00 , H05K3/32
摘要： PROBLEM TO BE SOLVED: To provide an anisotropic conductive film capable of stably connecting a semiconductor element to a wiring substrate even if pressure by the application of pressure is varied, and provide a semiconductor device using the anisotropic conductive film and the manufacturing method for the semiconductor device. SOLUTION: A plurality of conducting members 12 are installed on the inside of a film substrate 13 made of an insulating material, and in each conducting member 12, a first electrode 11 formed on a first surface of the film substrate 13 and a second electrode 14 formed on a second surface of the film substrate 13 are electrically connected, and a tapered projection 10 is formed in at least a part of the surface of the electrode 11 and a tapered projection 15 is formed in at least a part of the surfaces of the electrode 14.

2. 发明专利

JPH08288625A METHOD FOR CONNECTING CIRCUIT BOARD AND ELECTRONIC CIRCUIT DEVICE USING IT 失效
公开(公告)号：JPH08288625A
公开(公告)日：1996-11-01
申请号：JP9219295
申请日：1995-04-18
申请人： HITACHI LTD
发明人： YODA TOMOKO , INOUE TAKASHI , SATO RYOHEI , MATSUI KIYOSHI , OTA TOSHIHIKO
IPC分类号： H05K3/32 , H05K3/24 , H05K3/34
摘要： PURPOSE: To prevent the segregation of Pb on the boundary between an electroless-plated Ni-B metallized pad containing Pb and formed on a circuit board and parts by connecting the parts to the metallized pad by forming an Ni-Sn alloy of an Sn-based brazing material. CONSTITUTION: The surface of a conductor substrate is pretreated by soft etching the surface with an alkaline solution, neutralizing the surface with an acid, and activating the surface with a liquid containing a lead compound after degreasing the surface. Then, after an electroless-plated Ni-B film 5 is formed, an electroless-plated Au film 15 is formed and the film 15 is metallized. After the film 15 is metallized, the adhesion between the joined metallic layers 5 and 15 is improved by mutually diffusing the films 5 and 15 to each other. Then I/O pins 17 mounted with Au-20Sn are positioned on the metallic layers formed in the conductor section of the substrate and the pins 17 are heated. Therefore, the segregation of Pb on the boundary between the pins 17 and metallic layer can be prevented, because the Pb can be diffused in the formed intermetallic compound layer.

3. 发明专利

JPH08191126A MANUFACTURE OF CIRCUIT BOARD WITH I/O PIN 失效
公开(公告)号：JPH08191126A
公开(公告)日：1996-07-23
申请号：JP308095
申请日：1995-01-12
申请人： HITACHI LTD
发明人： YODA TOMOKO , INOUE TAKASHI , MATSUI KIYOSHI , ANDO SETSUO , WATABE TAKAYOSHI , OTA TOSHIHIKO
IPC分类号： H01L23/50
摘要： PURPOSE: To reduce the effect of impurities, specially lead, in a reaction metal layer, which cause reduction in the bonding strength of an I/O pin, by a method wherein a surface metal layer is formed on the reaction metal layer, which consists of an electroless Ni plated film formed on the surface of the conductor of a circuit board, and the I/O pin is connected with the circuit board via both metal layers of the reaction metal layer and the surface metal layer. CONSTITUTION: The surface of a conductor 2 of a ceramic circuit board is degreased, an activation treatment is performed and an electroless Ni-B plated film is formed on a a reaction metal layer 5. Then, an electroless Au plated film is formed as a surface metal layer 9 and the layers 5 and 9 are formed into junction metal layers. After this, an inter-diffusion is made to perform between the surface of the conductor 2, the plated film 5 and the plated film 9 by a heat treatment of the board and the adhesion between the junction metal layers is increased. After this heat treatment, an I/O pin 1 mounted previously with an Au-Ge brazing metal 3 is positioned on a metal layer formed on a board conductor part 6 and thereafter, the pin 1 is heated to a junction temperature and the I/O pin formed with an Ni-Ge intermetallic compound film is connected with the board.

4. 发明专利

JP2007051896A Semiconductor radiation detector, radiation detector module, and diagnostic system for nuclear medicine 有权
标题翻译：半导体辐射检测器，辐射检测器模块和核医学诊断系统
公开(公告)号：JP2007051896A
公开(公告)日：2007-03-01
申请号：JP2005236017
申请日：2005-08-16
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIYONO TOMOYUKI , YANAGIDA NORIFUMI , TAKAI TOSHIAKI , YODA TOMOKO , MATSUSHIMA NAOKI
IPC分类号： G01T1/24 , G01T1/161 , G01T7/00 , H01L31/09
CPC分类号： G01T1/2985 , A61B6/037 , G01T1/243 , G01T1/244 , G01T1/249
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor radiation detector, radiation detector module, and a diagnostic system for nuclear medicine that are superior in energy resolution and time accuracy. SOLUTION: The semiconductor radiation detector 21 is characterized in that the plate-like element 211 of cadmium telluride and metallic conductive members 22 and 23 are adhered with a conductive adhesive 21A, and the plate-like element 211 of the cadmium telluride and the conductive members 22 and 23 are laminated, while alternating the conductive members 22 and 23. The longitudinal elastic modulus of the conductive adhesive 21A is 350-1,000 MPa, and the linear expansion coefficient of the conductive members 22 and 23 for the materials in the range of 5×10 -6 /°C to 7×10 -6 /°C. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供能量分辨率和时间精度优异的半导体辐射检测器，辐射检测器模块和用于核医学的诊断系统。解决方案：半导体辐射检测器21的特征在于，碲化镉和金属导电构件22和23的板状元件211用导电粘合剂21A，碲化镉的板状元件211和导电构件22和23被层叠，同时交替导电构件22和23.导电粘合剂21A的纵向弹性模量为350-1,000MPa，导电构件22和23的线膨胀系数用于范围为5×10 -6 /℃至7×10 -6 /℃。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2002335313A MOBILE TELEPHONE AND FIXING METHOD FOR ITS WIRING BOARD 失效
公开(公告)号：JP2002335313A
公开(公告)日：2002-11-22
申请号：JP2001137504
申请日：2001-05-08
申请人： HITACHI LTD
发明人： FUJIWARA SHINICHI , HARADA MASAHIDE , FUJITA YUJI , NAKAMURA MASATO , YODA TOMOKO
IPC分类号： H05K7/14 , H04M1/02
摘要： PROBLEM TO BE SOLVED: To provide a mobile telephone having an increased mount area for components and excellent shock resistance and to provide a fixing method for its wiring board. SOLUTION: The wiring board 10 placed in a case comprising a front case 30 and a rear case 20 which are fixed to each other is fixed in the case by being pressed to a projection 21 formed integrally with a top of a side wall 20b of the rear case 20 via a buffer member 23 by an elastic member 11 provided to the wiring board 10 and whose tip is fitted to a recessed part 22 provided to the rear case 20. Since the wiring board 10 is not screw-fastened to a screw hole, the mount area of the front side of the wiring board 10 is increased, and since the elastic member 11 is fixed to the wiring board 10 and the rear case 20 at its both ends, no positional deviation is caused to the wiring board 10 even when a lateral shock in parallel with the sides of the wiring board 10 is exerted to the wiring board 10.

6. 发明专利

JPH11204926A SOLDERING METHOD AND MANUFACTURE OF ELECTRONIC DEVICE 失效
公开(公告)号：JPH11204926A
公开(公告)日：1999-07-30
申请号：JP239598
申请日：1998-01-08
申请人： HITACHI LTD
发明人： YODA TOMOKO , HARADA MASAHIDE , TAKEHARA HIROKO , IWATA YASUHIRO , SHIRAI MITSUGI , SATO RYOHEI
IPC分类号： B23K1/20 , B23K35/363 , C23G5/032 , H01L21/60 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To perform a soldering operation using no flux even when solder material, having a large Sn content, is used while generation of residue is being prevented. SOLUTION: An oxide film removing composition 3 is applied to the surface of solder material 4, the connection pattern 2 of the substrate 1 to be wired and an electronic component 5, provided with the solder material 4, are tacked through the oxide film removing composition 3, and the entirety of the above- mentioned material is heated up and soldered in this soldering method. An organic compound, having an oxide film removing function and containing an oxide film removing agent and a diluting agent, is used as the above- mentioned oxide film removing composition 3.

7. 发明专利

JP2015053370A 寿命予測機構を備えた基板、およびその製造方法审中-公开
标题翻译：具有生命预测机制的基板及其制造方法
公开(公告)号：JP2015053370A
公开(公告)日：2015-03-19
申请号：JP2013185010
申请日：2013-09-06
申请人：株式会社日立製作所 , Hitachi Ltd
发明人： NAKATSUKA TETSUYA , HATA SHOHEI , YODA TOMOKO , ARAKAWA KATSUHIRO , OKAMOTO MASAHIDE , DIGNA LINAJAYA
IPC分类号： H05K1/11 , H05K3/00 , H05K3/28 , H05K3/34 , H05K3/40
摘要：【課題】実装基板はんだ接続部の寿命が来ることを、電子部品はんだ接続部よりも先に断線して電気的手法により予知する機構を基板に実装する方法を、コストアップや実装の妨げにならない方法で提供する。【解決手段】隣接する複数の電源層(ベタ層)を持つ回路基板に対し、上記電源層が隣接する間隙部分の基板表面にはんだブリッジを形成したり、中央部にソルダレジストを被せ両端をはんだでコーティングした均一幅の橋渡しランドを作りこんで、これらの場所を先に断線させることで寿命予知を行う。【選択図】図1
摘要翻译：要解决的问题：提供一种机构的安装方法，用于通过比电子部件焊点更早断开的电气方式来预测安装板的焊点的寿命将达到的事实，而不会导致成本增加或干扰实现。解决方案：通过在电源层相邻的间隙处，在具有多个相邻电源层（固体层）的电路板上形成在电路板表面上的焊接桥，或形成桥均匀宽度的地面，其中央部分涂有阻焊剂，两端涂有焊料，并且更早地断开这些位置。

8. 发明专利

JP2014229865A プリント配線基板、および電子装置审中-公开
标题翻译：印刷线路板和电子设备
公开(公告)号：JP2014229865A
公开(公告)日：2014-12-08
申请号：JP2013110961
申请日：2013-05-27
申请人：株式会社日立製作所 , Hitachi Ltd
发明人： SHINKAI GO , YODA TOMOKO , OSAKA HIDEKI , UEMATSU YUTAKA
IPC分类号： H05K1/02 , H05K3/46
摘要：【課題】スタブ終端において、低周波における信号の伝送損失を増大させず、高速な信号伝送を実現する。【解決手段】多層配線プリント基板10は、複数の配線層、異なる配線層に形成された信号配線パターン11,16に接続され、信号伝送経路を形成するスルーホール21、多層配線プリント基板10裏面に形成される絶縁体23、および絶縁体23の表面に形成される電気伝導体24を有する。そして、絶縁体23は、配線層に形成された電源/グランド配線パターン20に接続され、スルーホール21のうち、信号伝送経路を形成しないスタブ21aの端面を覆うように形成される。【選択図】図1
摘要翻译：要解决的问题：实现高速信号传输，而不会在短截线终端中增加低频率的信号传输损耗。解决方案：多层布线印刷电路板10包括：连接到信号布线图案11和16的通孔21，形成在多个不同的布线层上形成信号传输路径; 形成在多层布线印刷电路板10的背面上的绝缘体23; 以及形成在绝缘体23的表面上的电导体24.绝缘体23连接到形成在布线层上的电源/接地布线图案20，并且以覆盖未形成的短截线21a的端面的方式形成通孔21之间的信号传输路径。

9. 发明专利

JP2013138169A Bonded substrate and manufacturing method of the same 审中-公开
标题翻译：粘合基板及其制造方法
公开(公告)号：JP2013138169A
公开(公告)日：2013-07-11
申请号：JP2012151288
申请日：2012-07-05
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YODA TOMOKO , KATANO TAKASHI , ONO TAKAYUKI , TASHIRO YOSHIMASA , SEKINO YUICHI , ONO MASAMI , SAKAMOTO TSUTOMU , DOI HIROYUKI , FUJIWARA SHINICHI
IPC分类号： H05K1/14
CPC分类号： H05K1/09 , B23K31/02 , H05K3/325 , H05K3/3478 , H05K3/4623 , H05K2201/0218 , H05K2201/044 , H05K2201/1059 , H05K2203/061
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable and low cost technology in thermocompression gang bonding of substrates.SOLUTION: A bonded substrate manufacturing method comprises a step of bonding printed boards with each other, in which electrodes are connected by solder connection using Cu core solder plating balls, and the substrates are bonded with a three-layer binding material composed of adhesive layer/ball holding core layer/adhesive layer by gang thermocompression of the Cu core solder plating balls filled in holes of the three-layer binding material. The electrodes and the substrates are connected by a flux or a wetted solder.
摘要翻译：要解决的问题：提供一种高可靠性和低成本的基板热压组合粘合技术。解决方案：一种键合衬底的制造方法包括将印刷电路板彼此接合的步骤，其中通过使用Cu芯的焊接连接电极焊料镀覆球，并且通过用三层结合材料的孔中填充的Cu芯焊料镀覆球的组织热压，用由粘合剂层/球保持芯层/粘合剂层组成的三层结合材料粘合基板。电极和基板通过焊剂或润湿焊料连接。

10. 发明专利

JP2007052004A Semiconductor radiation detector, radiation detector module and diagnostic device for nuclear medicine 审中-公开
标题翻译：半导体辐射检测器，辐射检测器模块和核医学诊断装置
公开(公告)号：JP2007052004A
公开(公告)日：2007-03-01
申请号：JP2006189421
申请日：2006-07-10
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KIYONO TOMOYUKI , YANAGIDA NORIFUMI , TAKAI TOSHIAKI , YODA TOMOKO , MATSUSHIMA NAOKI
IPC分类号： G01T1/24 , C09J9/02 , C09J201/00 , G01T1/161 , H01L31/0264 , H01L31/09
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor detector, radiation detector module, and diagnostic device for nuclear medicine that are superior in energy resolution and time precision.
SOLUTION: The semiconductor radiation detector is constituted, such that the platy element 211 of cadmium telluride and metallic conductive members 22 and 23 are adhered with a conductive adhesive 21A, and laminated the plate-like element 211 of cadmium telluride with the conductive members 22 and 23, while alternating the conductive members 22 and 23. The longitudinal elastic modulus of the conductive adhesive 21A are 350-1,000 MPa, and the linear expansion coefficient of the conductive members 22 and 23 are materials in the range of 5×10
-6 /°C to 7×10
-6 /°C. The conductive members are selected from among Fe-Ni alloy, Fe-Ni-Co alloy, Cr and Te, and are respectively arranged between the electrodes of the same kind of the facing plate-like elements 211 of cadmium telluride.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供能量分辨率和时间精度优越的用于核医学的半导体检测器，辐射检测器模块和诊断装置。解决方案：半导体辐射检测器被构造成使得碲化镉和金属导电构件22和23的板状元件211用导电粘合剂21A粘合，并且将碲化镉的板状元件211与导电构件22和23，同时交替导电构件22和23.导电粘合剂21A的纵向弹性模量为350-1,000MPa，并且导电构件22和23的线膨胀系数为5×10 -6 /℃至7×10 -6 /℃。导电构件选自Fe-Ni合金，Fe-Ni-Co合金，Cr和Te中，分别设置在同一种类的碲化镉的面板状元件211的电极之间。版权所有（C）2007，JPO＆INPIT

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