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    • 3. 发明专利
    • SLIP ISSUING SYSTEM
    • JPS6375968A
    • 1988-04-06
    • JP21954086
    • 1986-09-19
    • HITACHI LTD
    • ICHIEDA YOSHIJIHIRAMITSU YUJIARIMOTO MASANOBUHIRANO YUJI
    • B41J13/26G06F3/12G06Q10/10G06Q40/00G06Q40/02G07D9/00G07G5/00
    • PURPOSE:To eliminate the necessity of writing the address and name of a customer on a slip by the customer, by providing a hopper for storing slip forms to a printer and fetching and printing the address and name corresponding to the account number inputted by the customer from a keyboard from an external storage and on the slip. CONSTITUTION:Upon receiving the account number of a customer inputted by the customer from a keyboard 1 by monitoring a display 2, a controller 3 fetches the address and name codes of the customer from a disk 31 by using the account number as a key and outputs the data to a printer 4. The printer 4 takes one sheet out of the slip forms stored in a hopper 41 and prints the address, name, and account number of the customer in accordance with the address and name codes outputted from the controller 3 and delivers the slip form to the customer. The customer writes remaining necessary information, such as paying-in amount, drawing-out amount, transferring amount, transferring destination, etc., in the form delivered from the printer 4 and submits the slip to the window of a bank. Therefore, the necessity of writing his address and the name by a customer is eliminated and the slip preparation becomes simple.
    • 4. 发明专利
    • PRINT CONTROL SYSTEM FOR PRINTER
    • JPS55105741A
    • 1980-08-13
    • JP1336779
    • 1979-02-09
    • HITACHI LTD
    • ICHIEDA YOSHIJIHIRAMITSU YUUJITAKASHIMA HAJIME
    • G06K15/08B41J19/18B41J21/17G06F3/12
    • PURPOSE:To prevent the shift in printing if the read-in position of print head before edit and the head position at the print permission are shifted, by storing the space information at the edit of print information to the memory and controlling the start of print for print information. CONSTITUTION:The value of the position counter 2 before the start of edit of print information is latched to the memory means, and the space information for the number of print positions subtracting the number of print positions from the print head position before edit indicated in the latched value to the character print start position by a given number of print positions, is stored in the memory means, and succeedingly, the character information is stored in the memory means. Further, the value of the position counter 2 and the value latched to the memory means are compared in the comparison circuit 7 to open the gate 4 of the print position pulse at the time when the print head 1 moves to a given print position number from the print head position before edit, and the print of the print information in the memory means is started.
    • 5. 发明专利
    • KEY READING SYSTEM
    • JPS5447430A
    • 1979-04-14
    • JP11271177
    • 1977-09-21
    • HITACHI LTD
    • ICHIEDA YOSHIJI
    • G06F3/02
    • PURPOSE:To reduce the feeling of physical disorder for the operator and thus to ensure a correct reading of the information, by detecting the push and release of the key plus the double push to contol the action of the memory means and thus reading the key information at the time of the key push even in the case of duble push of the key. CONSTITUTION:The signal line groups are divided into signal line bundle 2A and 2B of 8 pieces each in the X and Y directions. With push of a unit of key 1, the signals are delivered to two pieces of signal lines (each of 2A and 2B) which pass through the coordinates of the key. Control circuit 5 detects the push and release plus double push of the key via the signals of 2A and 2B to deliver clear timing CT8 (8A, 8B) and ratch timing LT9. Pre-memory circuit 4A and 4B ratch the signal ppatterns on 2A and 2B when receiving LT9 and clear them thrugh CT8A and 8B. On the other hand, output memory circuit 3A and 3B obtain exclusive logical sum 6A and 6B are obtained between the signal patterns on 2A and 2B at the receiving time of LT9 and the memory contents 4A and 4B right before the corresponding time, and then ratch the result.
    • 7. 发明专利
    • DISPLAY SYSTEM
    • JPS6362031A
    • 1988-03-18
    • JP20705886
    • 1986-09-03
    • HITACHI LTD
    • ARIMOTO MASANOBUICHIEDA YOSHIJIHIRAMITSU YUJI
    • G06F3/153
    • PURPOSE:To prevent malfunctions in a display system without having any complicated timing control such as conflicts of memories, by providing an independent display circuit and a refresh memory to each of plural displays. CONSTITUTION:The display circuits 9 and 10 give repetitive accesses to a refresh memory 11 to read out display data to displays 1 and 2. Then character strings are displayed on the displays 1 and 2 via character generators 13 and 14. When different character strings are displayed on the same line of displays 1 and 2 respectively, the changeover switches 16 and 17 are turned on and off respectively by a control program stored in a memory 7 and one of both character strings is written to the corresponding address of the memory 11. Then the switches 16 and 17 are turned off and on respectively and the other character string is written to the same address of a refresh memory 12. These written character strings are displayed on both displays 1 and 2 respectively.
    • 10. 发明专利
    • MEMORY SYSTEM
    • JPH04296954A
    • 1992-10-21
    • JP6149991
    • 1991-03-26
    • HITACHI LTD
    • ICHIEDA YOSHIJIHODO HIROYUKI
    • G06F1/30G06F12/08G06F12/16
    • PURPOSE:To holds the logging date when a power supply is turned off with addition of the simple hardware and with use of a program by using a cache memory as a back-up memory. CONSTITUTION:When a power supply 9 is turned off, an interruption is applied to a CPU 1 with detection 9.1 of the cut-off of the supply 9. Thus the CPU 1 carries out a power interruption program 5.2 stored in a ROM 5. The program 5.2 reads the address of the logging date 2.2 out of a main memory 2. Then the logging data is stored in a cache memory 6 and the CPU 1 stops its operation. Both the memory 6 and a cache control part 7 are backed up by a battery 8 and therefore the contents of the memory 6 and the part 7 are held even in a power cut-off state. Thus the logging data 2.2 is read out of the memory 6 backed up by the battery 8. As a result, the logging data is backed up without using any exclusive memory to which a logging address is especially allocated.