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    • 7. 发明专利
    • ELECTRONIC CIRCUIT DEVICE
    • JPH03283451A
    • 1991-12-13
    • JP8071390
    • 1990-03-30
    • HITACHI LTD
    • SATO RYOHEIKOBAYASHI FUMIYUKIWATANABE YUTAKANEZU TOSHITADASHIRAI MITSUGITAKEDA KENJIHARADA MASAHIDEMATSUI KIYOSHISASAKI HIDEAKI
    • H01L23/02B23K35/30H01L21/60H01L23/10H01L23/16H01L23/538H01L25/065H05K3/34
    • PURPOSE:To enable an electronic circuit device which requires reliable multilayer connections to be safely and reliably assembled in succession by a method wherein brazing materials possessed of required characteristics and boards are properly combined for assembly. CONSTITUTION:A lead pin 5 is connected to a circuit board 3 with Au13Ge solder (melting point: 356 deg.C). This connecting process is carried out in such a manner that the lead pin 5 is connected to a connection terminal formed on the rear of the circuit board 3 with the Au13Ge solder molten in a belt oven heated at a temperature of 350 deg.C or so. On the other hand, a semiconductor component is CCB-connected 8 to the connection terminal of a circuit board 9 with the molten Pb2Sn solder (melting point; 320 deg.C) heated at a temperature of 350 deg.C or so, and a sealing 18 and a die bonding 10 are carried out at the same time using molten Pb10Sn solder heated at a temperature of 310 deg.C or so. Then, the connection terminal provided to the rear of the circuit board 9 is connected to the surface of the circuit board 3 by a collective CCB connecting method with Sn3Ag solder (melting point; 221 deg.C) molten in a belt oven heated at a temperature of 240 deg.C or so. A frame 11 heated at a temperature of 240 deg.C or so and molten is jointed to a sealing top 12 through a frame connection 13. In succession, a heat conduction relay member 20 is mounted and connected with molten 37Pb solder (melting point: 183 deg.C) heated at a temperature of 200 deg.C or so, and thus an electronic circuit is formed. The pin 5 of the printed wiring board 2 is inserted into the electronic circuit concerned and connected with molten Sn45Pb18Bi by heating.
    • 9. 发明专利
    • CIRCUIT ELEMENT PACKAGE, AND CARRIER BOARD AND MANUFACTURE THEREOF
    • JPH02148862A
    • 1990-06-07
    • JP30239688
    • 1988-11-30
    • HITACHI LTD
    • SHIGI HIDETAKATAKENAKA TAKATSUGUKOBAYASHI FUMIYUKI
    • H01L23/12H01L23/498H01L25/00H05K1/16H05K3/46
    • PURPOSE:To form a thin film circuit element having required accuracy without necessitating trimming by providing an electrode layer for connection to the circuit element on the topmost layer of insulating films, providing an element layer having the thin film circuit on any of other insulating films, and providing conductor wirings for connecting the electrode layer and external connecting terminals through the element layer. CONSTITUTION:Insulating layers 9a, 9b and 9c are formed on an insulating board. A thin film circuit element such as a thin film resistor is formed thereon. Therefore, irregularities, warping and the like on the surface of the insulating board, e.g. a ceramic substrate 6 are absorbed with the insulating films. The thin film circuit element is formed without the effects of the roughness of the surface of the insulating board. Therefore, the circuit element having the desired constants can be formed accurately. As a result, correction such as trimming is not required. A wiring layer 14 for connecting an electrode layer for connecting the circuit element to be mounted and external connecting terminals 10-13 of the insulating board is provided in an aligned pattern. Even if the alignment of the terminals of the circuit element to be mounted does not agree with the alignment of the external connecting terminal of the insulating board, the connection can be achieved.