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1. 发明专利

JP2004166017A Image display unit 审中-公开
公开(公告)号：JP2004166017A
公开(公告)日：2004-06-10
申请号：JP2002330193
申请日：2002-11-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KUROKAWA YOSHITAKE , SAKAO HIDEKI , NISHIOKA KIYOKAZU , KAWAGUCHI ATSUO
IPC分类号： G09G5/00 , G09G5/377 , H04N5/445
摘要： PROBLEM TO BE SOLVED: To reduce a data bandwidth in a shared memory without degrading image quality in an image display unit having the shared memory for displaying a plurality of frames with superposition, thus preventing a unit cost from increasing.
SOLUTION: When at least two images are superposed and displayed, the image display unit additionally has a means for designating selection information of on a pixel posterior to superposition or either of the pixels of two images prior to superposition on a pixel-by-pixel basis; and a means for generating information on the range of the superposed images at the time of display based on a table having in advance a rendering area in an image for superposition on a rendering element basis and based on the above information, and generating the pixel selection information and image readout information representing a necessary portion for displaying the superposed image. Using the pixel selection information and the image readout information generated by the generation means, only an object image to be superposed is displayed without the readout and display of a transparent pixel in the image for superposition.
COPYRIGHT: (C)2004,JPO

2. 发明专利

JPH0951528A MOVING PICTURE TRANSFER DEVICE 失效
公开(公告)号：JPH0951528A
公开(公告)日：1997-02-18
申请号：JP19833495
申请日：1995-08-03
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： KUROKAWA YOSHITAKE , TERADA KOICHI , HATTORI YASUMASA , AGAWA RYUICHI
IPC分类号： H04N7/24 , H04N19/00
摘要： PROBLEM TO BE SOLVED: To eliminate a periodic read and to prevent trouble occurrence by transmitting a value indicating the state of this device to a transmission destination in a period wherein no transfer is performed. SOLUTION: A return address 220 received by a local bud/slave interface is written in a return address register 207 and transfer data 213, transfer destination coordinate data 214, and data timing 215 are outputted to a transfer data buffer 204 and a moving picture data address generation part 206. The state of each part is reflected on a status register file 205 at any time. Then the moving picture data address generation part 206 selects transfer data 216 and a moving picture data address 218 and a local bus master interface 201 sends them out to a local bus 111. Then the output 217 of the status register file and the output of the return address register are selected and after data are sent out by a certain amount, the contents of the status register file are sent out to the return address.

3. 发明专利

JPH06259172A BATTERY OPERATION TYPE INFORMATION PROCESSOR 失效
公开(公告)号：JPH06259172A
公开(公告)日：1994-09-16
申请号：JP4941993
申请日：1993-03-10
申请人： HITACHI LTD
发明人： KUROKAWA YOSHITAKE , NISHIOKA KIYOKAZU , KAMIMAKI HIDEKI , SHIN YOSHIFUMI
IPC分类号： G06F1/32 , G06F1/00 , G06F1/26 , G06F1/28
摘要： PURPOSE:To shorten an interruption processing time, to reduce power consumption at the time of the interruption processing, and to surely preserve data at the time of the interrupting state even when the supply of a power source battery is in short at the time of interruption, in an information processor which performs a battery operation. CONSTITUTION:When an interrupting command arrives at the time of the normal operation of the device, the register state of a present CPU 101 is written in the prescribed area of a RAM 104, and then the interrupting state that power supply to necessary absolutely circuit elements including the RAM is maintained, and the power supply to the other circuit elements is interrupted is obtained. Also, when the power shortage of a battery 107 is detected in the interrupting state, the information processor is temporarily activated, and the data in the RAM are automatically saved and stored in a non-volatile recording medium 105.

4. 发明专利

JPH0695959A INFORMATION PROCESSOR 失效
公开(公告)号：JPH0695959A
公开(公告)日：1994-04-08
申请号：JP24097192
申请日：1992-09-09
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： SUKAI KAZUO , KAWAGUCHI HITOSHI , KOBAYASHI MASATAKA , HARUTA HIDEO , TAMURA CHIHIRO , KUROKAWA YOSHITAKE
IPC分类号： G06F12/06 , G06T1/60 , G06F15/64
摘要： PURPOSE:To increase picture elements to be plotted and to improve plotting performance by controlling an address and writing/non-writing for each chip and collectively writing data by a flexible format. CONSTITUTION:A CPU 1 executes instructions and data stored in a main storage 2 and executes various processing. In the case of executing plotting processing, a plotting processing mechanism 3 is instructed from the CPU 1 of what is plotted. At the time of receiving the instruction, the mechanism 3 instructs an image memory control mechanisms 4 to access an image memory 5. Receiving the instruction, the mechanism 4 writes data in the memory 5. When data from the CPU 1 or the mechanism 3 are continuously written in an area to be written by one access to the memory 5, the writing of the data can be collected to one image memory writing cycle.

5. 发明专利

JP2003288067A Image display device 审中-公开
标题翻译：图像显示设备
公开(公告)号：JP2003288067A
公开(公告)日：2003-10-10
申请号：JP2002090177
申请日：2002-03-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KUROKAWA YOSHITAKE , NISHIOKA KIYOKAZU , KAWAGUCHI ATSUO , SAKAO HIDEKI , TASHIRO TAKU
IPC分类号： G06T3/00 , G09G5/00 , G09G5/377 , H04N5/66
摘要： PROBLEM TO BE SOLVED: To provide an image display device in which the data band width of a shared memory is controlled narrower without lowering image quality and the device cost increase is suppress. SOLUTION: In the device that displays at least two images by overlapping them and specifies selection information of either of the overlapped pixels or the two images before overlap by unit of pixel for a certain pixel, images to be overlapped are searched by every line, when the line is constituted of only transparent pixels, information that the line is not overlapped is generated, a means for generating image reading information indicating a part required to be displayed is added based on the information and only images which can be overlapped are displayed without performing display reading of transparent pixel parts by using the pixel selection information generated by using the generation means and the pixel reading information. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种在不降低图像质量的情况下更小地控制共享存储器的数据带宽的图像显示装置，并抑制装置成本增加。解决方案：在通过重叠它们显示至少两个图像的设备中，并且通过以某个像素的像素为单位指定重叠之前的重叠像素或两个图像之间的重叠像素或两个图像的选择信息，每个线，当线仅由透明像素构成时，生成不重叠线的信息，基于该信息添加指示要显示的部分的图像读取信息的装置，并且仅可重叠的图像是通过使用通过使用生成装置生成的像素选择信息和像素读取信息来显示透明像素部分的显示读取。版权所有（C）2004，JPO

6. 发明专利

JPH09101771A PICTURE PROCESSOR 失效
公开(公告)号：JPH09101771A
公开(公告)日：1997-04-15
申请号：JP25742195
申请日：1995-10-04
申请人： HITACHI LTD
发明人： MORINAGA TAKENORI , INAGAKI YUKIHIDE , TERADA KOICHI , KUROKAWA YOSHITAKE , MORINO TOKAI , KOHIYAMA TOMOHISA
IPC分类号： H04N1/46 , G06T1/00 , G09G5/02 , G09G5/36
摘要： PROBLEM TO BE SOLVED: To obtain a picture processor in which a manufacturing cost and power consumption is suppressed while preventing influence to picture quality by masking low-order plural bits of picture data at the preceding stage for scaling processing and reducing member of color processing. SOLUTION: A picture processing device comprises a bit mask circuit 2, a scaling circuit 3, a line memory 21 for scaling required for scaling processing, a reducing number of color circuit 5, a line memory 20 for diffusion-processing an error, and a bus interface 4. The bit mask circuit 2 outputs picture data of 5 bits/pixel per one element, total 15 bits/pixel by masking low-order 3 bits of an input of 8 bits/pixel per one element, total 24 bits/pixel in RGB picture data. The scaling circuit 3 performs scaling of inputted RGB picture data and outputs it, the reducing circuit 5 reduces the number of colors of inputted RGB picture data and outputs it. The bus interface 4 controls an output from a bus 114 to the bit mask circuit 2 and an input from the reducing circuit 5 to the bus 114.

7. 发明专利

JPH08278776A DEVICE AND METHOD FOR DISPLAYING 225 COLORS 失效
公开(公告)号：JPH08278776A
公开(公告)日：1996-10-22
申请号：JP8364495
申请日：1995-04-10
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： FUJIKAWA YOSHIBUMI , NISHIOKA KIYOKAZU , TANAKA KAZUHIKO , TERADA KOICHI , KUROKAWA YOSHITAKE , HANEDA KOICHI , NITSUPOU HIROAKI , TSUJIOKA SHIGEO , TANAKA TOSHIO
IPC分类号： G09G5/00 , G06T5/00 , G09G5/06 , G09G5/36
摘要： PURPOSE: To remain a hardware palette number for a color, etc., used for an OS such as a frame of a window by displaying an image using a specified number of colors uniformly dividing color space. CONSTITUTION: This device is provided with a logic palette conversion part 120 converting the image data to the image data of a palette form and a DMA transfer control part 130, etc. The logic palette conversion part 120 reduces the number of colors to 225 colors since the image data outputted by an image generation part 110 are the luminance of RGB of 256 gradation. The DMA transfer control part 130 DMA-transfers the inputted image data to an image display circuit 200 successively to display the image and to reproduce an animation. Thus, rapid transfer is performed, and bus utilizing efficiency is enhanced, and since the image display is attained by using 225 colors obtd. by uniformly dividing the color space, the hardware palette number for the color, etc., used for the OS such as the frame of the window is left.

8. 发明专利

JPH08129652A DIGITAL IMAGE DATA TRANSMISSION DEVICE 失效
公开(公告)号：JPH08129652A
公开(公告)日：1996-05-21
申请号：JP26935394
申请日：1994-11-02
申请人： HITACHI LTD , HITACHI MICRO SOFTWARE SYST
发明人： KUROKAWA YOSHITAKE , NISHIOKA KIYOKAZU , TANAKA KAZUHIKO , TERADA KOICHI , FUJIKAWA YOSHIBUMI , HANEDA KOICHI , NITSUPOU HIROAKI , TSUJIOKA SHIGEO , TANAKA TOSHIO
IPC分类号： G06T13/00 , G06T13/80
摘要： PURPOSE: To make a digital image data transmission device possible to deal with the format of data to be transferred to a drawing processor to be mounted on an information processor which is connected to the digital image data transmission device only by rewriting register. CONSTITUTION: The device consists of a input buffer 301 which receives an input from a bus, an input selector 302 which distributes data inputted to the input buffer 301 to a target block, an output buffer 303 which receives the output data and outputs it to the bus, an output selector 304 which selects data outputted from respective blocks and writes them in the output buffer, and an image sending-out order determining circuit 306 which controls those blocks and rearranges image data into transmission format determined by a bus control circuit 305 controlling an image transmission determining circuit 306, and the transmission format of the data is determined by the control circuit 305, the transmission format of the data is converted by the circuit 306 on the basis of the determined format and stored in the buffer 303, and it is sent out to the peripheral bus of the circuit 305.

9. 发明专利

JP2003295848A Display controller 有权
标题翻译：显示控制器
公开(公告)号：JP2003295848A
公开(公告)日：2003-10-15
申请号：JP2002100733
申请日：2002-04-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NAKADA KEIMEI , FUJIKAWA YOSHIBUMI , KUROKAWA YOSHITAKE , SAKAO HIDEKI , TANAKA KAZUHIKO
IPC分类号： G09G5/00
摘要： PROBLEM TO BE SOLVED: To reduce the quantity of data required for state control and the transfer quantity of the data while retaining the degree of freedom of the control state of a display controller.
SOLUTION: State control information being the data required for the state control is divided into a plurality of groups and the state control information is made omittable by the group units in state transition timing. The state control information is transferred to a data distributor 362 from an FIFO buffer 311. The next state is written in a state holder A364 and a state holder B365 according to the groups in the state transition timing detected by means of an update decision device 316. The contents in the state holders corresponding to the omitted group are retained in the previous state form or is returned to a fixed state.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了在保持显示控制器的控制状态的自由度的同时减少状态控制所需的数据量和数据的传送量。解决方案：作为状态控制所需的数据的状态控制信息被分成多个组，并且状态控制信息在状态转换定时中被组单元所忽略。状态控制信息从FIFO缓冲器311传送到数据分配器36.下一状态根据通过更新判定装置316检测的状态转移定时中的组被写入状态保持器A364和状态保持器B365 对应于省略组的状态持有人的内容保留在先前的状态或返回到固定状态。版权所有（C）2004，JPO

10. 发明专利

JP2003140628A INFORMATION PROCESSOR 审中-公开
公开(公告)号：JP2003140628A
公开(公告)日：2003-05-16
申请号：JP2001338866
申请日：2001-11-05
申请人： HITACHI LTD
发明人： KUROKAWA YOSHITAKE , NISHIOKA KIYOKAZU , KAWAGUCHI ATSUO , TASHIRO TAKU , ISHIGURO MASAO
IPC分类号： G06F3/153 , G09G5/00 , G09G5/26 , G09G5/391 , H04N1/393 , H04N5/278
摘要： PROBLEM TO BE SOLVED: To provide a means which can display high-resolution bit-map data and displays the reduced bit-map data with small influence of the performance of a processor. SOLUTION: A rendernig processor has a rendernig frame memory which has reduced resolution in a main memory, information needed to write reduced characters to the frame memory, character data, and a means which converts the resolution of external character data according to those information and data to the resolution of the frame memory and writes the data.

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