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1. 发明专利

JPS6315115A VELOCITY DETECTOR 失效
公开(公告)号：JPS6315115A
公开(公告)日：1988-01-22
申请号：JP15783286
申请日：1986-07-07
申请人： HITACHI LTD
发明人： AZUSAWA NOBORU
IPC分类号： G05D13/62 , G01D5/244 , G01D5/245 , G01P3/481
摘要： PURPOSE:To correct a phase error with respect to the angle of rotation of an encoder, by forming an address signal based on the output of the encoder and reading the correction value stored in a correction circuit based on the above mentioned address signal. CONSTITUTION:An encoder 1 outputs two-phase sine wave signals A, B of one cycle and a revolution pulse T corresponding to the positional change of rotation. An A/D converter 4 converts the sine wave signal A to digital data and a counter 3 counts the number of the signals converted to rectangular wave pulses by a comparator 2. The errors to the angles 1-n of rotation of the sine wave signal of the encoder are stored in a correction circuit 5 and the correction data of said correction circuit 5 are read using the data of the A/D converter 4 and the counter 3 as addresses. By this method, the phase shift to the angle of rotation of the sine wave signals caused by the mechanical error of the encoder can be corrected.

2. 发明专利

JPS6248255A GATE PULSE GENERATION SYSTEM FOR THYRISTOR CONVERTER 失效
公开(公告)号：JPS6248255A
公开(公告)日：1987-03-02
申请号：JP18515685
申请日：1985-08-23
申请人： HITACHI LTD
发明人： TACHIKAWA MAKOTO , AZUSAWA NOBORU
IPC分类号： H02M1/08
摘要： PURPOSE:To absorb fluctuating current for zero point detection and eliminate output ripple, by finding out the peak value of the output current of a thyristor converter, and by finding out the correction control angle of lag according to the unevenness of the current, to be bias added to the control angle of lag. CONSTITUTION:In a power converter for detecting the output current of a thyristor converter 1 with a current detector 4 and comparing the detected value with the reference value and applying gate pulse from a gate pulse generator 10 to the converter 1 according to the deviation, the peak value of each phase current is found out of the detected value of the current detector 4. Then, if any lag is present in the zero point detection of a synchronous power source, unevenness is generated thereby on the ripple value of the current of the converter 1, and so the unevenness of the peak value of current is found out, and the correction and control angle DELTAalpha of lag is determined according to the unevenness. The correction angle DELTAalpha is bias added to the control angle alpha of lag.

3. 发明专利

JPS61269134A LIQUID CRYSTAL PROJECTION TYPE DISPLAY DEVICE 失效
公开(公告)号：JPS61269134A
公开(公告)日：1986-11-28
申请号：JP11021485
申请日：1985-05-24
申请人： HITACHI LTD
发明人： AZUSAWA NOBORU , HASHIMOTO TADAHIKO , SHIRAISHI HISANORI , NAGAE KEIJI
IPC分类号： G02F1/133 , G02B26/10 , G02F1/13 , G02F1/1333 , G02F1/1335 , G03B21/00 , G09G3/36
摘要： PURPOSE:To display an image on a rectangular picture plane by changing expanding magnification in the X and Y axis directions and changing the changing magnifications of X and Y axes in accordance with the expanding magnification. CONSTITUTION:A photographing optical part 9 consists of projection lenses 15, 16, the projection lens 15 expands both the X and Y axes uniformly by n times and the projection lens 16 is a semicircular type lens expanding the X axis by (m) times and the Y axis by unmagnification, so that an image obtained through the two projection lenses 15, 16 can be expanded by (m).(n) times in the X axis and (n) times in the Y axis. Speed control circuits 22X, 22Y control the X axis moving speed and Y axis moving speed of an optical axis of a laser beam in accordance with speed command values outputted from circuits 21X, 21Y. The outputs of the circuits 22X, 22Y are inputted to a mirror driving system 31. Magnification correcting circuits 25, 26 formed for the X axis side correct magnification so that the ratio of the X axis to the Y axis is m times on the basis of the expanding magnification of a projection optical part 9 and only the X axis is set up to 1/m (magnification of Y axis projection optical part/magnification of X axis projection optical part) by correcting units 25, 26 on the basis of a speed command and a position command.

4. 发明专利

JPS61256321A LIQUID CRYSTAL PROJECTION TYPE DISPLAY DEVICE 失效
公开(公告)号：JPS61256321A
公开(公告)日：1986-11-13
申请号：JP9780085
申请日：1985-05-10
申请人： HITACHI LTD
发明人： AZUSAWA NOBORU , HASHIMOTO TADAHIKO , SHIRAISHI HISANORI , NAGAE KEIJI
IPC分类号： G02F1/13 , G02F1/133 , G09F9/30 , G09G3/02 , G09G3/18
摘要： PURPOSE:To obtain a device which can make thermal writing at a specified line width by laser light in a short period by changing the intensity of the laser light to be irradiated on a liquid crystal element according to the moving speed of an optical axis. CONSTITUTION:An optical axis movement speed calculating circuit 35 is inputted with speed detection signals vxf, Vyf of an X-axis and Y-axis and determines an optical axis movement speed Vlo. The determined optical axis movement speed vlo is inputted to a speed-light intensity converting circuit 36. The circuit 36 outputs the optical axis movement speed vlo and the light intensity control signal lc. On the other hand, an optical axis movement speed command calculating circuit 38 is inputted with the speed command signals vxp, vyp of the X-axis and Y-axis and determines the optical axis moving command vlp. An optical axis movement detecting circuit 39 turns on switching 37 when the optical axis movement speed command vlp exists. The light intensity control signal lc is applied to a modulator 2 when the switching circuit 37 turns on. A piezo-electric element driving circuit 26 constituting the modulator 2 oscillates a piezo-electric element 23 in proportion to the magnitude of the signal lc. The element 23 generates the ultrasonic wave of the intensity proportional to the magnitude of the signal lc.

5. 发明专利

JPS61147787A VECTOR CONTROLLER FOR INDUCTION MOTOR 失效
公开(公告)号：JPS61147787A
公开(公告)日：1986-07-05
申请号：JP26647384
申请日：1984-12-19
申请人： HITACHI LTD
发明人： AZUSAWA NOBORU , TACHIKAWA MAKOTO
IPC分类号： H02P21/00 , H02P21/22 , H02P23/07 , H02P23/08 , H02P23/16 , H02P23/24 , H02P27/04 , H02P27/06 , H02P27/08
摘要： PURPOSE:To prevent an induction motor from running away even if the speed detected value is different from the actual speed due to the malfunction of a speed detector by variably setting the limit value of the primary frequency command. CONSTITUTION:A variable frequency limiter forms the absolute value omega0 of a speed command omega0 omega0 by an absolute value circuit 22, the sum of the set value omegasm of the maximum slip frequency is calculated by an adder 23 to generate the limit value omega10m of the primary frequency command value corresponding to the speed command omega0 at that time. A variable limiter 24 sets the output to omega10m if the absolute value ¦omega10¦ of the primary frequency command is higher than the generated control value omega10m, and retains omega10 as the output omega100 as it is if lower. Thus, the output omega100 of a variable frequency limiter 21 is limited not to exceed omega10m=omega0+omegasm in response to the speed command omega0. In other words, even if a speed feedback loop has a malfunction, the real speed is control to become equal to the speed command value omega0.

6. 发明专利

JPS6080769A DETECTION OF MOTOR SPEED 失效
公开(公告)号：JPS6080769A
公开(公告)日：1985-05-08
申请号：JP18886183
申请日：1983-10-07
申请人： HITACHI LTD
发明人： AZUSAWA NOBORU , KAMIYAMA KENZOU
IPC分类号： G01P3/481 , G01P3/489 , H02P29/00
摘要： PURPOSE:To eliminate influence of a slot error and to enable detection at a high speed with high accuracy by measuring the interval error between the respective pulses of the pulse train signal outputted from a pulse oscillator, correcting the measured value of the pulse interval and obtaining a speed detection signal. CONSTITUTION:The position from the periodic pulses of the respective pulses of the pulse train signal outputted from a PLG is detected by a counter 12. On the other hand, the period of the pulse trains and the interval of the periodic pulses are measured by counting up counters 13 and 14 by the clock pulses from a clock generator 15 since the entry of each input pulse until entry of the succeeding pulse. The periodic pulse interval mR is detected by the counter 14 and a register 20 and the theoretical value m0 of the period of the pulse train is calculated by a divider 27. On the other hand, the periods prior to correction like m1 corresponding to each pulse interval position A1 of the pulse train signal from the PLG and m2 corresponding to A2 are detected by the counter 13 and a register 19. The slot error of the PLG is thus corrected and the speed is detected with good accuracy at every input of the pulse train.

7. 发明专利

JPS59136078A Controller for thyristor converter 失效
标题翻译：控制器用于转换器
公开(公告)号：JPS59136078A
公开(公告)日：1984-08-04
申请号：JP733283
申请日：1983-01-21
申请人： Hitachi Ltd
发明人： AZUSAWA NOBORU , MIYAHARA YOUJIROU
IPC分类号： H02P7/292 , H02M7/515
CPC分类号： H02M7/515
摘要： PURPOSE:To prevent the commutation failure of a converter with the end limited value as the necessary minimum limit value by limiting a phase control signal by the sum of a superposed command value and a margin angle command value and then converting it to a control value by reverse cosine calculation. CONSTITUTION:A thyristor converter 1 for driving a DC motor 3 is controlled by a phase control signal Ralpha in response to a deviation between a current command and a current detection signal through a phase angle limiter 8, a reverse cosine calculator 9 and a pulse generator 10. At this time, a limiter 8 is composed so that the output of a superposing angle calculator 11 and a commutation margin angle set signal Rgamma are added to output an end limited value R and applied to a proportional calculator 13 to produce a phase angle command Ralpha'. Accordingly, since the end limit is limited before converting to the control angle by the calculator 9, and the commutation failure can be prevented by reducing the end limited limit to the minimum value irrespective of the nonlinear property of the load current and the superposing commutation angle.
摘要翻译：目的：通过将相位控制信号通过叠加指令值和余量角度指令值的和来限制相位控制信号，然后将其转换为控制值，以防止具有终止限制值的转换器的换向故障作为必要的最小限制值反向余弦计算。构成：用于驱动DC电动机3的晶闸管转换器1响应于通过相位角限制器8，反向余弦计算器9和脉冲发生器8的电流指令和电流检测信号之间的偏差，由相位控制信号Ralpha来控制此时，组合限幅器8，使得叠加角计算器11的输出和换向裕量角度设定信号Rgamma相加以输出终止限制值R并施加到比例计算器13以产生相位角命令Ralpha'。因此，由于在由计算器9转换为控制角度之前限制了限制，并且不管负载电流和叠加换向角度的非线性特性如何，都可以通过将终止限制极限减小到最小值来防止换向故障。

8. 发明专利

JPS5914398A Exciter for synchronous generator 失效
标题翻译：同步发电机的EXCITER
公开(公告)号：JPS5914398A
公开(公告)日：1984-01-25
申请号：JP12207382
申请日：1982-07-15
申请人： Hitachi Ltd
发明人： KATOU NOBUO , AZUSAWA NOBORU
IPC分类号： H02P9/08 , H02P9/14
CPC分类号： H02P9/08
摘要： PURPOSE:To protect an initial exciter by interrupting a field switch when a malfunction occurs in an exciter self-exciting system. CONSTITUTION:When a contact F for instructing an initial excitation application is closed, an auxiliary relay 13X is excited at the time of instantaneously operating time limiting recovery under the condition that a field switch 4 is closed, and the closing coil 13C of an initial excitation switch 13 is excited. After the initial excitation voltage is applied, the output voltage of the generator reaches the specified value, a relay 17 is operated, the initial excitation current becomes nearly zero, and a relay 18 is operated. Then, an opening coil 13T is excited, and the switch 13 is opened. On the other hand, when the relay 17 is not operated, a contact 20 is closed, and the switch 4 is opened. The opening coil 13T is excited due to the opening of the switch 4, and the switch 13 is opened.
摘要翻译：目的：通过在励磁机自励系统发生故障时中断励磁开关来保护初始励磁机。构成：当用于指示初始激励应用的触点F闭合时，在场开关4闭合的条件下，在瞬时运行时间限制恢复时激励辅助继电器13X，并且初始激励的闭合线圈13C 开关13被激励。在施加初始激励电压之后，发电机的输出电压达到规定值，继电器17动作，初始励磁电流变为接近零，继电器18动作。然后，开启线圈13T被激励，开关13断开。另一方面，当继电器17不工作时，触点20闭合，开关4断开。打开线圈13T由于开关4的开启而被激励，开关13断开。

9. 发明专利

JPS58198192A Thyristor leonard device 失效
标题翻译： THYRISTOR LEONARD设备
公开(公告)号：JPS58198192A
公开(公告)日：1983-11-18
申请号：JP7836282
申请日：1982-05-12
申请人： Hitachi Ltd
发明人： TACHIKAWA MAKOTO , KAMIYAMA KENZOU , OOMAE TSUTOMU , AZUSAWA NOBORU
IPC分类号： H02P7/292
CPC分类号： H02P7/293
摘要： PURPOSE:To improve the responsiveness of control by correlating to the output current or voltage detection signal and correcting a control delay angle signal with an attenuation signal which becomes maximum when the detection signal is zero and zero when it is prescribed value. CONSTITUTION:A current controller 4 outputs a control delay angle signal alpha1 in response to the deviation beween a current instruction signal IR and a feedback signal IPF. A current rate controller 12 inputs a deviation between a signal obtained by differentiating a feedback signal iDF of instantaneous value which is digitized by an A/D converter 9e and the signal alpha1 through a sampler 15, and outputs a signal alpha2. A function generator 6 outputs a correction control delay angle signal DELTAalpha1 which abruptly increases as the load current ID reduces from ID0 to zero in correlation to the feedback signal IDF. A gate pulse generator 5 outputs the gate signal of a thyristor conveter 2 in response to the deviation between the signal alpha2 and the signal DELTAalpha2 from a coefficient unit 16.
摘要翻译：目的：通过与输出电流或电压检测信号相关来提高控制响应性，并在检测信号为零时用衰减信号进行校正控制延迟角信号，当衰减信号为规定值时为零。构成：电流控制器4响应于当前指令信号IR和反馈信号IPF的偏差而输出控制延迟角度信号α1。电流速率控制器12输入通过对通过A / D转换器9e数字化的瞬时值的反馈信号iDF和通过采样器15对信号α1进行微分而获得的信号之间的偏差，并输出信号α2。函数发生器6输出与反馈信号IDF相关的负载电流ID从ID0减少到零时，其突然增加的校正控制延迟角度信号DELTAalpha1。门脉冲发生器5响应于信号α2和来自系数单元16的信号DELTAal2之间的偏差输出晶闸管振荡器2的门信号。

10. 发明专利

JPS5860334A DATA PROCESSING SYSTEM 失效
公开(公告)号：JPS5860334A
公开(公告)日：1983-04-09
申请号：JP15874281
申请日：1981-10-07
申请人： HITACHI LTD
发明人： TAKAKURA MITSUO , SHIMOYAMA KAZUHIKO , OKAMOTO TADASHI , AZUSAWA NOBORU , YOSHIDA OSAO , SAITOU YUTAKA , SAKURAI TAKAKAZU , KITANI SUSUMU , KIKUCHI YUUJI , UEKANE YOSHIHIRO
IPC分类号： G06F5/06 , G06F13/362 , G06F13/366 , G06F15/16 , G06F15/177
摘要： PURPOSE:To prevent the same output device from being accessed by plural computers by transmitting data while controlling a line between a buffer device and an I/O device mounted on each computer side. CONSTITUTION:When data are transmitted from an input device 310 to each computer side, a signal 130 opening a gate 3100 is outputted from a bus controller 5. At that time signals 131-13N opening output gates 431-43N in buffer devices 41-4N are not outputted. Consequently input gates 421-42N are opened and data are written in specific addresses in buffer memories 411-41N. When the data are outputted from a buffer device 41 of a computer 1 to an output device 311, for example, signals opening the gates 431 and 3110 respectively are outputted from the controller 5. At that time, the gate 421 of the device 41 is closed and the input gates 422-42N of other buffer devices are opened. Thus the data in the device 41 are transferred to the device 311 and the buffer devices 42-4N.

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