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1. 发明专利

JPH11143785A MEMORY FAILURE DIAGNOSTIC SYSTEM 失效
公开(公告)号：JPH11143785A
公开(公告)日：1999-05-28
申请号：JP30850597
申请日：1997-11-11
申请人： FUJITSU LTD
发明人： HAYASHI TOSHIO , SHIRAI HIROAKI
IPC分类号： G06F12/16
摘要： PROBLEM TO BE SOLVED: To inexpensively and easily diagnose a memory failure by providing a write address generating part which includes the result of a 1st parity operation in a write address and produces a 1st expansion write address and writing input data to memory according to the 1st expansion write address. SOLUTION: A parity operating part 1 performs a parity operation due to input data, and a parity operation result is outputted to a write address generating part 2. The part 2 produces a 1st expansion write address in the form of including the parity operation result outputted from the part 1 in a write address and input data is written to memory 3 according to a write instruction and the 1st expansion write address. When correct read data is decided and selected according to each parity operation result of 1st and 2nd read data which are read from the memory 3 and also each parity operation result is different, a parity error is detected and a parity alarm is outputted.

2. 发明专利

JPH06103329A DATA INPUT SYSTEM 失效
公开(公告)号：JPH06103329A
公开(公告)日：1994-04-15
申请号：JP25179092
申请日：1992-09-22
申请人： FUJITSU LTD
发明人： TAKAHASHI TAKESHI , SHIRAI HIROAKI , HORIGUCHI KAORI
IPC分类号： G06F17/50 , G06F15/60
摘要： PURPOSE:To eliminate the trouble of inputting two attribute data and character data and prevent misinput, and to automatically extract numerals on a drawing plotted by CAD and totalize them in the data input system which inputs data from a character string on the CAD drawing. CONSTITUTION:This system is provided with a character string cutting process 4 which cuts a character at a specified position in the character string inputted on the CAD drawing and an additional information totalizing process 5 which performs specified totalization by using the character cut by the character string cutting process 4 as additional information; and the result totalized in the additional information totalizing process 5 is outputted.

3. 发明专利

JPH02143744A SUBORDINATE CLOCK CHANGEOVER SYSTEM 失效
公开(公告)号：JPH02143744A
公开(公告)日：1990-06-01
申请号：JP29737788
申请日：1988-11-25
申请人： FUJITSU LTD
发明人： SHIRAI HIROAKI , KIMURA SHUJI , MARUYAMA AKIRA
IPC分类号： H04L7/00
摘要： PURPOSE:To decrease the phase shift at clock changeover by generating a high speed clock synchronized with a low speed clock through the use of a PLL and generating the clock being a reference. CONSTITUTION:A phase synchronizing circuit (PLL) 63,... is provided in a subsequent clock generating circuit 13,... generating a subordinate clock from a low speed transmission line clock. The phase locked loop circuit (PLL) 63,... is provided before frequency divider circuit 23,... and a high speed clock synchronized with a transmission line clock is generated. A high speed clock synchronized with the low speed transmission clock is generated by using the phase locked loop circuit (PLL) 63,... and the clock being the reference is generated and the output clock is generated through changeover. Thus, the phase deviation of the clock at changeover is decreased regardless of the clock frequency extracted from the transmission line signal to attain the control with a prescribed accuracy.

4. 发明专利

JPS6197742A Information display system 失效
标题翻译：信息显示系统
公开(公告)号：JPS6197742A
公开(公告)日：1986-05-16
申请号：JP21899084
申请日：1984-10-18
申请人： Fujitsu Ltd
发明人： OGURA TAKASHI , RYU TADAMITSU , TAKAHARA TOSHIO , YAMASHITA HIDEJI , GOTO SHUNJI , SHIRAI HIROAKI
IPC分类号： H04N7/173 , G06F3/14 , H04N1/00
摘要： PURPOSE: To display a screen produced in response to a request or an arithmetic result to a display by providing a means to a center to combine the data on a live data file and a picture of a picture file for production of a picture for display and also to perform a desired operation for registration.
CONSTITUTION: When the picture information is requested from a terminal 3, a picture or arithmetic request part 13 starts picture data extraction live data link part 14. Then the information on the corresponding fixed screen is read out of a picture file 6. At the same time, the related live data is read out of a live data file 5. These read-out data are supplied to the part 14. Thus the part 14 links the read-out screen to the data and then delivers them. Thus a desired picture is displayed at the terminal 3. When an arithmetic result is requested, the data read out of an arithmetic file 7 is connected to the liver data read out of the file 5 for execution of an operation. The result of this operation is displayed at the terminal 3. The terminal 3 can have a request for registration of a produced picture or an arithmetic result.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过向中心提供一个响应请求或算术结果产生的屏幕，以便将实时数据文件上的数据和用于制作用于显示的图像的图片文件的图片相结合，并且还要执行所需的注册操作。构成：当从终端3请求图像信息时，图像或算术请求部分13开始图像数据提取实时数据链接部分14.然后从图像文件6中读出对应的固定屏幕上的信息。同样地时间，从实时数据文件5读出相关的实时数据。这些读出数据被提供给部分14.因此，部分14将读出的屏幕链接到数据，然后传送它们。因此，在终端3显示期望的图像。当请求算术结果时，从算术文件7读出的数据连接到从文件5读出的肝脏数据，以执行操作。终端3显示该操作的结果。终端3可以具有对所生成的图片或算术结果的注册请求。

5. 发明专利

JPS57112779A DISPLAY SYSTEM FOR DISPLAY 失效
公开(公告)号：JPS57112779A
公开(公告)日：1982-07-13
申请号：JP18726380
申请日：1980-12-29
申请人： FUJITSU LTD
发明人： SHIRAI HIROAKI
IPC分类号： G09G5/20 , G09G1/06

6. 发明专利

JPS56117446A DATA TRANSMITTING SYSTEM 失效
公开(公告)号：JPS56117446A
公开(公告)日：1981-09-14
申请号：JP2143480
申请日：1980-02-22
申请人： FUJITSU LTD
发明人： YAMADA YUUSAKU , NONAKA KENJI , TAKEDA KIYOSHI , SHIRAI HIROAKI
IPC分类号： H04B1/04 , H04B10/00 , H04B10/07 , H04B10/556 , H04L29/00
摘要： PURPOSE:To reduce the power consumption and thus eliminate a replacement of the batteries for a long time, by carrying out a transmission of data when the input data changes and giving a data transmission with a fixed time interval when the input data has no change respectively. CONSTITUTION:The pulley 4 is turned according to the change of water level, and this turning motion is converted into a digital data through the A-D converter 5 to be converted into a pulse series by the parallel-serial converting circuit 6. This pulse series is converted into the optical signals by the light emitting element 7 to be transmitted via the optical fiber cable 8. The BUSY signal 12 at the moment when the input data changes is detected by the fall detecting circuit 13, and then the power supply switch 14 is closed to perform a transmission of data. The switch 14 is closed by the automatic starting circuit 15 and with every second T1 for a transmission of data. This transmission of data is monitored by the information renewal check timer 16 at the reception part, and an external alarm is delivered in case the data is not renewed within the T2 second.

7. 发明专利

JPH05189294A RAM ACCESSING SYSTEM 失效
公开(公告)号：JPH05189294A
公开(公告)日：1993-07-30
申请号：JP284992
申请日：1992-01-10
申请人： FUJITSU LTD
发明人： SHIRAI HIROAKI , NAKAMURA SHINICHI
IPC分类号： G06F12/00
摘要： PURPOSE:To provide a RAM accessing system in which the storage data of a RAM supplying continuously read-out data to the outside is updated through simple and inexpensive configuration. CONSTITUTION:A latch part 2 to save beforehand the read-out data MRD of the RAM 1 is provided, and data LD is read out of the latch part 2 at the timing t1 to read out the same data as the one saved in the latch part 2 from the RAM 1, and in addition, the data WD from the outside is written in the arbitrary address WA of the RAM 1 by using this timing t1. Or a comparing part to compare the read-out address of the RAM 1 with the write-in address to the RAM 1 from the outside is provided, and the RAM 1 is turned into a write-in mode, and in addition, the write-in data from the outside to the RAM 1 is placed on the data bus of the RAM 1 at the timing when the coincidence of comparison in this comparing part is attained.

8. 发明专利

JPH0326942B2 失效
公开(公告)号：JPH0326942B2
公开(公告)日：1991-04-12
申请号：JP3351184
申请日：1984-02-24
申请人： FUJITSU LTD
发明人： SHIRAI HIROAKI , OGURA TAKAYUKI , IYOTA TOSHIO , HASHIMOTO KENICHI
IPC分类号： H04L29/04 , H04L13/00 , H04L29/08

9. 发明专利

JPH02276413A LCC DISPLAY PROCESSOR FOR WIRING IN OFFICE 失效
公开(公告)号：JPH02276413A
公开(公告)日：1990-11-13
申请号：JP9776689
申请日：1989-04-18
申请人： FUJITSU LTD
发明人： FUJIYOSHI HIDEAKI , SHIRAI HIROAKI
IPC分类号： E04F15/18 , E04F15/024 , G06F1/00 , H02G3/00 , H02G3/38
摘要： PURPOSE:To determine the wiring system easily by setting a parameter in taking out a parameter reference value from a table, by inputting office data to find a life cycle cost of wiring for each system for comparison and display. CONSTITUTION:A parameter is taken out from a parameter reference table 11 to set 12 and to display on a screen 20a and inputted into a parameter table 13. On the other hand, an object office in a building is set 18 from an office data table 17 and displayed on to an object office setting screen 20b, while the data of the object office is stored 19 into a memory. Based on the data of a parameter table 13 and that of the memory 19 a life cycle cost LCC calculation processing section 14 calculates LCC of the initial cost and running cost of each wiring system, inputs them into a table 15 and displays them onto a display screen 20c through a display section 16. The wiring system in the office can thereby be determined easily in a planning stage without manual operation.

10. 发明专利

JPH01280941A BRANCH CIRCUIT 失效
公开(公告)号：JPH01280941A
公开(公告)日：1989-11-13
申请号：JP11022688
申请日：1988-05-06
申请人： FUJITSU LTD
发明人： HASHIMOTO KENICHI , SHIRAI HIROAKI
摘要： PURPOSE:To test a status supervision control section by using an output of a control signal of a status recognition means recognizing the status bit output of a prescribed slave station by the control signal output of a 1st selection circuit so as to select the prescribed slave station, and providing a 2nd selecting circuit outputting a data from the slave station. CONSTITUTION:A prescribed slave station is selected by a control signal from a master station in a 1st selecting circuit 200. Then a status recognition means 800 uses the controls signal output of the 1st selection circuit 200 to recognize the status bit output of the prescribed slave station. Then a prescribed slave station is selected by the control signal output of the status recognition means 800 by the 2nd selection circuit 400 and a data from the slave station is outputted to the master station 100. Thus, the status supervision control section supervising the status of the slave station is tested.

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