专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPS5794668A MEASURING METHOD OF THERMAL RESISTANCE 失效
公开(公告)号：JPS5794668A
公开(公告)日：1982-06-12
申请号：JP17039380
申请日：1980-12-03
申请人： FUJITSU LTD
发明人： FUKAYA JIYUN
IPC分类号： G01R31/26 , G01R31/28
摘要： PURPOSE:To derive thermal resistance of a semidoncudtor chip, by deriving a temperature coefficient showing the ratio in which forward voltage of rectifier junction in the semiconductor chip is varied in accordance with a variation of a junction temperature, from a value of the forward voltage at a prescribed temperature, and utilizing it. CONSTITUTION:A variation DELTAVF/DELTAT of forward voltage VF following a variation of a temperature is measured by use of a Ga As FET by which the forward voltage at a normal temperature is distributed to about 0.5V-0.8V, and is plotted against the forward voltage VF. There is a linear correlation between both of them. A temperature coefficient of its element can be grasped by utilizing said correlation and measuring the forward voltage VF at a normal temperature, and subsequently, a temperature of a heating part and thermal resistance of a device can be grasped by measuring the forward voltage VF at the time of heating.

2. 发明专利

JPS60200547A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60200547A
公开(公告)日：1985-10-11
申请号：JP5714784
申请日：1984-03-23
申请人： FUJITSU LTD
发明人： FUKAYA JIYUN
IPC分类号： H01L21/338 , H01L23/12 , H01L23/66 , H01L29/812
摘要： PURPOSE:To obtain a high frequency and high output transistor which is facilitated in matching by controlling the width of an electrode connector for connecting between unit cells, exhibiting high impedance for the prescribed frequency and low impedance for parasitic oscillation frequency, thereby preventing the parasitic oscillation. CONSTITUTION:Unit cell transistors U1, U2 are connected therebetween of a high frequency and high output semiconductor device made of a plurality of cells gathered with unit cell transistors to control the widths of electrode connectors 14, 15 to exhibit a high impedance for the prescribed frequency and a low impedance for a parasitic oscillation frequency. For example, the widths of electrode connectors 14, 15 between the cells of GaAsFET are set to 1-5mum, and narrowed as compared with 20mum of the conventional one. Then, the connectors 14, 15 become high impedance for high frequency such as microwave to act so that the cell are separated and operates for the parasitic oscillation low frequency to become a low impedance to be shortcircuited to thereby suppress the parasitic oscillation, and the cells can be readily matched without influence of the adjacent cells.

3. 发明专利

JPS59163573A High frequency power measuring device 失效
标题翻译：高频功率测量装置
公开(公告)号：JPS59163573A
公开(公告)日：1984-09-14
申请号：JP3950883
申请日：1983-03-09
申请人： Fujitsu Ltd
发明人： FUKAYA JIYUN
IPC分类号： G01R31/26
摘要： PURPOSE: To reduce a coupling between an input and an output, and to execute a measurement stably and with a good reproducibility by providing a conductive housing provided with a terminal part to which a strip line on an insulating substrate contained in an openable and closable rectangular parallelepiped-like space is connected.
CONSTITUTION: A side plate 15 is attached to a housing consisting of a base part 1 and a terminal assembly 3, and an upper cover 11 is placed on said plate and fixed by screwing a screw 12 into a tap 16 through a through-hole 14. When an interval (w) of two side plates 15 and an interval (h) between the lower face of the upper cover 11 and the upper face of the base part 1 are set to half or below of a wavelength in a measuring frequency, a propagation of TE
10 and TE
11 modes whose dimension is the lowest is prevented, therefore, other mode whose dimension is higher than that of said mode is not propagated at all, either. Therefore, a radiation of an electromagnetic wave in the measuring circuit is prevented, and also no feedback to the input side is generated. A semiconductor device to be measured 6 is placed on the measuring part.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：为了减少输入和输出之间的耦合，并通过提供具有端子部分的导电壳体来稳定地且具有良好的再现性来执行测量，绝缘基板上的带状线包含在可开闭的矩形平行六面体的空间相连。构成：侧板15附接到由基部1和端子组件3组成的壳体，并且上盖11放置在所述板上并通过通孔14将螺钉12拧入龙头16中而固定当两个侧板15的间隔（w）和上盖11的下表面与基部1的上表面之间的间隔（h）设定为测量频率的波长的一半或更小时，防止尺寸最小的TE10和TE11模式的传播，因此，其尺寸高于所述模式的其他模式也不会传播。因此，防止测量电路中的电磁波的辐射，并且也不产生对输入侧的反馈。将待测量的半导体器件6放置在测量部件上。

4. 发明专利

JPS59152701A Microstrip line 失效
标题翻译： MICROSTRIP LINE
公开(公告)号：JPS59152701A
公开(公告)日：1984-08-31
申请号：JP2570883
申请日：1983-02-18
申请人： Fujitsu Ltd
发明人： FUKAYA JIYUN
IPC分类号： H01P1/00 , H01P3/08 , H01P5/04
CPC分类号： H01P5/04
摘要： PURPOSE:To obtain a microstrip line whose impedance is changed continuously by forming a strip line on a dielectric substrate having elasticity and pressing the dielectric base plate so as to change the thickness. CONSTITUTION:The strip line having a stub and comprising a strip conductor 1 is formed on the dielectric base plate 5 having the elasticity, capable of being expanded and contracted in thickness direction and having less dielectric constant. A retaining plate 6 made of a hard insulator is placed on the stub 4, the plate 6 is pressed by an insulating screw 7 held by a metal-made jig 8 fixed to the insulating base plate 5 so as to change the susceptance of the stub 4 by changing the thickness of the insulating substrate 5.
摘要翻译：目的：通过在具有弹性的电介质基板上形成带状线并按压电介质基板来获得其阻抗连续变化的微带线，以便改变厚度。构成：具有短截线并且包括带状导体1的带状线形成在具有弹性的电介质基板5上，能够在厚度方向上膨胀和收缩并且具有较小的介电常数。将由硬质绝缘体制成的保持板6放置在短截线4上，板6被固定在绝缘基板5上的由金属制成的夹具8保持的绝缘螺钉7按压，以便改变短截线的电纳通过改变绝缘基板5的厚度来实现。

5. 发明专利

JPS59122209A High frequency amplifier 失效
标题翻译：高频放大器
公开(公告)号：JPS59122209A
公开(公告)日：1984-07-14
申请号：JP22971482
申请日：1982-12-28
申请人： Fujitsu Ltd
发明人： HIRANO YUTAKA , FUKAYA JIYUN , INABA SADAICHI , HAYAKAWA MASAHIRO , MATSUMOTO KAZUHIRO
IPC分类号： H03F3/60 , H03F3/193
摘要： PURPOSE: To obtain a prestage power supply from a poststage source and to omit a DC cutting capacitor by connecting plural resistors in series to use them as the source resistors of the poststage FET and connecting the nodes between the resistors to a gate and the drain of the prestage FET.
CONSTITUTION: The prestage FET Q1 of a cascade-connected amplifier is connected to a resistor R8 on the source side of the poststage FET Q2 through a matching circuit MN and voltage obtained by dividing a power supply VDD by the FET Q2 and resistors R
7 , R
8 is supplied as drain power supply. Since the FET Q1 is also connected to the gate of the poststage FET Q2, said voltage is also used as gate bias voltage. Therefore, it is unnecessary to connect a DC cutting capacitor between the prestage and poststage.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：从后级源获得预备电源，并通过串联多个电阻来省略直流切割电容器，将其用作后级FET的源极电阻，并将电阻之间的节点连接到栅极和漏极前置FET。构成：级联连接的放大器的前置FET Q1通过匹配电路MN连接到后级FET Q2的源极侧的电阻器R8，并且通过将电源VDD除以FET Q2和电阻器R7，R8而获得的电压作为漏电源供电。由于FET Q1也连接到后级FET Q2的栅极，所以也用作栅极偏置电压。因此，不需要在前级和后级之间连接直流切割电容器。

6. 发明专利

JPS60107868A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60107868A
公开(公告)日：1985-06-13
申请号：JP21415683
申请日：1983-11-16
申请人： FUJITSU LTD
发明人： FUKAYA JIYUN , HIRANO YUTAKA
IPC分类号： H01L21/338 , H01L21/60 , H01L29/80 , H01L29/812
摘要： PURPOSE:To eliminate the phase difference between unit transistors while avoiding reduction of gain or output by a method wherein pectinated structure microwave transistors are divided into groups containing multiple units of these transistors to be mutually connected with the central part of the group so far divided utilizing connecting conductors with the same length. CONSTITUTION:Pectinated structure microwave transistors composed of unit transistors 14a, 14b are divided into groups of multiple units of transistor regions 16, 17. Next these groups of transistors are fixed on a substrate composed of a gate bonding pad 11, drain bonding pads 12 and a source bonding pad 13 while the transistors 14a, 14b and the pads 11, 12 and 13 are mutually connected utilizing connecting conductors 15a, 15b with the same length. Through these procedures, the transistors 14a, 14b and the pads 11, 12 and 13 regardless of their distance from one another may mutually be connected utilizing the connecting conductors 15a, 15b with the same length to eliminate the phase difference between the unit transistors.

7. 发明专利

JPS58102565A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS58102565A
公开(公告)日：1983-06-18
申请号：JP20228281
申请日：1981-12-14
申请人： FUJITSU LTD
发明人： HIRANO YUTAKA , FUKAYA JIYUN
IPC分类号： H01L21/338 , H01L29/06 , H01L29/40 , H01L29/812
摘要： PURPOSE:To prevent the formation of an inversion layer, by providing the fourth electrode on the surface of a channel region. CONSTITUTION:On an N type GaAs active layer 2 formed on a GaAs substrate 1, a source electrode 4 of an AuGe alloy layer and an Au layer and a drain electrode 5 are formed. Next, a photo resist film 12 having an aperture 11 is formed, and, with it as a mask, a recess 13 is formed. Then, the photo resist film 12 is removed, a photo resist film 14 is newly formed, Al is adhered, a gate electrode 3 is formed, and accordingly the photo resist film 14 and the Al layer 3' are formed. Over the entire surface on the substrate, an Si dioxide film 15 is adhered, then an Al layer is formed thereon, and a photo etching is performed resulting in the formation of the fourth electrodes 16 and 16'. Thereafter, contact windows 17 and 18 are opened on the source electrode and the drain electrodes 4 and 5. When the source electrode 5 is earthed and a positive voltage is impressed on the drain electrode 4 and the electrodes 16 and 16', electrons are drawn near to the surface of the channel region 9, accordingly the inversion layer disappears.

8. 发明专利

JPS5735354A Sealing method for semiconductor housing container 失效
标题翻译：半导体封装容器的密封方法
公开(公告)号：JPS5735354A
公开(公告)日：1982-02-25
申请号：JP11123980
申请日：1980-08-13
申请人： Fujitsu Ltd
发明人： MATAYOSHI HIROICHI , MUGITANI HIROSHI , FUKAYA JIYUN
IPC分类号： H01L23/02 , H01L23/66
CPC分类号： H01L23/66 , H01L2924/0002 , H01L2924/00
摘要： PURPOSE:To enhance reliability of a high frequency, high power transistor, by providing an insulating material whose thickness is the same as leads between the external leads provided on a substrate, on which semiconductor elements are mounted, and providing the sealing by a cap. CONSTITUTION:A metalized layer 3 of Mo-Mn is formed and the external leads 2 comprising Kovar and the like are provided on substrate 1 of BeO and the like. The emiconductor elements such as the high frequency, high power transistor are mounted on the metalized layer 3. In the gap between said leads 2, the insulating materials 10 whose thickness is the same as that of the lead 2 are provided, and the sealing part is flattened. Then, sealing is performed by the cap with bonding resin. In this constitution, pin holes are not generated even though internal pressure becomes high, and the perfect sealing can be accomplished. Therefore the reliability of the transistor can be enhanced.
摘要翻译：目的：为了提高高频，高功率晶体管的可靠性，通过提供一种绝缘材料，其厚度与设置在其上安装有半导体元件的基板上的外部引线之间的引线相同，并通过盖提供密封。构成：形成Mo-Mn的金属化层3，将包含科瓦等的外部引线2设置在BeO等的基板1上。诸如高频高功率晶体管的半导体元件安装在金属化层3上。在所述引线2之间的间隙中，提供厚度与引线2相同的绝缘材料10，并且密封部分扁平化然后，用接合树脂通过盖进行密封。在这种结构中，即使内部压力变高，也不会产生销孔，并且可以实现完美的密封。因此，可以提高晶体管的可靠性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式