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1. 发明专利

JP2013084979A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013084979A
公开(公告)日：2013-05-09
申请号：JP2012284039
申请日：2012-12-27
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： NISHIMURA TAKEYOSHI , KOBAYASHI TAKASHI , NIIMURA YASUSHI , YAMADA TADANORI
IPC分类号： H01L27/04 , H01L21/329 , H01L21/822 , H01L21/8234 , H01L27/06 , H01L27/088 , H01L29/78 , H01L29/861 , H01L29/866 , H01L29/868
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving ESD resistance between a gate and a source without increasing on-state resistance.SOLUTION: A semiconductor device comprises structure of connecting in parallel zener diodes formed by using a polysilicon gate layer for improving ESD resistance, and the striped or rectangular zener diodes are connected in parallel to be each formed inside an active part.
摘要翻译：解决的问题：提供能够提高栅极和源极之间的ESD电阻而不增加导通电阻的半导体器件。解决方案：半导体器件包括通过使用多晶硅栅极层形成的并联齐纳二极管连接以提高ESD电阻的结构，并且条形或矩形齐纳二极管并联连接以形成在有源部分内部。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2011134984A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011134984A
公开(公告)日：2011-07-07
申请号：JP2009295035
申请日：2009-12-25
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： YAMADA TADANORI
IPC分类号： H01L29/78 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can be improved in trade-off between electromagnetic noise and turn-off loss. SOLUTION: The electromagnetic-wave noise is reduced, by making the charging/discharging time constant τ of a gate large by making the resistance of a gate lead-out part 40 (gate lead-out wiring 9 and a contact part 13 between the gate lead-out wiring 9 and a gate runner 15), the resistance of a gate electrode 5, and gate capacity Cg large at some of cells, and by suppressing dv/dt of an overshoot part by making a fall of a current in a small-current region gentle. The trade-off between the electromagnetic noise and turn-off loss is improved by suppressing the turn-off loss by making a fall in a large-current region steep. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供可以改善电磁噪声和关断损耗之间的折衷的半导体器件。解决方案：通过使栅极引出部分40（栅极引出布线9和接触部分13）的电阻使栅极的充电/放电时间常数τ变大，可以减小电磁波噪声在栅极引出布线9和栅极流道15之间），栅电极5的电阻和栅极电容Cg在一些单元处大，并且通过使电流下降来抑制过冲部分的dv / dt 在小流行地区温柔。电磁噪声和关断损耗之间的折衷通过使大电流区域下降而抑制关断损耗来提高。版权所有（C）2011，JPO＆INPIT

3. 发明专利

JP2014157925A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014157925A
公开(公告)日：2014-08-28
申请号：JP2013027960
申请日：2013-02-15
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： DENDA TOSHIO , SEKI TOMONORI , YAMADA TADANORI , SATO TADAHIKO
IPC分类号： H01L23/28 , H01L23/04 , H01L23/08 , H01L23/50 , H01L25/07 , H01L25/18
CPC分类号： H01L23/3114 , H01L23/057 , H01L23/13 , H01L23/24 , H01L23/3735 , H01L23/49548 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/85 , H01L2224/32225 , H01L2224/32245 , H01L2224/48247 , H01L2224/73265 , H01L2224/85205 , H01L2924/00014 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To prevent moisture intrusion from a gap between a lead and a resin case thereby improving the reliability of a semiconductor device including the lead which is integrally molded with the resin case to be provided in the resin case.SOLUTION: A semiconductor device 10 includes: a resin case 13 having a bottom surface part 13a, to which an insulation circuit board 12 is attached, and a side surface part 13b; a lead 14 which is integrally molded with the resin case 13, provided around the insulation circuit board 12 so as to be positioned on a surface of the bottom surface part 13a in the resin case 13, and partially extends from the interior of the resin case 13 to the exterior; and a sealing resin 17 filling the resin case 13. Recessed parts 18 are formed at both sides of the lead 14 along a periphery of the bottom surface part 13a in the resin case 13.
摘要翻译：要解决的问题：为了防止从引线和树脂壳体之间的间隙中的水分侵入，从而提高包括与要设置在树脂壳体中的树脂壳体一体模制的引线的半导体器件的可靠性。解决方案：半导体装置10包括：具有安装有绝缘电路板12的底表面部分13a和侧表面部分13b的树脂壳体13; 与树脂壳体13整体成型的引线14，设置在绝缘电路基板12的周围，以位于树脂外壳13的底面部13a的表面上，部分地从树脂外壳的内部延伸 13到外面; 以及填充树脂壳体13的密封树脂17.在树脂外壳13的底面部13a的周边，在引线14的两侧形成凹部18。

4. 发明专利

JP2014011386A Solar battery device 审中-公开
标题翻译：太阳能电池装置
公开(公告)号：JP2014011386A
公开(公告)日：2014-01-20
申请号：JP2012148584
申请日：2012-07-02
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： YAMADA TADANORI
IPC分类号： H01L31/04 , H03K17/24
CPC分类号： Y02E10/50
摘要： PROBLEM TO BE SOLVED: To provide a solar battery device having a simple configuration capable of easily and surely improving power generation efficiency of a solar cell module composed of a plurality of solar cell arrays connected in series.SOLUTION: A solar battery device includes a bypass circuit which is connected in parallel with each of a plurality of solar cell arrays composing a solar cell module to form a current bypass path for a solar cell array which does not generate an electromotive force. The bypass circuit comprises: a depression type FET for bypassing whose source and drain are connected between output ends of the solar cell array; a voltage detection circuit which is composed of first to third capacitors connected in series and is connected between the output ends of the solar cell array to divide and detect the electromotive force of the solar cell array; and a bypass control circuit which applies charging voltage of the second capacitor in the voltage detection circuit between the source and a gate of the depression type FET to turn off the depression type FET.
摘要翻译：要解决的问题：提供一种太阳能电池装置，其具有能够容易且可靠地提高由串联连接的多个太阳能电池阵列构成的太阳能电池模块的发电效率的简单结构。解决方案：太阳能电池装置包括旁路电路，其与构成太阳能电池模块的多个太阳能电池阵列中的每一个并联连接，以形成不产生电动势的太阳能电池阵列的电流旁路。旁路电路包括：用于旁路的抑制型FET，其源极和漏极连接在太阳能电池阵列的输出端之间; 电压检测电路，由串联连接的第一至第三电容器组成，并连接在太阳能电池阵列的输出端之间，以分隔和检测太阳能电池阵列的电动势; 以及旁路控制电路，其将所述第二电容器的充电电压施加在所述按压型FET的源极和栅极之间的电压检测电路中，以截止所述抑制型FET。

5. 发明专利

JP2013258321A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2013258321A
公开(公告)日：2013-12-26
申请号：JP2012133982
申请日：2012-06-13
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： DENDA TOSHIO , SEKI TOMONORI , YAMADA TADANORI , SATO TADAHIKO
IPC分类号： H01L25/07 , H01L25/18 , H02M7/48
CPC分类号： H01L25/18 , H01L23/043 , H01L23/24 , H01L23/3735 , H01L23/495 , H01L23/49517 , H01L23/49575 , H01L23/49811 , H01L23/49833 , H01L23/49861 , H01L23/50 , H01L24/48 , H01L24/49 , H01L25/162 , H01L2224/48091 , H01L2224/48101 , H01L2224/48105 , H01L2224/48137 , H01L2224/48139 , H01L2224/48247 , H01L2224/48472 , H01L2224/49107 , H01L2924/00014 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that is excellent in noise resistance and has a structure capable of being manufactured with a small number of manufacturing processes at low costs.SOLUTION: A main circuit wiring pattern 4 is formed on an insulation layer 3 of a main circuit board 1. Rear surfaces of the semiconductor chips 5 and 6 constituting a main circuit 10a are joined to the main circuit wiring pattern 4 of the main circuit board 1 through a joining material such as solder. Front surface electrodes of the semiconductor chips 5 and 6 are electrically connected with a power lead terminal 13a through a bonding wire 11 having a large wire diameter. A case 12 is bonded to a periphery of the main circuit board 1. A rear surface of a control semiconductor chip 9 constituting a control circuit 10b is joined to a control circuit wiring pattern 8b on a control circuit board 7 constituted of a bottom surface part 12-1 of the case 12 through the joining material. A main surface of the control circuit board 7 is located at a position higher than a main surface of the main circuit board 1, and level differences are formed by the main surface of the control circuit board 7 and the main surface of the main circuit board 1.
摘要翻译：要解决的问题：提供一种具有优异的耐噪声性并且具有能够以低成本制造少量制造工艺的结构的半导体器件。解决方案：主电路布线图案4形成在绝缘层3上构成主电路10a的半导体芯片5和6的后表面通过诸如焊料的接合材料接合到主电路板1的主电路布线图案4。半导体芯片5和6的前表面电极通过具有大的线径的接合线11与电源引线端子13a电连接。壳体12接合到主电路板1的周围。构成控制电路10b的控制半导体芯片9的后表面连接到控制电路布线图案8b上，控制电路板7由底表面部分 12-1的外壳12通过连接材料。控制电路板7的主表面位于比主电路板1的主表面高的位置，并且由控制电路板7的主表面和主电路板的主表面形成电平差 1。

6. 发明专利

JPH08195662A OVERCURRENT PROTECTING CIRCUIT OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08195662A
公开(公告)日：1996-07-30
申请号：JP459095
申请日：1995-01-17
申请人： FUJI ELECTRIC CO LTD
发明人： YAMADA TADANORI
IPC分类号： H03K17/78 , H03K17/08
摘要： PURPOSE: To make operation accurate by securely detecting an overcurrent for protecting the semiconductor device and stabilizing the potential of a control terminal to a reference potential point. CONSTITUTION: The source of a MOS transistor(TR) as the semiconductor device 10 is connected directly to a ground potential point as the reference potential point E of operation to stabilize the potential at a control terminal Tc. Then a parallel circuit of a diode 20 and a light emitting diode 30 is connected to the drain side of the semiconductor device 10 in series and a current I is shunt to the both, thereby setting a detected value of the overcurrent at, for example, their shunt ratio. A phototransistor is connected as a light receiving element 40 between the control terminal Tc and source and optically coupled with the light emitting diode 30. Consequently, when the overcurrent is detected through the light emission of the light emitting diode 30, the light receiving element 40 is placed in operation with the emitted light L to turn OFF, for example, the semiconductor device 10, thereby eliminating the overcurrent state.

7. 发明专利

JPH08321602A MIS SEMICONDUCTOR DEVICE AND CONTROLLING METHOD THEREOF 失效
公开(公告)号：JPH08321602A
公开(公告)日：1996-12-03
申请号：JP12694795
申请日：1995-05-26
申请人： FUJI ELECTRIC CO LTD
发明人： YAMADA TADANORI
IPC分类号： H01L29/78
摘要： PURPOSE: To simultaneously realize both characteristics of rapid switching characteristics and low on-resistance characteristics in an insulating gate type field effect transistor. CONSTITUTION: Two gate electrode layers 27 and 26 of a MOSFET are formed through an insulating film and selectively used, that is, the gate electrode 27 is used for switching in the turn-on and turn-off times while the gate electrode 26 is used for on-state only. In such a constitution, if the gate electrode 27 of a small Miller capacitance between the gate electrode and a silicon substrate is used, the switching rate can be increased while if the gate electrode 26 having a thin gate oxide film is used, the on-resistance in the normal state is lowered. Furthermore, in the turn-on time, after turning on by feeding a gate signal to the gate electrode 27, the gate signal is given to the gate electrode 26. Contrarily, in the turn off time, firstly, after turning off the gate signal fed to the electrode 26, the gate signal fed to the gate electrode 27 is turned off.

8. 发明专利

JPH10200023A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH10200023A
公开(公告)日：1998-07-31
申请号：JP110497
申请日：1997-01-08
申请人： FUJI ELECTRIC CO LTD
发明人： ARAI TOSHIHIRO , YAMADA TADANORI
IPC分类号： B21D28/00 , H01L23/48 , H01L23/50
摘要： PROBLEM TO BE SOLVED: To prevent solder bridges when a chip is mounted on a small outline package semiconductor device having dual elements assembled with a lead frame and improve the radiation for the heat of the chip. SOLUTION: The device comprises a lead frame 1, two power semiconductor element 2 mounted on the lead frame 1. On the lead frame 1a pair of the right and left die pads 1a are disposed and the chips of the power elements 2 are mounted on the die pads. Side walls 1a-1 rising towards the chip mounts along the opposed side edges of the die pads to block a molten solder from spreading at mounting the chips and couple each die pad 1a integrated with its outer leads 1b, thereby enhancing the radiation for the heat of the chip, utilizing the outer leads 1b as a heat transfer path.

9. 发明专利

JPH07288456A OVERVOLTAGE CLAMPING CIRCUIT FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH07288456A
公开(公告)日：1995-10-31
申请号：JP17057394
申请日：1994-07-22
申请人： FUJI ELECTRIC CO LTD
发明人： YAMADA TADANORI
IPC分类号： H01L29/78 , H03K17/08
摘要： PURPOSE:To enable protection of a protective semiconductor device from a overvoltage generated at the time of turn-off by providing an overvoltage detection circuit between the control input terminal and the output terminal of the protective semiconductor device. CONSTITUTION:When the overvoltage is generated at the turn-off process of a main semiconductor device 1 to be ON/OFF controlled and a voltage between terminals D and S of the protective semiconductor device 1 exceeds the avalanche yield voltage of an overvoltage detecting diode 13, an overvoltage detection circuit 12 is operated and the device 11 is turned on. Therefore, electro-magnetic energy stored in a inductive load 8 is discharged through the device 11 to the GND, and the overvoltage impressed between the output terminals of the device 11 and the device 1 parallelly connected to this device 11 and the GND can be clamped lower than the avalanche yield voltage of the diode 13. On the other hand, an overvoltage clamp circuit 10 sets the value of an input potential specifying resistor 15 optimumly for the clamping operation, the overvoltage clamping operation can be executed regardlessly of the switching frequency of the device 1 and at the same time, the device 11 can instantaneously discharge the stored electromagnetic energy of the load.

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