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1. 发明专利

JP2002026317A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2002026317A
公开(公告)日：2002-01-25
申请号：JP2000207712
申请日：2000-07-10
申请人： FUJITSU LTD , TOSHIBA CORP
发明人： NAKANISHI TOSHIRO , SUGURO KYOICHI , OZAWA YOSHIO , AKASAKA YASUSHI
IPC分类号： H01L21/28 , H01L29/423 , H01L29/43 , H01L29/49 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device comprising a polymetal structure together with its manufacturing method wherein a gate electrode is suppressed from depletion while a hot carrier resistance is assured. SOLUTION: There are provided a gate insulating film 12 formed on a silicon substrate 10, a gate electrode 20 which is formed on the gate insulating film and comprises a polysilicon film 14 and a metal film 18 formed on it, and an insulating film 24 which is selectively formed at a side wall of the polysilicon film. Here, in an interface between a silicon substrate at the lower part of the end of a gate electrode and the gate insulating film, a nitrogen is introduced whose concentration is higher than that of nitrogen in the interface between the gate insulating film and the silicon substrate directly below the gate electrode.

2. 发明专利

JP2001244345A METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001244345A
公开(公告)日：2001-09-07
申请号：JP2000052861
申请日：2000-02-29
申请人： FUJITSU LTD , TOSHIBA CORP
发明人： SUGIZAKI TARO , NAKANISHI TOSHIRO , SUGURO KYOICHI , MURAKOSHI ATSUSHI
IPC分类号： H01L21/265 , H01L21/316 , H01L21/8234 , H01L21/8242 , H01L27/088 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To provide a method for fabricating a semiconductor device having different thickness gate insulating films, which can form the different thickness insulating films while ensuring reliability of the gate insulating films and film thickness difference. SOLUTION: The semiconductor device is fabricated by a process of selectively introducing halogen element or argon to an element region 14 of a silicon substrate 10 and a process of forming a silicon oxide film 24 over an element region 16 and a silicon oxide film 22, which is thicker than film 24, over the element region 14 by wet oxidation of the substrate 10 under the reduced pressure or the diluted atmosphere by nitrogen or rare gas.

3. 发明专利

JP2003100868A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2003100868A
公开(公告)日：2003-04-04
申请号：JP2001297040
申请日：2001-09-27
申请人： TOSHIBA CORP , FUJITSU LTD , WINBOND ELECTRONICS CORP
发明人： AKASAKA YASUSHI , CHOU PAO-HWA , NAKANISHI TOSHIRO , SUGURO KYOICHI
IPC分类号： H01L21/28 , H01L21/318 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/52 , H01L23/522 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To remove the native oxide without reducing the thickness of a gate sidewall insulating film, by setting the etching rate of the gate sidewall insulating film formed of a silicon nitride film which is formed by LP-CVD method by using HCD as a material gas sufficiently lower than that of the native oxide. SOLUTION: The nitrogen density on the side of a gate sidewall insulating film formed of a silicon nitride film 33 is set between 1×10 cm to 5×10 cm inclusive and the native oxide is removed by wet etching by using HF.

4. 发明专利

JP2001189448A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR 失效
公开(公告)号：JP2001189448A
公开(公告)日：2001-07-10
申请号：JP37340699
申请日：1999-12-28
申请人： FUJITSU LTD , TOSHIBA CORP
发明人： OTAKE FUMIO , AKASAKA YASUSHI , MURAKOSHI ATSUSHI , SUGURO KYOICHI
IPC分类号： H01L29/78 , H01L21/28 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device, equipped with a gate electrode of polymetal laminated structure composed of a polysilicon film and a metal film, and to provide a method for manufacturing the same, where the gate electrode of a PMOSFET can be prevented from being depleted. SOLUTION: A semiconductor device is equipped with a pair of impurity diffused regions 38 which are provided in a silicon substrate 10 isolated from each other and a gate electrode 26 formed on the silicon substrate 10 between the diffusion regions 38 through the intermediary of a gate insulating film 12, where the gate electrode 26 is composed of a polysilicon film 16 formed on the gate insulating film 12, a polysilicon film 30 which is formed on the polysilicon film 16 but whose grain boundaries are not connected continuously to those of the polysilicon film 16, a metal nitride film 20 formed on the polysilicon film 30, and a metal film 22 formed on the barrier metal film 20.

5. 发明专利

JP2014053380A Semiconductor device manufacturing method and semiconductor manufacturing apparatus 有权
标题翻译：半导体器件制造方法和半导体制造设备
公开(公告)号：JP2014053380A
公开(公告)日：2014-03-20
申请号：JP2012195474
申请日：2012-09-05
申请人： Toshiba Corp , 株式会社東芝
发明人： SUGURO KYOICHI
IPC分类号： H01L21/20 , H01L21/268
CPC分类号： H01L21/02592 , H01L21/02532 , H01L21/0262 , H01L21/02667 , H01L21/02672 , H01L21/324 , H01L21/67011
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can obtain a good quality film having less crystal grain boundary; and provide a semiconductor manufacturing apparatus used for the semiconductor device manufacturing method.SOLUTION: In a semiconductor device manufacturing method of the present embodiment, a crystal film is formed on a semiconductor substrate by irradiation of a first microwave obtained by frequency modulation or phase modulation of a first carrier wave which is a sine wave having a first frequency by using a first signal wave which is a sine wave or a pulse wave having a third frequency lower than the first frequency and a second microwave obtained by frequency modulation or phase modulation of a second carrier wave which is a sine wave having a second frequency higher than the first frequency by using a second signal wave which is a sine wave or a pulse wave having a fourth frequency lower than the second frequency.
摘要翻译：要解决的问题：提供一种半导体器件制造方法，其可以获得具有较少晶界的优质膜; 并提供用于半导体器件制造方法的半导体制造装置。解决方案：在本实施例的半导体器件制造方法中，通过照射通过频率调制或相位调制获得的第一微波，在半导体衬底上形成晶体膜第一载波是通过使用正弦波的第一信号波或具有比第一频率低的第三频率的脉冲波的具有第一频率的正弦波，以及通过频率调制或相位调制获得的第二微波通过使用作为正弦波的第二信号波或具有比第二频率低的第四频率的脉搏波，其是具有比第一频率高的第二频率的正弦波的第二载波。

6. 发明专利

JP2013197419A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2013197419A
公开(公告)日：2013-09-30
申请号：JP2012064543
申请日：2012-03-21
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKAHASHI SHIGEKI , TANIGUCHI SHUICHI , KASAHARA YUSUKE , HAYASHI HISATAKA , SUGURO KYOICHI
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , H01L43/08 , H01L43/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can successfully etch a laminated film in which a plurality of types of films are laminated.SOLUTION: A semiconductor device manufacturing method according to an embodiment comprises: a process of forming a laminated film 18 in which a plurality of types of films are laminated on base regions 14, 16; a process of forming a mask pattern 24 on the laminated film; and a process of etching the laminated film with at least cluster ion beams 26 by using the mask pattern as a mask.
摘要翻译：要解决的问题：提供一种半导体器件制造方法，其可以成功地蚀刻层叠多种类型的膜的叠层膜。方案：根据实施方案的半导体器件制造方法包括：形成层压膜的工艺 18，其中多个类型的膜层压在基底区域14,16上; 在层叠膜上形成掩模图案24的工序; 以及通过使用掩模图案作为掩模，用至少簇离子束26来蚀刻层压膜的工艺。

7. 发明专利

JP2013161932A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2013161932A
公开(公告)日：2013-08-19
申请号：JP2012022331
申请日：2012-02-03
申请人： Toshiba Corp , 株式会社東芝
发明人： TSUCHIAKI MASAKATSU , MIZUSHIMA ICHIRO , SUGURO KYOICHI
IPC分类号： H01L21/02 , H01L21/20 , H01L21/8234 , H01L27/08 , H01L27/088 , H01L27/12
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of forming a single crystal semiconductor layer at a plurality of places spaced apart each other on a substrate.SOLUTION: In a method of manufacturing a semiconductor device, firstly, a master substrate 50 is prepared where a plurality of single crystal Si layers 52a-52h are formed spaced apart each other, and an amorphous Si layer 12 is formed on a substrate 11. Then, CeOfilms 61 and 62 are formed on at least one of the master substrate 50 and the substrate 11. After that, the single crystal Si layers 52a-52h on the master substrate 50 and the amorphous Si layer 12 on the substrate 11 are contacted through the CeOfilms 61 and 62 and heated. The CeOfilm 62 and the amorphous Si layer 12 are crystallized to match crystal structure and crystal orientation with those of the single crystal Si layers 52a-52h, thereby single crystal Si layers 12a-12h are formed. Then, while the single crystal Si layers 52a-52h and the single crystal Si layers 12a-12h are left out, the CeOfilms 61 and 62 are removed, thus the master substrate 50 is separated from the substrate 11.
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，该半导体器件能够在衬底上彼此间隔开的多个位置处形成单晶半导体层。解决方案：在制造半导体器件的方法中，首先，制备基板50，其中多个单晶Si层52a-52h彼此隔开形成，并且在基板11上形成非晶Si层12.然后，在主板中的至少一个上形成CeO膜61和62 衬底50和衬底11.然后，母板50上的单晶Si层52a-52h和衬底11上的非晶Si层12通过CeO膜61和62接触并加热。 CeO膜62和非晶Si层12结晶化以使晶体结构和晶体取向与单晶Si层52a-52h的晶体结构和晶体取向相一致，从而形成单晶Si层12a-12h。然后，当单晶Si层52a-52h和单晶Si层12a-12h被排出时，去除CeO膜61和62，从而将母板50与衬底11分离。

8. 发明专利

JP2013069719A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013069719A
公开(公告)日：2013-04-18
申请号：JP2011205078
申请日：2011-09-20
申请人： Toshiba Corp , 株式会社東芝
发明人： SUGURO KYOICHI
IPC分类号： H01L21/02 , H01L21/265 , H01L27/12
CPC分类号： H01L21/76254
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and a method of manufacturing the same capable of reducing a wasted portion in a semiconductor substrate as much as possible, and simultaneously, of achieving reduction in manufacturing cost and reduction in environmental load by reusing the semiconductor substrate.SOLUTION: A method of manufacturing a semiconductor device according to an embodiment includes: implanting ion to a first substrate; bonding the first substrate and a second substrate with each other; emitting microwave to agglomerate ion in a planar state on a desired position in the first substrate and form an agglomeration region spread in a planar state; detaching the bonded first and second substrates in the agglomeration region to separate into the second substrate having a part of the first substrate and the residual first substrate; and grinding a part of the rear face side second substrate on an opposite side of the detachment surface in the second substrate having the part of the first substrate.
摘要翻译：解决的问题：为了提供能够尽可能地减少半导体衬底中的浪费部分的半导体器件及其制造方法，同时，通过以下方式实现制造成本的降低和环境负荷的降低重新使用半导体衬底。解决方案：根据实施例的制造半导体器件的方法包括：将离子注入第一衬底; 将第一基板和第二基板彼此接合; 发射微波以在平面状态下在第一基板中的期望位置附聚离子，并形成在平面状态下扩散的附聚区域; 将结合区域中的结合的第一和第二衬底分离以分离成具有第一衬底和残留的第一衬底的一部分的第二衬底; 以及在具有所述第一基板的一部分的所述第二基板中的所述分离表面的相反侧上研磨所述背面侧第二基板的一部分。版权所有（C）2013，JPO＆INPIT

9. 发明专利

JP2012134460A Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：JP2012134460A
公开(公告)日：2012-07-12
申请号：JP2011244609
申请日：2011-11-08
申请人： Toshiba Corp , 株式会社東芝
发明人： SUGURO KYOICHI
IPC分类号： H01L21/265 , H01L21/336 , H01L21/76 , H01L21/8238 , H01L21/8247 , H01L27/092 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L21/2658 , H01L21/2236 , H01L21/26506 , H01L21/26513 , H01L21/823807 , H01L21/823814 , H01L29/517 , H01L29/66537 , H01L29/6659
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which reduces crystal defects with inhibiting diffusion of implanted impurities.SOLUTION: A semiconductor device manufacturing method of an embodiment comprises a step of forming an impurity implanted layer 9 obtained by implanting, into the semiconductor layer 1, first impurities 80 containing phosphorous or boron in a form of molecular ion and second impurities 81 containing carbon, fluorine or nitrogen of an implantation amount less than that of phosphorous or boron in a form of molecular ion, or containing carbon of an implantation amount less than that of phosphorous or boron in a form of atomic ion.

10. 发明专利

JP2010153889A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010153889A
公开(公告)日：2010-07-08
申请号：JP2010028017
申请日：2010-02-10
申请人： Toshiba Corp , 株式会社東芝
发明人： ITO TAKAYUKI , SUGURO KYOICHI
IPC分类号： H01L21/265 , H01L21/266 , H01L21/336 , H01L29/78 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a flash lamp annealing method without causing any damage on an Si wafer.
SOLUTION: The method for manufacturing a semiconductor device includes: a process for arranging a flash lamp light source 5 having a plurality of flash lamps, above the Si wafer 1 having a single crystal Si region; a process including a first heat treatment and a second heat treatment of heating the Si wafer by heat radiated from the light source, wherein the Si wafer is heated in each of the first and second heat treatments so as to form such a light intensity distribution on the Si wafer by the light that the intensity has a maximum value in a direction differing from that of a crystal orientation of the single crystal Si region, and an array direction of the plurality of flash lamps in the first heat treatment is different from that in the second heat treatment. The crystal orientation 9 of the single crystal Si region is a cleavage plane orientation of the single crystal Si region.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供闪光灯退火方法，而不会对Si晶片造成任何损坏。解决方案：用于制造半导体器件的方法包括：在具有单晶Si区域的Si晶片1上方布置具有多个闪光灯的闪光灯光源5的处理; 一种包括第一热处理和通过从光源照射的热量来加热Si晶片的第二热处理的处理，其中在第一和第二热处理中的每一个中加热Si晶片，以便形成这样的光强度分布 Si晶片的强度在与单晶Si区域的晶体取向不同的方向上具有最大值，并且第一热处理中的多个闪光灯的排列方向不同于第二次热处理。单晶Si区域的晶体取向9是单晶Si区域的解理面取向。版权所有（C）2010，JPO＆INPIT

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