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1. 发明专利

JP2003297950A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2003297950A
公开(公告)日：2003-10-17
申请号：JP2002094633
申请日：2002-03-29
申请人： Fujitsu Ltd , Toshiba Corp , Winbond Electron Corp , ウィンボンドエレクトロニクスコープ , 富士通株式会社 , 株式会社東芝
发明人： NAKANISHI TOSHIRO , OZAWA YOSHIO , CHAN SHUU-EN
IPC分类号： H01L21/76 , H01L21/8234 , H01L21/8242 , H01L27/08 , H01L27/088 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can avoid a lowering in reliability of a gate insulation film caused by height difference of an embedding oxide film by an STI method between a memory cell region and a peripheral circuit region and improve withstand voltage property of a gate insulation film, and to provide its manufacturing method.
SOLUTION: The semiconductor device has a silicon substrate 10 with a memory cell region and a peripheral circuit region, a silicon oxide film 16a which is embedded in a memory cell region 12 of the silicon substrate 10 and defines an element active region in the memory cell region 12 and a silicon oxide film 16a which is embedded in a peripheral circuit region 14 of the silicon substrate 10 and defines an element active region in the peripheral circuit region 14. The height of the surface of the silicon oxide film 16b is higher than that of the surface of the silicon oxide film 16a.
COPYRIGHT: (C)2004,JPO
摘要翻译：解决的问题：提供一种半导体器件，其可以避免由存储单元区域和外围电路区域之间的STI方法引起的嵌入氧化膜的高度差引起的栅极绝缘膜的可靠性降低，并且改善提供栅极绝缘膜的耐压性，并提供其制造方法。解决方案：半导体器件具有带有存储单元区域和外围电路区域的硅衬底10，硅衬底10嵌入在硅衬底10的存储单元区域12中并限定元件有源区域的氧化硅膜16a 存储单元区域12和硅衬底10的外围电路区域14中的氧化硅膜16a，并且在外围电路区域14中限定元件有源区。氧化硅膜16b的表面的高度为高于氧化硅膜16a的表面。版权所有（C）2004，JPO

2. 发明专利

JP2003100868A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2003100868A
公开(公告)日：2003-04-04
申请号：JP2001297040
申请日：2001-09-27
申请人： TOSHIBA CORP , FUJITSU LTD , WINBOND ELECTRONICS CORP
发明人： AKASAKA YASUSHI , CHOU PAO-HWA , NAKANISHI TOSHIRO , SUGURO KYOICHI
IPC分类号： H01L21/28 , H01L21/318 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/52 , H01L23/522 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To remove the native oxide without reducing the thickness of a gate sidewall insulating film, by setting the etching rate of the gate sidewall insulating film formed of a silicon nitride film which is formed by LP-CVD method by using HCD as a material gas sufficiently lower than that of the native oxide. SOLUTION: The nitrogen density on the side of a gate sidewall insulating film formed of a silicon nitride film 33 is set between 1×10 cm to 5×10 cm inclusive and the native oxide is removed by wet etching by using HF.

3. 发明专利

JP2002026317A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2002026317A
公开(公告)日：2002-01-25
申请号：JP2000207712
申请日：2000-07-10
申请人： FUJITSU LTD , TOSHIBA CORP
发明人： NAKANISHI TOSHIRO , SUGURO KYOICHI , OZAWA YOSHIO , AKASAKA YASUSHI
IPC分类号： H01L21/28 , H01L29/423 , H01L29/43 , H01L29/49 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device comprising a polymetal structure together with its manufacturing method wherein a gate electrode is suppressed from depletion while a hot carrier resistance is assured. SOLUTION: There are provided a gate insulating film 12 formed on a silicon substrate 10, a gate electrode 20 which is formed on the gate insulating film and comprises a polysilicon film 14 and a metal film 18 formed on it, and an insulating film 24 which is selectively formed at a side wall of the polysilicon film. Here, in an interface between a silicon substrate at the lower part of the end of a gate electrode and the gate insulating film, a nitrogen is introduced whose concentration is higher than that of nitrogen in the interface between the gate insulating film and the silicon substrate directly below the gate electrode.

4. 发明专利

JP2001244345A METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001244345A
公开(公告)日：2001-09-07
申请号：JP2000052861
申请日：2000-02-29
申请人： FUJITSU LTD , TOSHIBA CORP
发明人： SUGIZAKI TARO , NAKANISHI TOSHIRO , SUGURO KYOICHI , MURAKOSHI ATSUSHI
IPC分类号： H01L21/265 , H01L21/316 , H01L21/8234 , H01L21/8242 , H01L27/088 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To provide a method for fabricating a semiconductor device having different thickness gate insulating films, which can form the different thickness insulating films while ensuring reliability of the gate insulating films and film thickness difference. SOLUTION: The semiconductor device is fabricated by a process of selectively introducing halogen element or argon to an element region 14 of a silicon substrate 10 and a process of forming a silicon oxide film 24 over an element region 16 and a silicon oxide film 22, which is thicker than film 24, over the element region 14 by wet oxidation of the substrate 10 under the reduced pressure or the diluted atmosphere by nitrogen or rare gas.

5. 发明专利

JP2551681B2 失效
公开(公告)号：JP2551681B2
公开(公告)日：1996-11-06
申请号：JP16203990
申请日：1990-06-20
申请人： FUJITSU LTD
发明人： NAKANISHI TOSHIRO
IPC分类号： H01L21/316 , H01L21/28 , H01L21/3115 , H01L21/336 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/108 , H01L29/51 , H01L29/78

6. 发明专利

JPH08250720A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08250720A
公开(公告)日：1996-09-27
申请号：JP5214795
申请日：1995-03-13
申请人： FUJITSU LTD
发明人： OKUNO MASAKI , NAKANISHI TOSHIRO
IPC分类号： H01L21/28 , H01L21/304 , H01L29/78
摘要： PURPOSE: To check deterioration in the insulation characteristics of a gate oxide film for enhancing the reliability thereupon by a method wherein any residual resist, etc., is removed in the state of a resist pattern ashed away for protecting the gate oxide film by a polysilicon film. CONSTITUTION: Within the semiconductor device, an SiO2 etching mask 4a for gate electrode is formed and after ashing away a resist pattern 5, a gate oxide film 2 is wet-washed away for removing any residual resist, etc., in the protected state by a polysilicon film 3 so as to check the immersion of water content in the gate oxide film 2 during the washing step. Furthermore, since the polysilicon film 3 is dry-etched using the etching mask 4a of SiO2 to form a gate electrode 3a, the wet etching for removing the residual resist, etc., after the formation of the gate electrode 3a can be eliminated. Accordingly, the immersion of water content in the gate oxide film can be checked thereby enabling the deterioration in the insulation characteristics of the gate oxide film 2 to be checked for realizing a high reliable MOS transistor.

7. 发明专利

JPH08238745A FORMING METHOD FOR OXIDE FILM 失效
公开(公告)号：JPH08238745A
公开(公告)日：1996-09-17
申请号：JP7726195
申请日：1995-03-07
申请人： FUJITSU LTD
发明人： OKUBO SATOSHI , TAMURA YASUYUKI , AOYAMA ATSUYUKI , NAKANISHI TOSHIRO
IPC分类号： H01L21/316 , B41F7/40 , B41F33/10
摘要： PURPOSE: To realize the formation of an insulating film such as a dense gate oxide film adapted for high reliability of an insulating film such as a gate oxide film in the case of developing a MOS transistor. CONSTITUTION: Ozone is introduced to a natural oxide film formed on a silicon wafer 1 while emitting ultraviolet rays at 25 deg.C or lower by wet cleaning the wafer 1 to form a silicon oxide film. A silicon dioxide film formed on the wafer 1 is heat-treated in an atmosphere containing the ozone.

8. 发明专利

JPH0786271A MANUFACTURE OF SILICON OXIDE FILM 失效
公开(公告)号：JPH0786271A
公开(公告)日：1995-03-31
申请号：JP23194493
申请日：1993-09-17
申请人： FUJITSU LTD
发明人： NAKANISHI TOSHIRO , SATO YASUHISA , OKUNO MASAKI
IPC分类号： H01L21/316 , H01L21/306 , H01L29/78
摘要： PURPOSE:To maintain high productivity and manufacture an oxide film which has less oxygen vacancy and hydrogen bonding by carrying a silicon wafer into a reaction tube without exposing to the air, introducing gas which contains ozone into the reaction tube, permitting the tube inside to be under the prescribed pressure and heating the wafer to the prescribed temperature so as to oxidize the surface. CONSTITUTION:A silicon wafer 9 is placed in a reaction tube 1 which allows the introduction and exhaustion of oxidizing gas, the silicon wafer 9 is heated in the oxidizing atmosphere so as to oxidize the surface and a silicon oxide film is formed. In such case, the silicon wafer 9 is carried into the reaction tube 1 without exposing to the air, gas which contains ozone is introduced into the reaction tube 1 and the tube inside is permitted to be under the prescribed pressure. Then the silicon wafer 9 is heated to the prescribed temperature and the surface is oxidized. For example, the wafer 9 is carried in vacuum by evacuating the reaction tube and opening a gate valve 7. Then, after supplying oxygen and ozone mixed gas so as to allow inside of the reaction tube 1 to be under the prescribed pressure, the wafer 9 is shifted to the high- temperature part and is oxidized.

9. 发明专利

JPH06204494A FORMATION OF INSULATING FILM AND MANUFACTURE OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH06204494A
公开(公告)日：1994-07-22
申请号：JP1711793
申请日：1993-01-07
申请人： FUJITSU LTD
发明人： NAKANISHI TOSHIRO , SATO YASUHISA
IPC分类号： H01L21/316 , H01L21/8247 , H01L29/788 , H01L29/792
摘要： PURPOSE:To provide an insulating film which evades breakdown due to the capture of holes when injecting charges through the insulating film in the manufacture of semiconductor elements. CONSTITUTION:Smooth recesses and projections are formed by chemical etching 1 at an interval of 1-20nm on the surface of a silicon wafer. The surface of the silicon wafer is thereafter oxidized by heating to form an insulating film 2. To form recesses and projections on the surface of a silicon wafer, any of the following methods may be used: Method wherein the surface of a silicon wafer having a spontaneous oxide film is heated and cleaned using a mixture of hydrochloric acid, hydrogen peroxide and water to form thicker portions and thinner portions in the spontaneous oxide film, and the surface of the silicon wafer is etched over the oxide film using a mixture of hydrofluoric acid and nitric acid; method wherein the surface of a silicon wafer having a spontaneous oxide film is heated and cleaned using nitric acid or a mixture of ammonia, hydrogen peroxide and water; or method wherein the surface of a silicon wafer is subjected to dry etching using chlorine gas under ultraviolet irradiation.

10. 发明专利

JPH023990A SOLID-STATE IMAGE PICKUP ELEMENT 失效
公开(公告)号：JPH023990A
公开(公告)日：1990-01-09
申请号：JP15420488
申请日：1988-06-22
申请人： FUJITSU LTD
发明人： NAKANISHI TOSHIRO
IPC分类号： H04N9/07 , H01L27/14 , H01L31/02
摘要： PURPOSE:To reduce the size of a camera while holding desirable sensitivity, by using a variable wavelength interference filter for selecting a wavelength band of transmitted light in accordance with the three primary colors so that signals of the three primary colors are taken out of a single pigment in time series. CONSTITUTION:Incident light 2 corresponding to an optical image reaches a solid-state image pickup element after passing through a variable wavelength interference filter 102. The variable wavelength interference filter 102 controls a wavelength band of transmitted light in accordance with respective wavelengths of the three primary colors by a control drive means 117. As a result, the solid-state image pickup element outputs photoelectric conversion signals of red, green and blue signals sequentially at every change of the band in the form of serial signals. Thus, signals of the three primary colors can be outputted from a single photodetector 106 and, therefore, a high-quality image signal can be outputted with high sensitivity. Further, the size of the camera can be decreased.

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