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1. 发明专利

JP2003330835A Character information transfer method, portable terminal and information processor 审中-公开
标题翻译：字符信息传输方法，便携式终端和信息处理器
公开(公告)号：JP2003330835A
公开(公告)日：2003-11-21
申请号：JP2002140079
申请日：2002-05-15
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NISHISEI MAKOTO , SATO TETSUTO , EGUCHI KAZUSHIGE , YAMASHITA ATSUSHI , OTA SACHIKO , ASAI KAORI , NOGUCHI YOKO
IPC分类号： G06F13/00 , H04B7/26 , H04M1/00 , H04M11/00
摘要： PROBLEM TO BE SOLVED: To provide a character information transfer method, a portable terminal and an information processor for reducing the size and weight of the information processor and efficiently improving the usability of the information processor and the portable terminal. SOLUTION: In this character information transfer method for solving the problem, character information input using the portable terminal is transferred to the information processor connected to the portable terminal. The portable terminal has the adding procedure for adding an identifier for identifying application operated by the information processor to the character edited character information, and the transfer procedure for transferring the character information to which the identifier is added by the adding procedure to the information processor. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供字符信息传送方法，便携式终端和信息处理器，用于减小信息处理器的尺寸和重量，并有效提高信息处理器和便携式终端的可用性。解决方案：在用于解决问题的字符信息传送方法中，使用便携式终端输入的字符信息被传送到连接到便携式终端的信息处理器。便携式终端具有将用于识别由信息处理器操作的应用的标识符添加到字符编辑字符信息的添加过程，以及用于通过添加过程向信息处理器传送添加了标识符的字符信息的传送过程。版权所有（C）2004，JPO

2. 发明专利

JP2003070055A Mobile communication system, radio base station, radio equipment, and mobile terminal 有权
标题翻译：移动通信系统，无线电基站，无线电设备和移动终端
公开(公告)号：JP2003070055A
公开(公告)日：2003-03-07
申请号：JP2001256952
申请日：2001-08-27
申请人： Fujitsu Ltd , 富士通株式会社
发明人： YAMASHITA ATSUSHI
IPC分类号： H04B1/707 , H04B1/7097 , H04W16/02 , H04W24/00 , H04W72/02 , H04W72/04 , H04Q7/36
CPC分类号： H04W72/02 , H04W24/00 , H04W64/006 , H04W72/0453
摘要： PROBLEM TO BE SOLVED: To provide a mobile communication system, having a non-monotonous relation between terminal moving speed (Doppler frequency) and transmission quality deterioration, which can improve the communication quality and increase channel capacity.
SOLUTION: The mobile communication system includes a detection means 20B for detecting information(referred to as information speed, hereinafter) on the mobile speed (referred to as terminal mobile speed, hereinafter) of a mobile terminal 2, on the basis of a signal received from the mobile terminal 2; selection control means 20D and 27 for selecting operating frequency is in a higher frequency band, the higher the speed information detected by the detection means 20B is, selecting operating frequency in a lower frequency band, the lower the speed information is, and allocating the operating frequency to the mobile terminal.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种移动通信系统，其具有终端移动速度（多普勒频率）与传输质量恶化之间的非单调关系，这可以提高通信质量并增加信道容量。解决方案：移动通信系统包括检测装置20B，用于根据接收到的信号检测关于移动终端2的移动速度（以下称为终端移动速度）的信息（以下称为信息速度）从移动终端2; 用于选择操作频率的选择控制装置20D和27处于较高频带中，检测装置20B检测的速度信息越高，选择较低频带中的操作频率，速度信息越低，并且分配操作频率到移动终端。

3. 发明专利

JP2002359608A BASE STATION AND REMOTE STATION 审中-公开
公开(公告)号：JP2002359608A
公开(公告)日：2002-12-13
申请号：JP2002099340
申请日：2002-04-01
申请人： FUJITSU LTD
发明人： TAKENAKA TETSUKI , USHIYAMA TAKAYUKI , YAMASHITA ATSUSHI
IPC分类号： H04J13/00 , H04J13/16 , H04W28/18 , H04W72/04 , H04J13/04 , H04Q7/38
摘要： PROBLEM TO BE SOLVED: To provide an effective means other than transmission power control of remote stations in order to solve a near and far problem through the reduction of inter-signal interference at demodulation based on unbalance in received electric field strength of signals by a base station from the remote stations in the CDMA radio communication system comprising the base station and a plurality of the remote stations or the like. SOLUTION: This CDMA radio communication system can control the chip rate of the CVDMA spread codes in a plurality of stages. Each remote station informs the base station about information associated with the performance of its own station, the base station decides the chip rate of the spread code of its transmission signal from each remote station based on the received information about the performance of the remote station, and informs the remote station about the decided chip rate so as to allow each remote station to generate the spread code based on the chip rate and to apply spread spectrum modulation to the transmission signal.

4. 发明专利

JPH0837479A SEQUENTIAL DIGITAL ADAPTIVE EQUALIZER 失效
公开(公告)号：JPH0837479A
公开(公告)日：1996-02-06
申请号：JP17073894
申请日：1994-07-22
申请人： FUJITSU LTD
发明人： HAMADA HAJIME , UCHIJIMA MAKOTO , YAMASHITA ATSUSHI , NAKAMURA MICHIHARU
IPC分类号： H03H21/00 , H03H15/00 , H03H17/00 , H03M13/23 , H04B3/10 , H04L27/01 , H03M13/12
摘要： PURPOSE:To reduce the scale of memory and the like capacity without deteriorating the equalization characteristic by conducting training based on a training signal in the middle part of a burst signal and applying equalizing processing to data parts before and after tne training signal separately. CONSTITUTION:A burst signal formed by inserting a training signal between data parts is received and stored in a buffer memory 1. The training signal in the burst signal is read and a propagation path impulse response calculation section 2 calculates an impulse response of the propagation path by reading the training signal in the burst signal and using a know training signal. When the processing as to the training signal is finished, the data part before or after the training signal is sequentially read from the buffer memory 1. Then a replica signal based on the impulse response and an equalizing output signal is generated from a replica generating section 3 and adder 5 is used to eliminate a delay wave component and an the result is inputted to a sequential equalization section 4. The sequential equalization section 4 uses the sequential decoding algorithm such as fano algorithm or stack algorithm to conduct equalization processing and an equalization output signal is obtained.

5. 发明专利

JPH0758672A DIGITAL ADAPTIVE EQUALIZER 失效
公开(公告)号：JPH0758672A
公开(公告)日：1995-03-03
申请号：JP20133493
申请日：1993-08-13
申请人： FUJITSU LTD
发明人： HAMADA HAJIME , YAMASHITA ATSUSHI
IPC分类号： H03H21/00 , H03H15/00 , H03H17/00 , H03H17/02 , H04B3/06 , H04B7/005 , H04B7/02
摘要： PURPOSE:To make a circuit scale small and to reduce a calculation amount by providing a successive equalization part using successive decoding algorithm. CONSTITUTION:By a received training series, the impulse response CIR of a propagation line is calculated in a propagation line impulse response calculation part 1. A replica generation part 2 generates replica signals based on the impulse response CIR of the propagation line and equalized output signals and a branch metric calculation part 3 calculates the square of the absolute value of a difference between the replica signals and reception signals through the propagation line as branch metric. A conversion table 4 converts the branch metric to Fano metric obtained from the distribution function of the branch metric for instance and the successive equalization part 5 equalizes the reception signals by applying the successive decoding algorithm such as the Fano algorithm and stack algorithm, etc.

6. 发明专利

JPH06276176A CDMA COMMUNICATION SYSTEM 失效
公开(公告)号：JPH06276176A
公开(公告)日：1994-09-30
申请号：JP5845793
申请日：1993-03-18
申请人： FUJITSU LTD
发明人： TAKENAKA TETSUYOSHI , USHIYAMA TAKAYUKI , YAMASHITA ATSUSHI
IPC分类号： H04B7/26 , H04J13/00 , H04W28/18 , H04W72/04
摘要： PURPOSE:To reduce intra-signal interference at the time of demodulating signals from respective remote stations and to solve a perspective problem by preparing plural chip rates and appropriately allocating them for the respective remote stations. CONSTITUTION:When the power level of reception signals initially detected by a reception power detection part 5 is as showh by a figure (b) for the signals from the remote stations RS1 and RS2 inputted to the spectrum inverse spread demodulation part 4 of a base station BS3, a chip rate deciding blade 6 judges that the reception power level of the RS1 is to be strong interference in the inverse spread demodulation of the signals of the RS2. Then, the present chip rate Cj of the RS1 is changed and decided to be Ci lower than the Cj and the RS1 is informed from a chip rate informing part 7. In the RS1, a spreading code is generated corresponding to the chip rate Ci informed from the BS by a spreading code generation part 8, is supplied to a spectrum spread modulation part 9 to perform spectrum spread modulation and is transmitted to the BS. Thus the reception power level from the RS1 and RS2 in the BS is turned to be as shown by the figure (c,) the BS performs an inverse spread processing by the chip rate Cj and the interference is reduced.

7. 发明专利

JPH06104865A CDMA TIME-DIVISION MULTIPLEX COMMUNICATION SYSTEM 失效
公开(公告)号：JPH06104865A
公开(公告)日：1994-04-15
申请号：JP25429392
申请日：1992-09-24
申请人： FUJITSU LTD
发明人： YAMASHITA ATSUSHI , TAKEDA YUKIO
IPC分类号： H04Q7/38 , H04B7/26 , H04J13/00 , H04L5/16
摘要： PURPOSE:To provide the CDMA time-division multiplex communication system in which the same carrier frequency is used for an incoming line and an out going line to apply time division multiplex processing to the signal with respect to the code division multiplexing (CDMA) communication system employing the spread spectrum communication system. CONSTITUTION:A same carrier frequency f1 is used for an incoming line and an outgoing line between a mobile station 2 and a base station 1 in the code division multiplexing communication system employing the spread spectrum communication system in which spread spectrum processing is implemented by using a different spread code string different from each channel and multiplexed, and the base station 1 and the mobile station 2 make alternate transmission reception by time division multiplexing for the communication.

8. 发明专利

JPH03258131A DELAY SYNCHRONIZING LOOP CIRCUIT 失效
公开(公告)号：JPH03258131A
公开(公告)日：1991-11-18
申请号：JP5771390
申请日：1990-03-08
申请人： FUJITSU LTD
发明人： IIZUKA NOBORU , YAMASHITA ATSUSHI , MATSUYAMA KOJI
IPC分类号： H04J13/00 , H04B1/7085 , H04L7/00
摘要： PURPOSE:To fix a voltage controlled oscillator to a prescribed voltage and to quicken the synchronization locking by bringing the state to a synchronizing loop control range deviation state when any of a correlation between a reception signal and two adjacent receiver PN code series is a prescribed threshold level or below. CONSTITUTION:A transmission data modulated by a PN code series (CS) is used as a reception signal Sr, a correlation between a receiver side code equal to the series CS and the signal Sr is obtained by two multiplier sections 1, 2 and envelope detectors 3, 4. Correlation outputs (1), (2) of the detectors 3, 4 are fed to a subtractor 6 and a phase comparator section 9 and when any of the outputs (1), (2) reaches a threshold level being zero and an offset or below, the state is discriminated to be a synchronizing loop control range deviation state, and a selector 10 selects a prescribed voltage +V controlling a voltage controlled oscillator VCO 7 in place of an output of a loop filter 6. Thus, the synchronization locking is quickened without deviating the control range of the delay synchronizing loop.

9. 发明专利

JPH0394537A TEST METHOD FOR COMMUNICATION EQUIPMENT USING PUNCTURED CODE 失效
公开(公告)号：JPH0394537A
公开(公告)日：1991-04-19
申请号：JP9810789
申请日：1989-04-18
申请人： FUJITSU LTD
发明人： YAMASHITA ATSUSHI , TOZAWA YOSHIHARU , NAKAMURA TADASHI , SHIMADA HIDEHISA
IPC分类号： H04L1/24
摘要： PURPOSE:To easily measure an error rate characteristic of a MODEM or the like with a small scale and simple circuit constitution by designing a pattern so as to avoid bit delete in at least one channel. CONSTITUTION:A bit delete pattern 43 is constituted to be a pattern not applying bit delete for at least one channel and a punctured code generated by using the bit delete pattern 43 is used to test an error rate. Thus, an output code of a channel not applying bit delete in the output code of a dummy bit transmission circuit 46 at a receiver side is compared with a prescribed pseudo noise series code as it is to obtain an error rate.

10. 发明专利

JPH0383422A BUS MEMORY CIRCUIT FOR VITERBI DECODER 失效
公开(公告)号：JPH0383422A
公开(公告)日：1991-04-09
申请号：JP21861389
申请日：1989-08-28
申请人： FUJITSU LTD
发明人： YAMASHITA ATSUSHI , NAKAMURA TADASHI , MIYAMOTO BUNICHI
IPC分类号： H03M13/23
摘要： PURPOSE:To reduce a circuit scale by making an output signal from an n-th stage of a first step bus memory part 1 into multi-level at a D/A conversion part, adding the result to an analog bus memory part, selecting an output signal in the final step, converting the signal to a digital signal by an A/D conversion part and obtaining a decoded output. CONSTITUTION:A first bus memory part 11 is composed by arranging bus memory cells 16 in three steps. 0 and 1 are successively transited according to a bus select signal and the output signal of each step is added to a D/A converter 17, converted to 2 =2 =8 and applied to an analog bus memory part 14. Since the analog bus memory part 14 is composed of analog bus memory cells 18 in plural steps, each memory cell 18 is corresponding to the bus memory cells in three steps totally defined as one cell, and can store 8-level signals. Accordingly, for the analog bus memory part 14, the 1/3 number of stages is enough in comparison with a conventional example and the circuit scale can be reduced.

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