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1. 发明专利

JP2007027794A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007027794A
公开(公告)日：2007-02-01
申请号：JP2006282988
申请日：2006-10-17
申请人： Denso Corp , 株式会社デンソー
发明人： TEJIMA TAKANORI , NAKAZAWA SHUSAKU
IPC分类号： H01L23/34 , H01L23/28
CPC分类号： H01L24/73 , H01L2224/32245 , H01L2224/33181 , H01L2224/48091 , H01L2224/48247 , H01L2224/73215 , H01L2224/73265 , H01L2924/01013 , H01L2924/1305 , H01L2924/13055 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To achieve a state suitable for improving a heat releasing property when both heat sinking planes of a semiconductor device with heat sinking structures on its both sides are exposed from encapsulation resin. SOLUTION: In a semiconductor device 100 including a heater element 10, a first heat sink 30 provided on one side of the heat releasing element 10 and thermally connected to the heat releasing element 10, a second heat sink 40 provided on the other side of the heat releasing element 10 and thermally connected to the heat releasing element 10, and encapsulation resin 80 for sealing the heat releasing element 10 and the first and second heat sinks 30 and 40 so as to wrap around them; the respective heat sinking planes 30a and 40a of the first and second heat sinks 30 and 40 are exposed from the encapsulation resin 80, and the parallelism between the respective heat sinking planes 30a and 40a of the first and second heat sinks 30 and 40 is equal to or smaller than 0.2 mm. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了在封装树脂露出半导体器件的两侧的散热结构的两侧的散热面的两侧都露出适于提高散热性的状态。解决方案：在包括加热器元件10的半导体器件100中，设置在放热元件10的一侧并与散热元件10热连接的第一散热器30，设置在另一个上的第二散热器40 散热元件10的一侧，与散热元件10热连接;以及封装树脂80，用于密封散热元件10以及第一和第二散热片30和40以包裹它们; 第一和第二散热器30和40的相应的散热平面30a和40a从密封树脂80暴露出来，并且第一和第二散热器30和40的相应的散热平面30a和40a之间的平行度相等至或小于0.2mm。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2005117009A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005117009A
公开(公告)日：2005-04-28
申请号：JP2004148933
申请日：2004-05-19
申请人： Denso Corp , 株式会社デンソー
发明人： TEJIMA TAKANORI , NAKAZAWA SHUSAKU
IPC分类号： H01L23/29 , H01L23/433 , H01L25/07
CPC分类号： H01L24/33 , H01L23/4334 , H01L24/32 , H01L24/45 , H01L24/48 , H01L25/072 , H01L2224/32245 , H01L2224/33 , H01L2224/33181 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73215 , H01L2224/73265 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01043 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To obtain a state suitable for an improvement in heat dissipating properties in exposing heat dissipating surfaces of both heat sinks from a sealing resin in a semiconductor device having a bilateral heat sink structure. SOLUTION: A semiconductor device 100 is provided with: a heat releasing element 10; a first heat sink 30 that is provided on one side of the heat releasing element 10 and thermally connected with the heat releasing element 10; a second heat sink 40 that is provided on the other side of the heat releasing element 10 and thermally connected with the heat releasing element 10; and a sealing resin 80 sealing to wrap the heat releasing element 10, the first heat sink 30, and the second heat sink 40. The heat dissipating surface 30a of the first heat sink 30 and the heat dissipating surface 40a of the second heat sink 40 are exposed from the sealing resin 80. Parallelism between the heat dissipating surface 30a of the first heat sink 30 and the heat dissipating surface 40a of the second heat sink 40 is 0.2 mm or shorter. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了获得适合于在具有双侧散热器结构的半导体器件中从密封树脂露出两个散热片的散热表面的散热特性的改善状态。解决方案：半导体器件100设置有：散热元件10; 第一散热器30，其设置在放热元件10的一侧并与散热元件10热连接; 第二散热器40，其设置在放热元件10的另一侧并与散热元件10热连接; 密封树脂80密封以包裹散热元件10，第一散热器30和第二散热器40。第一散热器30的散热表面30a和第二散热器40的散热表面40a 从密封树脂80露出。第一散热器30的散热面30a与第二散热器40的散热面40a之间的平行度为0.2mm以下。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2007203145A Method and apparatus for applying resin 审中-公开
标题翻译：用于树脂的方法和装置
公开(公告)号：JP2007203145A
公开(公告)日：2007-08-16
申请号：JP2006022455
申请日：2006-01-31
申请人： Denso Corp , 株式会社デンソー
发明人： TORII MIKIHIRO , NAKAZAWA SHUSAKU , AOYAMA KAZUHIRO
IPC分类号： B05D1/18 , B05C3/09 , B05D3/00
CPC分类号： B05D1/18 , B05C3/09 , B05D7/22 , H01L21/6715
摘要： PROBLEM TO BE SOLVED: To provide a method and an apparatus for applying a resin, in each of which a coating material can thinly be applied uniformly to the object to be coated in a short time.
SOLUTION: The apparatus for applying the resin is provided with: an application tank 1 in which a work 10 is immersed; a supply tank 2 for supplying the coating material 9 to the application tank; and a withdrawing cylinder unit 3 for forcibly withdrawing the coating material from the work 10-immersed application tank and returning the withdrawn coating material to the supply tank. The withdrawing cylinder unit is provided with a speed adjusting unit 4 for adjusting a speed of the coating material to be withdrawn according to a shape of the work.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种施加树脂的方法和设备，其中每个涂层材料可以在短时间内均匀地均匀地施加到待涂覆的物体上。解决方案：用于涂布树脂的装置设置有：浸渍工件10的施加槽1; 供给罐2，用于将涂料9供给到应用罐; 以及一个撤回缸单元3，用于强制地从工作10浸渍的应用槽中取出涂层材料并将退回的涂层材料返回到供应罐。抽出气缸单元设置有速度调节单元4，用于根据工件的形状调节待抽出的涂层材料的速度。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2009141184A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009141184A
公开(公告)日：2009-06-25
申请号：JP2007316866
申请日：2007-12-07
申请人： Denso Corp , 株式会社デンソー
发明人： KUSAMA HIROTOSHI , NAKAZAWA SHUSAKU , MIZUTANI NOBORU
IPC分类号： H01L23/36 , B23K1/00 , B23K3/06 , B23K101/40
CPC分类号： H01L24/33 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To improve use efficiency of solder foils, by minimizing a useless solder foil part, when manufacturing rectangular solder foils by the number of a plurality of semiconductor elements. SOLUTION: In a process of preparing the plurality of semiconductor elements 1 and 2 and the solder foils 51, a rectangular shape in a plane shape of back electrodes 1b and 2b by setting the length of one side as a specific dimension A, is prepared for the whole of the plurality of semiconductor elements 1 and 2, and a plane rectangular shape of setting one side as the specific dimension A is prepared for the whole of the solder foils 51 corresponding to the individual semiconductor elements 1 and 2. The plurality of semiconductor elements 1 and 2 are mounted on a first heat radiating plate 3 via the solder foil 51 in a state where the side having the specific dimension A in the back electrodes 1b and 2b of the individual semiconductor elements 1 and 2, coincides with the side having the specific dimension A in the solder foils 51. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过使多个半导体元件的数量制造矩形焊料箔时，通过使无用的焊锡箔部分最小化来提高焊料箔的使用效率。解决方案：通过将一侧的长度设定为特定尺寸A，在制备多个半导体元件1和2以及焊料箔51的过程中，将背面电极1b和2b的平面形状的矩形形状，准备用于整个多个半导体元件1和2，并且为对应于各个半导体元件1和2的整个焊料箔51准备设置一侧的平面矩形形状作为特定尺寸A. 在各个半导体元件1和2的背面电极1b和2b中具有特定尺寸A的一侧的状态下，通过焊料箔51将多个半导体元件1和2安装在第一散热板3上，与在焊锡箔51中具有特定尺寸A的一侧。（C）版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2006147852A Semiconductor device, and method and device for manufacturing the same 有权
标题翻译：半导体器件及其制造方法和器件
公开(公告)号：JP2006147852A
公开(公告)日：2006-06-08
申请号：JP2004335920
申请日：2004-11-19
申请人： Denso Corp , 株式会社デンソー
发明人： NAKAZAWA SHUSAKU , MIZUNO HIROAKI , ONOE TSUTOMU , NASU HIDEHISA
IPC分类号： H01L23/02 , H01L23/29
CPC分类号： H01L24/33 , H01L21/565 , H01L23/4334 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/32245 , H01L2224/33 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/49171 , H01L2224/73215 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/1815 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To suppress the wearing of a member to be machined when cutting the heat radiation surface of a heat radiation plate for extending a life of the member to be machined, relating to a semiconductor device of which the semiconductor chip sandwiched between a pair of the heat radiation plates is sealed up with a mold resin. SOLUTION: A semiconductor device 100 comprises semiconductor chips 10 and 11, and a pair of heat radiation plates 20 and 30 arranged on both surfaces of the semiconductor chips 10 and 11 to sandwich the semiconductor chips 10 and 11. The entire device is so sealed with a mold resin 80 as to wrap it with heat radiation surfaces 20a and 30a of a pair of heat radiation plates 20 and 30 exposed from the mold resin 80. Side surfaces 20b and 30b of the heat radiation plates 20 and 30 and borders 20c and 30c between the side surfaces 20b and 30b and the heat radiation surfaces 20a and 30a are exposed from the mold resin 80 along the heat radiation surfaces 20a and 30a of the heat radiation plates 20 and 30. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了在切割加热辐射板的散热面以延长待加工构件的寿命时抑制待加工构件的磨损，涉及半导体芯片夹在一对散热板之间用模具树脂密封。解决方案：半导体器件100包括半导体芯片10和11以及布置在半导体芯片10和11的两个表面上以夹持半导体芯片10和11的一对散热板20和30。整个器件是用模制树脂80密封以将其与从模制树脂80暴露的一对散热板20和30的热辐射表面20a和30a包裹。散热板20和30的边缘20b和30b以及边界侧表面20b和30b与散热表面20a和30a之间的20c和30c沿着散热板20和30的散热表面20a和30a从模制树脂80露出。（C） 2006年，JPO＆NCIPI

6. 发明专利

JP2002271028A COIL-INCORPORATED MULTI-LAYER SUBSTRATE AND ITS MANUFACTURING METHOD, AND MANUFACTURING METHOD FOR LAMINATED COIL 失效
公开(公告)号：JP2002271028A
公开(公告)日：2002-09-20
申请号：JP2001069607
申请日：2001-03-13
申请人： DENSO CORP , MITSUBISHI PLASTICS IND
发明人： NOMOTO KAORU , NAKAZAWA SHUSAKU , KONDO KOJI , NIDAN AKIRA , YAMADA SHINGETSU , TANIGUCHI KOICHIRO
IPC分类号： H05K1/16 , H01F41/04 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To efficiently manufacture a coil-incorporated multi-layered resin board which has a relatively large-sized coil. SOLUTION: A coil-incorporated multi-layered resin 29 is formed by laminating insulating resin layers 36 alternately with coil patterns 37 and uniting them together by heating and pressing them, and the coil patterns 37 of respective layers are electrically connected by a via hole conductor 38 formed penetrating the respective insulating resin layers 36. Each insulating resin layer 36 is formed of mixed resin of 65 to 35 wt.% polyaryl ketone resin of >=260 deg.C in crystal fusion peak temperature and 35 to 65 wt.% polyether imide as a crystallized delay polymer. The coil patterns 37 are formed by a subtractive method. The via hole conductor 38 is formed by charging conductor paste in the via hole 39 formed in the insulating resin layers 36 by screen printing.

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