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    • 1. 发明专利
    • Image display device and its manufacturing method
    • 图像显示装置及其制造方法
    • JP2006066201A
    • 2006-03-09
    • JP2004246831
    • 2004-08-26
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKI
    • H01J31/12H01J9/22H01J9/39H01J29/28H01J29/94
    • PROBLEM TO BE SOLVED: To provide an image display device capable of reducing damage due to discharge and to provide its manufacturing method.
      SOLUTION: A front face substrate 2 of the image display device has a fluorescent screen 6 comprising a phosphor layer and a light-shielding layer 22 and a metal back layer 7 comprising a conductive thin film superposed on the fluorescent screen. A plurality of electron emission elements 8 emitting electrons towards the fluorescent screen are arranged on a back face substrate 2. A metal back layer has a discontinuous conductive thin film 7b located in an area overlapped with the light-shielding layer. A getter cut agent layer 103 is transferred to an upper part of the conductive thin film 7b through the adhesive.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 解决的问题:提供能够减少由于放电引起的损坏并提供其制造方法的图像显示装置。 解决方案:图像显示装置的正面基板2具有荧光屏6,荧光屏6包括荧光体层和遮光层22,金属背层7包括叠加在荧光屏上的导电薄膜。 在背面基板2上配置有朝向荧光屏发射电子的多个电子发射元件8.金属背层具有位于与遮光层重叠的区域中的不连续导电薄膜7b。 吸气剂切割剂层103通过粘合剂转移到导电薄膜7b的上部。 版权所有(C)2006,JPO&NCIPI
    • 4. 发明专利
    • Manufacturing method for inkjet printer head
    • JP2004249611A
    • 2004-09-09
    • JP2003043214
    • 2003-02-20
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKI
    • B41J2/16B41J2/045B41J2/055
    • PROBLEM TO BE SOLVED: To provide a manufacturing method for an inkjet printer head which reduces manufacturing costs by greatly reducing a bonding process, prevents deformation by suppressing generation of an internal stress, and can improve the reliability.
      SOLUTION: The manufacturing method includes the first process of forming a recess face 1A by cutting a PZT substrate 1, the second process of forming projections (a) by further cutting the substrate, the third process of setting a groove 8 over the recess face between the projections, the fourth process of burying and attaching polarizable piezoelectric bodies 5 in the grooves, the fifth process of setting ink channels 11 in the polarizable piezoelectric bodies, the sixth process of forming an electric wiring line 12 via the ink channels, the seventh process of dividing the polarizable piezoelectric bodies and the PZT substrate, the eighth process of attaching a nozzle plate 6 to the divided face, the ninth process of setting orifice holes 7 at the nozzle plate, and the 10th process of attaching a top plate lid 3 of an L-shaped cross section and with an ink supply opening body 2 to the polarizable piezoelectric body and the PZT substrate.
      COPYRIGHT: (C)2004,JPO&NCIPI
    • 5. 发明专利
    • Semiconductor device and formation method for wire thereof
    • 半导体器件及其形成方法
    • JP2012190854A
    • 2012-10-04
    • JP2011050841
    • 2011-03-08
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKITOJO HIROSHI
    • H01L21/768H01L21/3205H01L21/321H01L23/532
    • H01L23/53238H01L21/76802H01L21/7684H01L2924/0002H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving the cutting property without deteriorating the adhesion, and provide a formation method for a wire of the semiconductor device.SOLUTION: The formation method includes: a step of forming an insulation resin 4 so as to form an opening on a substrate 1; a step of forming a first wire layer 7 on the insulation resin 4 and at a side wall surface 5a and a bottom surface of the opening; a step of forming a second wire layer 8 on the first wire layer 7; and a step of performing planarization by performing cutting so as to expose the first wire layer 7 formed on the side wall surface 5a of the opening. In the step of forming the first wire layer 7, the first wire layer 7 formed at the bottom surface is formed to be thicker than the first wire layer 7 formed at the side wall surface 5a of the opening.
    • 要解决的问题:提供能够提高切割性能而不劣化粘附性的半导体器件,并提供半导体器件的导线的形成方法。 解决方案:形成方法包括:形成绝缘树脂4以在基板1上形成开口的步骤; 在绝缘树脂4和侧壁表面5a和开口的底表面上形成第一线层7的步骤; 在第一布线层7上形成第二布线层8的步骤; 以及通过进行切割来进行平面化的步骤,以露出形成在开口的侧壁表面5a上的第一线层7。 在形成第一线层7的步骤中,形成在底表面处的第一线层7形成为比形成在开口的侧壁表面5a处的第一线层7更厚。 版权所有(C)2013,JPO&INPIT
    • 6. 发明专利
    • Optical semiconductor device and its manufacturing method
    • 光学半导体器件及其制造方法
    • JP2008071793A
    • 2008-03-27
    • JP2006246594
    • 2006-09-12
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKI
    • H01L33/50H01L33/54H01L33/56H01L33/60H01L33/62
    • H01L2224/32245H01L2224/48091H01L2224/48247H01L2224/73265H01L2924/00014H01L2924/00
    • PROBLEM TO BE SOLVED: To provide an optical semiconductor device wherein no variation of the chrominance of light emitted in individual optical semiconductor devices occurs and no variation of the chrominance in the incident direction of light also occurs.
      SOLUTION: The optical semiconductor device is provided with an enclosure 2 having a concave 3, a light emitting element 6 that is housed in the concave 3 and connected with conductive parts 4 and 5, and a plurality of translucent resin layers 9a, 9b and 9c that are housed in the concave 3 to seal the light emitting element 6. The translucent resin layers 9a, 9b and 9c have a first translucent resin layer 9a having a translucent resin 10 being in contact with the light emitting element 6, a second translucent resin layer 9b that is stacked on the first translucent resin layer 9a and provided with light scattering particles 11 and a translucent resin 12 mixed with the optical scattering particles 11, and a third translucent resin layer 9c that is stacked on the second translucent resin layer 9b having fluorescent particles 13 and a translucent resin 15 mixed with the fluorescent particles 13.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供一种其中不发生在各个光学半导体器件中发射的光的色度变化的光学半导体器件,并且也不发生光的入射方向上的色度的变化。 解决方案:光学半导体器件设置有具有凹部3的壳体2,容纳在凹部3中并与导电部件4和5连接的发光元件6以及多个透光性树脂层9a, 9b和9c,其容纳在凹部3中以密封发光元件6.半透明树脂层9a,9b和9c具有第一半透明树脂层9a,其具有与发光元件6接触的半透明树脂10, 第二半透明树脂层9b层叠在第一透光性树脂层9a上,配置有光散射粒子11和与光散射粒子11混合的透光性树脂12,第三透光性树脂层9c层叠在第二透光性树脂 具有荧光颗粒13的层9b和与荧光颗粒13混合的半透明树脂15.版权所有:(C)2008,JPO&INPIT
    • 7. 发明专利
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • JP2009182263A
    • 2009-08-13
    • JP2008021893
    • 2008-01-31
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKI
    • H01L21/3205H01L23/12H01L23/52
    • H01L2224/11
    • PROBLEM TO BE SOLVED: To provide a method for manufacturing semiconductor device capable of suppressing growth of copper oxide without increasing manufacturing processes. SOLUTION: The semiconductor device 10 has a main surface provided with an electrode 12, and an insulating layer 13, a copper thin film 14, copper rewiring (wiring) 15, a copper oxide 16, basic copper carbonate (protective film) 17, and resin insulating film 18 are sequentially formed on the main face. The manufacturing method includes a step of forming basic copper carbonate 17 that is complex salt of copper carbonate CuCO 3 and hydroxide copper Cu(OH) 2 by soaking an interface of the copper oxide 16 in carbonated water having pH value controlled as 6≤pH COPYRIGHT: (C)2009,JPO&INPIT
    • 解决的问题:提供一种在不增加制造工艺的情况下能够抑制氧化铜生长的半导体器件的制造方法。 解决方案:半导体器件10具有设置有电极12的主表面,绝缘层13,铜薄膜14,铜线重新布线(布线)15,氧化铜16,碱式碳酸铜(保护膜) 17,树脂绝缘膜18依次形成在主面上。 该制造方法包括通过浸渍铜的界面来形成碳酸铜CuCO 3 SB 3和/或氢氧化铜Cu(OH)2 SBB的复合盐的碱式碳酸铜17的步骤 通过控制二氧化碳的浓度,将pH值控制在6≤pH<7的碳酸水中的氧化物16。 版权所有(C)2009,JPO&INPIT
    • 8. 发明专利
    • Semiconductor module and method of manufacturing semiconductor module
    • 半导体模块和制造半导体模块的方法
    • JP2014183213A
    • 2014-09-29
    • JP2013057017
    • 2013-03-19
    • Toshiba Corp株式会社東芝
    • UKITA YASUNARIHARA SATORUTOGASAKI TAKASHITAJIMA NAOYUKI
    • H01L25/07H01L23/36H01L23/48H01L25/18
    • H01L24/33H01L2224/48091H01L2224/48247H01L2224/73265H01L2924/07802H01L2924/15787H01L2924/181H01L2924/00014H01L2924/00H01L2924/00012
    • PROBLEM TO BE SOLVED: To provide a semiconductor module that allows ensuring excellent heat-radiation performance and to provide a method of manufacturing the same.SOLUTION: A semiconductor module comprises: a semiconductor chip including an emitter electrode and a collector electrode; a metallic emitter plate including an emitter junction surface connected to the emitter electrode and an emitter heat-transfer surface crossing to the emitter junction surface; a metallic collector plate including a collector junction surface connected to the collector electrode and a collector heat-transfer surface crossing to the collector junction surface; an insulating layer bonded to the emitter heat-transfer surface and the collector heat-transfer surface via a connection material; and a mold resin portion sealing the semiconductor chip, emitter plate, the collector plate, and the periphery of the insulating layer with the other surface of the insulating layer being disposed. The area of the emitter heat-transfer surface is smaller than that of the collector heat-transfer surface, and the thickness of the connection material between the insulating layer and the emitter plate is thicker than that of the connection material between the collector plate and the insulating layer.
    • 要解决的问题:提供一种允许确保优异的散热性能并提供其制造方法的半导体模块。解决方案:半导体模块包括:包括发射极和集电极的半导体芯片; 金属发射极板,包括连接到发射极的发射极结表面和与发射极结表面交叉的发射极传热表面; 金属集电板,其包括与集电极连接的集电极连接面和与集电极连接面交叉的集电体传热面; 通过连接材料与发射体传热面和集电体传热面接合的绝缘层; 以及密封半导体芯片,发射极板,集电板以及绝缘层的外周的绝缘层的另一个表面的模制树脂部分。 发射极传热面的面积小于集电体传热面的面积,绝缘层和发射极板之间的连接材料的厚度比集电板和发射极板之间的连接材料厚 绝缘层。
    • 9. 发明专利
    • Semiconductor device, semiconductor module, and semiconductor module manufacturing method
    • 半导体器件,半导体器件和半导体器件制造方法
    • JP2013171891A
    • 2013-09-02
    • JP2012033426
    • 2012-02-17
    • Toshiba Corp株式会社東芝
    • TOGASAKI TAKASHIMASUNAGA TAKAYUKIHISADA HIDEKIUCHIDA MASAYUKITAJIMA NAOYUKISAYAMA SATOSHI
    • H01L23/48H01L23/36H01L25/07H01L25/18
    • H01L2224/48091H01L2224/48247H01L2924/00014
    • PROBLEM TO BE SOLVED: To provide a semiconductor device which reduces thermal resistance in a section from a semiconductor chip to a radiator and also restrains a variation in the thickness of an insulation layer caused by a metal block assembly error, thereby making it possible to improve heat radiation performance.SOLUTION: A semiconductor device comprises: a semiconductor chip 40 having an emitter electrode and a collector electrode respectively on both faces and a control electrode on at least one of the faces; an emitter plate 50 made of metal, which is joined to the emitter electrode of the semiconductor chip; a collector plate 60 made of metal, which is joined to the collector electrode of the semiconductor chip; a connection terminal connected to the control electrode via thin metal wire; and a mold resin 80 which seals the semiconductor chip, the emitter plate, the collector plate and part of the connection terminal, leaving an emitter conductive face 52 perpendicular to the bonded surface of the emitter plate with the semiconductor chip and a collector conductive face 62 perpendicular to the bonded surface of the collector plate with the semiconductor chip exposed.
    • 要解决的问题:提供一种降低从半导体芯片到散热器的部分中的热阻的半导体器件,并且还抑制由金属块组装错误引起的绝缘层的厚度的变化,从而可以提高 热辐射性能。解决方案:一种半导体器件包括:半导体芯片40,其在两个面上分别具有发射极和集电极,在至少一个面上具有控制电极; 由金属制成的发射极板50,其连接到半导体芯片的发射电极; 由金属制成的集电板60,其与半导体芯片的集电极接合; 连接端子,经由金属细线连接到控制电极; 以及模制树脂80,其密封半导体芯片,发射极板,集电板和连接端子的一部分,留下与半导体芯片和集电极导电面62垂直于发射极板的接合表面的发射极导电面52 垂直于集电板的接合表面,半导体芯片暴露。
    • 10. 发明专利
    • Wiring board and semiconductor device including the same
    • 接线板和半导体器件,包括它们
    • JP2010118448A
    • 2010-05-27
    • JP2008289851
    • 2008-11-12
    • Toshiba Corp株式会社東芝
    • TAJIMA NAOYUKI
    • H01L23/12H01L21/60H05K3/34
    • H01L2224/11
    • PROBLEM TO BE SOLVED: To provide a wiring board increasing a contact area between an underbump metal and a bump electrode without changing a bump pitch and a bump height, thereby improving adhesiveness between the underbump metal and the bump electrode. SOLUTION: Each of patterns of a plurality of underbump metals 25 connecting bump electrodes 7 with a predetermined pitch includes a pattern body portion and pattern extension portions, and has a first pattern length L(W+W) on a first line K1 connecting each gravity C of the adjacent patterns in a shorter distance and a second pattern length M(R+R) on a second line K2 connecting each gravity C of the adjacent patterns in a longer distance, wherein a relation of L COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了提供一种在不改变凸块间距和凸起高度的情况下增加下凸块金属和凸块电极之间的接触面积的布线板,从而提高下凸块金属和凸块电极之间的粘附性。 连接突起电极7与预定间距的多个下凸块金属25的每个图案包括图案主体部分和图案延伸部分,并且在第一线K1上具有第一图案长度L(W + W) 将相邻图案的每个重力C连接在较长距离上的相邻图案的每个重力C连接的第二线路K2上的较短距离的第二图案长度M(R + R)中,其中满足L