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1. 发明专利

JP2011216715A Semiconductor memory element, and semiconductor memory device 有权
标题翻译：半导体存储器元件和半导体存储器件
公开(公告)号：JP2011216715A
公开(公告)日：2011-10-27
申请号：JP2010084332
申请日：2010-03-31
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , MATSUSHITA DAISUKE , NAKASAKI YASUSHI , SHINGU MASAO
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , B82Y10/00 , B82Y30/00 , H01L27/11578 , H01L27/11582 , H01L29/42348 , H01L29/7923 , H01L29/7926
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory element highly efficiently accumulating and erasing charges and holding the accumulated charges for a long time, and to provide a semiconductor memory device.SOLUTION: The semiconductor memory element includes a semiconductor layer 19, a tunnel insulating film 18 formed on the semiconductor layer 19, a charge accumulation film 16 disposed on the tunnel insulating film 18, having a film thickness of at least 0.9 nm and not more than 2.8 nm, and containing cubic crystal HfO2 particles 17, a block insulating film 15 disposed on the charge accumulation film 16, and a control electrode 13 disposed on the block insulating film 15.
摘要翻译：要解决的问题：提供一种半导体存储元件，其高效地积累和擦除电荷并保持长时间的累积电荷，并提供半导体存储器件。解决方案：半导体存储元件包括半导体层19，隧道绝缘形成在半导体层19上的膜18，设置在隧道绝缘膜18上的电荷累积膜16，膜厚度为至少0.9nm且不大于2.8nm，并且包含立方晶体HfO 2颗粒17，块状绝缘膜设置在电荷累积膜16上的控制电极13和设置在块绝缘膜15上的控制电极13。

2. 发明专利

JP2008277319A Manufacturing method of lanthanoid aluminate film 有权
标题翻译：兰蔻酸铝薄膜的制备方法
公开(公告)号：JP2008277319A
公开(公告)日：2008-11-13
申请号：JP2007115459
申请日：2007-04-25
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , TAKASHIMA AKIRA
IPC分类号： H01L21/316 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： C23C14/3464 , C23C14/08
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a lanthanoid aluminate film using a sputtering method, which is excellent in electric insulating performance by suppressing deviation in composition of the film. SOLUTION: The manufacturing method of a lanthanoid aluminate film has a step of holding a first target of LnAlO 3 and a second target of Al 2 O 3 in a vacuum chamber, a step of carrying a substrate into the vacuum chamber, a step of introducing a sputtering gas into the vacuum chamber, a step of sputtering the first and second targets, and a step of forming a lanthanoid aluminate film on the substrate. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种通过抑制膜的组成偏差的电绝缘性能优异的溅射法的镧系铝酸盐膜的制造方法。解决方案：镧系铝酸盐薄膜的制造方法具有保持LnAlO 3 的第一靶和Al 2 O 3的第二靶的步骤在真空室中的步骤，将基板搬入真空室的步骤，将溅射气体引入真空室的步骤，溅射第一和第二靶材的步骤以及形成镧系元素铝酸盐的步骤薄膜在基材上。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008091555A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008091555A
公开(公告)日：2008-04-17
申请号：JP2006269774
申请日：2006-09-29
申请人： Toshiba Corp , 株式会社東芝
发明人： KAMIMUTA YUICHI , NISHIYAMA AKIRA , NAKASAKI YASUSHI , INO TSUNEHIRO , KOYAMA MASATO
IPC分类号： H01L29/78 , H01L21/28 , H01L21/314 , H01L21/8238 , H01L21/8247 , H01L27/092 , H01L27/115 , H01L29/423 , H01L29/49 , H01L29/786 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is reduced in oxygen vacancy and is improved in reliability, and to provide its manufacturing method.
SOLUTION: The semiconductor device comprises a substrate, semiconductor region formed in the substrate, insulation film which is formed on the semiconductor region and consists of an oxide of one or more kinds of first metal elements, transition layer which is formed on the insulation film and consists of an oxide of a first metal element and a second metal element which is in a state of metal and has an oxide formation free energy larger than that of the first metal elements, electrode formed on the transition layer, and source-drain region formed in the semiconductor region which holds the electrode in the gate length direction.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供减少氧空位并提高可靠性的半导体器件，并提供其制造方法。解决方案：半导体器件包括衬底，在衬底中形成的半导体区域，形成在半导体区域上并由一种或多种第一金属元素的氧化物构成的绝缘膜，形成在衬底上的过渡层绝缘膜由第一金属元素和第二金属元素的氧化物构成，处于金属状态，并且具有大于第一金属元素的氧化物形成自由能，在过渡层上形成的电极，漏极区域形成在栅极长度方向上保持电极的半导体区域中。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2007273548A Electric resistance changing element, semiconductor device equipped with electric resistance changing element and its manufacturing method 有权
标题翻译：电阻变化元件，配有电阻变化元件的半导体器件及其制造方法
公开(公告)号：JP2007273548A
公开(公告)日：2007-10-18
申请号：JP2006094630
申请日：2006-03-30
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , KOIKE MASAHIRO , KOYAMA MASATO
IPC分类号： H01L45/00 , H01L21/822 , H01L27/04 , H01L27/10 , H01L49/00
CPC分类号： G11C13/0007
摘要： PROBLEM TO BE SOLVED: To provide a resistance changing element capable of reducing the variation of operating voltage upon forming.
SOLUTION: A resistance changing film 4, in which a metal oxide or a metallic oxynitride containing at least either one of Zr and Hf as a principal constituent is provided with fluorite structure, and a pair of first and second electrodes 2, 6 provided so as to pinch the resistance changing film are provided. The crystal structure of the resistance changing film is provided with Bevan cluster in a part or the whole of it and when V shows a vacancy, in which negative ion is not existing in a negative ion site in the fluorite type crystal structure, M shows the metallic element of the metal oxide or the metallic oxynitride and S shows the maximum octahedron type cavity site in the fluorite type crystal structure, the direction of array of a straight chain type continuous chain of (-S-V-M-V-S-) in the unit cell of the Bevan cluster is provided with the direction of crystal substantially orthogonal to the principal surface of the film.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在成形时减小工作电压的变化的电阻变化元件。解决方案：将以Zr和Hf中的至少一种作为主要成分的金属氧化物或金属氮氧化物设置有萤石结构的电阻变化膜4和一对第一和第二电极2,6 设置为夹紧电阻变化膜。电阻变化膜的晶体结构部分或全部设置有Bevan簇，当V表示在萤石型晶体结构的负离子位置不存在负离子的空位时，M表示金属氧化物的金属元素或金属氮氧化物，S表示萤石型晶体结构中最大的八面体型腔部位，Bevan的晶胞中的（-SVMVS-）直链型连续链阵列的方向簇具有与膜的主表面基本正交的晶体的方向。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2005005603A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005005603A
公开(公告)日：2005-01-06
申请号：JP2003169700
申请日：2003-06-13
申请人： Toshiba Corp , 株式会社東芝
发明人： KOYAMA MASATO , NISHIYAMA AKIRA , SUZUKI MASAMICHI , KAMIMUTA YUICHI , INO TSUNEHIRO
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that is low in resistance and has no variance of a device characteristic, and is provided with a gate electrode.
SOLUTION: The semiconductor device is provided with a silicon layer, a gate insulation film 7 formed on the silicon layer, a gate electrode including partly crystalized metal nitride silicide layers 8 and 12 formed on the gate insulation film, and source/drain areas 13, 14, 16 and 17 formed on the surface of the silicon layer pinching the gate electrode.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种电阻低且不具有器件特性变化的半导体器件，并且设置有栅电极。解决方案：半导体器件设置有硅层，形成在硅层上的栅极绝缘膜7，包括形成在栅极绝缘膜上的部分结晶化的金属氮化物硅化物层8和12的栅电极以及源极/漏极形成在夹在栅电极的硅层表面上的区域13,14,16和17。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2010129739A Nonvolatile semiconductor storage device and method of manufacturing same 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2010129739A
公开(公告)日：2010-06-10
申请号：JP2008302098
申请日：2008-11-27
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide an MONOS type flash memory securing a required amount of electric charge stored sites in an electric charge stored film.
SOLUTION: The nonvolatile semiconductor storage device includes source-drain regions 10a, 10b formed by spacing apart from each other on the surface of a semiconductor layer 10, a tunnel insulating film 11 arranged on the semiconductor layer 10 between the source-drain regions 10a, 10b, an insulating electric charge stored film 12 arranged on the tunnel insulating film 11 and containing an isotope having a ratio different from an isotope ratio in a natural state, a block insulating film 14 arranged on the electric charge stored film 12, and a control gate electrode 15 arranged on the block insulating film 14.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种MONOS型闪速存储器，其将所需量的电荷存储位置固定在电荷存储的膜中。解决方案：非易失性半导体存储器件包括在半导体层10的表面上彼此间隔开形成的源极 - 漏极区域10a，10b，布置在半导体层10之间的源极 - 漏极区域10a，10b，布置在隧道绝缘膜11上并包含与天然状态的同位素比率不同的同位素的绝缘电荷存储膜12，布置在电荷存储膜12上的块绝缘膜14，以及布置在块绝缘膜14上的控制栅电极15.版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2009239216A Semiconductor device, and method for manufacturing semiconductor device 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：JP2009239216A
公开(公告)日：2009-10-15
申请号：JP2008086770
申请日：2008-03-28
申请人： Toshiba Corp , 株式会社東芝
发明人： SHINGU MASAO , KIKUCHI SACHIKO , TAKASHIMA AKIRA , INO TSUNEHIRO , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L21/31604 , H01L29/513 , H01L29/517 , H01L29/66833
摘要： PROBLEM TO BE SOLVED: To suppress characteristic variation of a semiconductor device by suppressing reaction of high-dielectric-constant insulating films to other component members even after a heat treatment when the semiconductor device is manufactured by forming a gate insulating film and an interlayer insulating film of the thermally stable high-dielectric-constant insulating films.
SOLUTION: In the semiconductor device, sidewalls are made of at least one of SiO
2 , SiN, SiON, and a top insulating film or gate insulating film is made of an oxide of at least one metal M selected from a rare earth metal group consisting of Y, Zr, Hf, and Al, Si so that the number ratio Si/M of Si to the metal M is set to no less than a number ratio at a solid solubility limit of SiO
2 in a composite oxide including the metal M and Al and the dielectric constant of the top insulating film or gate insulating film is equal to or less than the dielectric constant of Al
2 O
3 and so that the number ratio Al/M of Al to the metal M is set to no less than a number ratio Al/M where the crystallization of an oxide of the metal M is suppressed by the reaction of the Al element and set to no more than a number ratio where the crystallization of the Al
2 O
3 is suppressed through the action of the metal M.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：即使在通过形成栅极绝缘膜制造半导体器件时，即使在热处理之后也抑制高介电常数绝缘膜与其它部件的反应来抑制半导体器件的特性变化，以及热稳定的高介电常数绝缘膜的层间绝缘膜。解决方案：在半导体器件中，侧壁由SiO 2，SiN，SiON中的至少一种制成，并且顶部绝缘膜或栅极绝缘膜由至少一种金属M选自由Y，Zr，Hf和Al，Si组成的稀土金属组，使得Si与金属M的Si / M的数量比被设定为不小于固溶度极限的数量比包含金属M和Al的复合氧化物中的SiO 2 和顶部绝缘膜或栅极绝缘膜的介电常数等于或小于Al 2 版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2009231844A Nonvolatile semiconductor storage device, and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2009231844A
公开(公告)日：2009-10-08
申请号：JP2009108032
申请日：2009-04-27
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L21/316 , H01L27/115 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device having an MONOS memory cell having as high charge trap efficiency as possible; and a manufacturing method thereof. SOLUTION: This nonvolatile semiconductor storage device is provided with a memory cell including: source/drain regions 4a and 4b separately formed on a semiconductor substrate 5; a tunnel insulating film 12 formed on the semiconductor substrate 5 between the source region 4a and the drain region 4b; a charge storage film 13 formed on the tunnel insulating film 12 and trapping charge; a control gate electrode 16 formed on the charge storage film 13; and an alumina film formed between the charge storage film 13 and the control gate electrode 16, and having a transition alumina layer 14a formed on the charge storage film 13 side and an α-phase alumina layer 15a formed on the control gate electrode 16 side. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有尽可能高的电荷陷阱效率的MONOS存储单元的非易失性半导体存储器件; 及其制造方法。解决方案：该非易失性半导体存储装置设置有存储单元，该存储单元包括分开形成在半导体基板5上的源极/漏极区域4a和4b; 形成在源极区域4a和漏极区域4b之间的半导体衬底5上的隧道绝缘膜12; 形成在隧道绝缘膜12上的电荷存储膜13和捕获电荷; 形成在电荷存储膜13上的控制栅电极16; 以及在电荷存储膜13和控制栅极电极16之间形成的氧化铝膜，并且在电荷存储膜13侧形成有形成在控制栅极电极16侧的α相氧化铝层15a的过渡型氧化铝层14a。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2009054886A Nonvolatile semiconductor memory 审中-公开
标题翻译：非易失性半导体存储器
公开(公告)号：JP2009054886A
公开(公告)日：2009-03-12
申请号：JP2007221698
申请日：2007-08-28
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11568 , H01L29/513
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory having MONOS-type memory cells using materials whose charge trapping efficiency is made as high as possible.
SOLUTION: The MONOS-type memory cell has source regions and drain regions provided separately from each other on the surface of a semiconductor layer, each tunnel insulating film provided on the semiconductor layer between each source region and each drain region, each charge accumulating film on each tunnel insulating film, each block insulating film made of (Rn
1-x Ln
x )
2-y Al
y O
3 {wherein Ln is either one or more kinds of elements selected from Pr, Tb, Ce, Yb, and Eu, and Rn is either one or more kinds of elements selected from La, Nd, Sm, Gd, Dy, Ho, Er, Tm, Lu, Y, and Sc, and further, 0
摘要翻译：要解决的问题：提供一种具有MONOS型存储单元的非易失性半导体存储器，其使用尽可能高的电荷俘获效率的材料。解决方案：MONOS型存储单元具有在半导体层的表面上彼此分开设置的源极区和漏极区，每个沟道绝缘膜设置在每个源极区和每个漏极区之间的半导体层上，每个电荷在每个隧道绝缘膜上积聚膜，由（Rn 1-x Ln x ）制成的每个块绝缘膜 2-y 其中Ln是选自Pr，Tb，Ce，Yb和Eu中的一种或多种元素，Rn是选自La中的一种或多种元素，Nd，Sm，Gd，Dy，Ho，Er，Tm，Lu，Y和Sc，进一步地，0

10. 发明专利

JP2007180406A Non-volatile switching element, its manufacturing method and integrated circuit having the same 有权
标题翻译：非易失性开关元件及其制造方法及其集成电路
公开(公告)号：JP2007180406A
公开(公告)日：2007-07-12
申请号：JP2005379267
申请日：2005-12-28
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , KOYAMA MASATO
IPC分类号： H01L29/66 , H01L27/10 , H01L35/16 , H01L35/28 , H01L35/32 , H01L35/34 , H01L49/02
CPC分类号： H01L45/04 , H01L45/145 , Y10S257/93
摘要： PROBLEM TO BE SOLVED: To provide a non-volatile switching element having new structure having a high operation speed and allowed to be integrated, and an integrated circuit having the non-volatile switching element. SOLUTION: The non-volatile switching element is provided with a switch 6 formed on a substrate 2 and having a film of a material whose electric resistivity may be changed ten times or more due to a temperature change in a range of ±80 K from a prescribed temperature; Peltier elements 10, 12, 13 having a function for generating the temperature change in the switch 6; a heat transmission/electric insulation film 8 formed between the switch 6 and the Peltier elements 10, 12, 13, and having an electric insulator film for transmitting heat from the Peltier elements 10, 12, 13; and a pair of electrodes 6a, 6b connected to the switch 6. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供具有高运算速度和允许集成的新结构的非易失性开关元件和具有非易失性开关元件的集成电路。解决方案：非易失性开关元件设置有形成在基板2上的开关6，并且具有由于温度变化在±80°范围内电阻率可能变化十倍或更多的材料的膜 K从规定的温度; 具有用于产生开关6中的温度变化的功能的珀耳帖元件10,12,13; 形成在开关6和珀耳帖元件10,12,13之间的传热/电绝缘膜8，具有用于从珀耳帖元件10,12,13传递热量的电绝缘膜; 以及连接到开关6的一对电极6a，6b。版权所有（C）2007，JPO＆INPIT

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