会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 81. 发明专利
    • SURFACE CONTAMINATION OBSERVING INSTRUMENT
    • JPS63201551A
    • 1988-08-19
    • JP3485287
    • 1987-02-17
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOMASUKO YOJIKOYAMA HIROSHI
    • G01N1/22G01N27/62H01L21/66
    • PURPOSE:To detect the presence of extremely small and small-quantity surface contamination by projecting an energy beam on a sample, vaporizing and decomposing a surface contaminating material, and detecting produced gas. CONSTITUTION:A sample base 120 to which the sample 110 is put in a sample storage part 130 hermetically. The atmospheric gas in the sample storage part 130 is discharged by an evacuating device 13 by opening an opening and closing regulating valve 201. An opening and closing regulating valve 202 is adjusted from a gas supply source 140 through an intake part 150 and atmospheric gas 151 for observation is discharged onto the surface of the sample 110 from an opening 152 at a specific flaw rate. Then, the energy beam 161 which has specific cross section and size is projected on the sample 110 from an irradiation part 160. When the energy beam 161 is projected, surface contaminating material 100 absorbs the energy of the energy beam 161 to produce the gas 101. This produced gas 101 is sucked from the opening 171 into a gas suction part 170 together with the atmospheric gas 151 for observation and the intake gas 101 is sent in an analysis part 180, so that components and a composition ratio are analyzed.
    • 82. 发明专利
    • MANUFACTURE OF SEMICONDUCTOR DEVICE
    • JPS63161643A
    • 1988-07-05
    • JP31038186
    • 1986-12-25
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOMIYATAKE HIROSHIMASUKO YOJIKOYAMA HIROSHI
    • H01L21/3205
    • PURPOSE:To prevent the generation of dust and the adhesion of a foreign manner, to keep a semiconductor device clean and to smooth the stepped section of the whole surface of a metallic layer by injecting the solidified particulates of a substance, which is easily solidified and liquefied or solidified and vaporized and does not contaminate the semiconductor device, onto the surface of the metallic layer together with a carrier gas. CONSTITUTION:A carrier gas 5 containing solidified particulates 4 is ejected and injected toward a metallic layer 1 from a nozzle 6 while repeatedly parallel- displacing the metallic layer 1 with a stepped section 1a. When the solidified particulates are made to collide with the metallic layer such as an aluminum layer in general, the metallic layer can be deformed plastically. Accordingly, a large number of such solidified particulates 4 in grain size allowble in the surface of the metallic layer 1 finally are carried by the gas 5 at a flow rate capable of plastically deforming the metallic layer 1 by collisions, and injected and made to collide to the metallic layer 1, thus smoothing the metallic layer on the side wall of the stepped section 1a by the neighboring metallic layer 1.
    • 83. 发明专利
    • CRYSTAL SUBSTRATE HOLDER
    • JPS63144539A
    • 1988-06-16
    • JP29448686
    • 1986-12-09
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOKOMORI JUNKOKOYAMA HIROSHIMASUKO YOJI
    • H01L21/203H01L21/26H01L21/68H01L21/683
    • PURPOSE:To prevent the wetting of the main surface of a crystal substrate and to increase the allowable extent of the amount of a low-melting point metal by a method wherein a fixed holding part, which has a plurality of fine flow holes on its flat upper surface and has an orientation flat lower than its upper surface at the edge part of its upper surface, and a retention part for an excessive low-melting point metal are provided. CONSTITUTION:A foil plate consisting of an extendedly prolonged low-melting point metal 2 is cut in a size larger a little than a crystal substrate 1 and this is placed covering the fine flow holes 5 of a fixed holding part 3. Then, the crystal substrate 1 is placed on the foil plate consisting of the low-melting point metal 2 in consideration of the position of an orientation flat 6 so as to be able to recognize the crystal orientation of the crystal substrate 1. When the crystal substrate 1 is applied pressure facing the fixed holding part 3 while the crystal substrate 1, the foil plate consisting of the low-melting point metal 2 and a crystal substrate holder 100 are simultaneously heated, the foil plate consisting of the low-melting point metal 2 is fused and an excessive low-melting point metal 21 brought into a liquid phase state passes through the fine holes 5, flows out to a retention part 4 and is stayed. If the interval (d) between the fine flow holes 5 is ready-formed roughly equal with the thickness (h) of the crystal substrate 1, the wetting of the main surface of the crystal substrate 1 due to the remained excessive low-melting point metal 21 is not generated.
    • 84. 发明专利
    • MANUFACTURE OF SEMICONDUCTOR DEVICE
    • JPS63144519A
    • 1988-06-16
    • JP29270286
    • 1986-12-09
    • MITSUBISHI ELECTRIC CORP
    • KOMORI JUNKOKOYAMA HIROSHIMASUKO YOJI
    • H01L21/66H01L21/265
    • PURPOSE:To simplify the manufacturing process while improving the freedom of designing as well as the degree of integration by a method wherein impurity is doped in self alignment by means of monitoring a layer formed on a semiconductor substrate. CONSTITUTION:The peripheral part of an ion implanted layer 4 on a semiconductor substrate 2 is scan-irradiated with feeble focussing ion beams 11 by an ion gun 10; the secondary ion beams 13 are entered into a mass analytical instrument; and the distribution of impurity on the semiconductor substrate 2 is confirmed by the secondary distribution of curvature radius of the secondary ion beams 13 entered into the mass analytical instrument 12. Then, the overall ion implanted layer 4 can be mapped accurately and later the accelerating voltage is boosted to repeatedly scan-irradiate the specified position only with e.g., focussing ion beams 11 intensified. Through these procedures, another ion implanted layer 9 can be formed in the former ion implanted layer 4 in self alignment without using a mask at all thus entirely eliminating the mask formation process.
    • 85. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS63141350A
    • 1988-06-13
    • JP28820786
    • 1986-12-03
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOKOYAMA HIROSHIMASUKO YOJI
    • H01L21/60
    • PURPOSE:To eliminate steep inclines from a temperature gradient and to prevent a semiconductor substrate from cracks by a method wherein a heattransmitting metal band layer is provided, enclosing a semiconductor pellet, in the vicinity of a group of protruding electrodes. CONSTITUTION:A heat-transmitting metal band layer 51 is formed, on an insulating film 2, enclosing a semiconductor pellet 10 and extending along its outermost circumference. As for the temperature distribution in case the metal band layer 51 exists on the insulating film 2, the difference in temperature between bumps 4 or the temperature gradient is moderated because of changes introduced into the isothermal lines because of the heat-transmitting feature of the metal band layer 51. Further, when the temperature of the metal band layer 51 is caused to rise by the supply of radiant energy 6, for example an infrared laser beam, the difference in temperature between the bumps 4 or the temperature gradient will be further moderated.
    • 86. 发明专利
    • PHOTOSEMICONDUCTOR DEVICE
    • JPS63124474A
    • 1988-05-27
    • JP27066986
    • 1986-11-12
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOMASUKO YOJIYASUE TAKAOKOYAMA HIROSHI
    • H01L31/10H01L31/16
    • PURPOSE:To obtain photosemiconductor device having the high directional discriminating properties of incident beams by boring a rectangular parallelopiped-shaped recessed section to the surface of a semiconductor substrate at regular periodic intervals, independently diffusing and forming a semiconductor layer having a conductivity type reverse to the substrate to the side wall of the recessed section and each using these P-N junctions as photodetectors. CONSTITUTION:Rectangular parallelopiped-shaped recessed sections 2 are bored to the surface of an N-type semiconductor substrate 1 at regular periodic intervals, and P-type semiconductor regions 21-24 are diffused and shaped respectively to the side wall sections 11-14 of these recessed sections independently. Consequently, P-N junctions are each constituted of the regions 21-24 and the substrate 1, and these P-N junctions are employed as photodetectors. That is, these elements 31-34 take a shape that the normal of the substrate surface 1a passing through the center of the bottom 15 of the recessed section 2 is used as a four-time symmetry axis, wirings 41-44 are connected to the upper end sections of the regions 21!24 through an insulating film 5 and a substrate 1 region under the insulating film 5 formed on the bottom 15 is used as other wirings. Accordingly, the sensitivity of detection of incident beams to the normal direction of the substrate surface is improved while the degree of integration is enhanced.
    • 87. 发明专利
    • METHOD FOR MEASURING CONTACT RESISTANCE
    • JPS63122969A
    • 1988-05-26
    • JP27067086
    • 1986-11-12
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOMASUKO YOJIKOYAMA HIROSHI
    • G01R31/26G01R27/02
    • PURPOSE:To enable measurement of a contact resistance with a simple wiring construction, by forming a contact section at both ends of a resistor provided on the surface of a semiconductor substrate. CONSTITUTION:Wire layers 5 and 5 are formed on insulation films 3 respectively formed on the surfaces of a resistor 2 and a semiconductor substrate 1 through contact holes 4 and 4. Contact parts between the wiring layers 5 and 5 and the resistor 2 provide contact sections 6 and 6. Moreover, a part of the insulation films 3 is removed using an etching ion 7 and impurity ions 8 are implanted into an exposed portion of the resistor 2 at a high density to form a highly conductive area 9. Conducting element ions 10 are irradiated on the area 9 to form a conducting film 11. Then, a resistance value is measured between the wiring layers 5 and 5making the area between the contact sections 6 and 6 in the resistor 2 highly conductive by a specified length sequentially. Then, a contact resistance is determined from a resistance value, which is obtained without the existence of the area of the resistor 2 from a relationship between the length of the area of the resistor 2 between the contract sections 6 and 6 excluding the area 9 and a resistance value between the wiring layers 5 and 5.
    • 88. 发明专利
    • FORMING METHOD FOR INSULATION SEPARATING LAYER
    • JPS6358940A
    • 1988-03-14
    • JP20450286
    • 1986-08-29
    • MITSUBISHI ELECTRIC CORP
    • NISHIOKA SUNAOKOYAMA HIROSHIMASUKO YOJI
    • H01L21/76
    • PURPOSE:To effectively and simply form an insulation separating layer by subjecting a part in which a doner layer in the bottom of a groove is not formed to an anodic formation to convert it to a porous silicon film, forming a lower p-type silicon substrate in to an insulation separating layer of silicon oxide, and returning the doner layer to the p-type silicon by heat treating. CONSTITUTION:After a groove 2 is formed on a P-type silicon substrate 1, protons 5a, 5b are ion-implanted obliquely from rightward and leftward directions to form doner layers 6 on the surface of the groove 2 and the surface la of a p-type silicon substrate 1. At this time the part 20a which is not ion- implanted is formed by the shape of the surface 1a. Then, when the layer 6 is used as a mask to subject the substrate 1 to an anodic formation, only the part 20a is subjected to the anodic formation to form a porous silicon film 7. When a wet oxidation is executed, the film 7 is immediately converted to a silicon oxide, the substrate 1 in the lower part of the film is also converted to the silicon oxide to form an insulation separating layer. When it is thereafter heat treated, the layer 6 is returned to the p-type silicon, and the insulation separating layer 4 is formed at a predetermined part in the bottom 2a of the groove 2.
    • 89. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS62122140A
    • 1987-06-03
    • JP26289785
    • 1985-11-21
    • MITSUBISHI ELECTRIC CORP
    • KOYAMA HIROSHI
    • H01L29/41H01L21/60
    • PURPOSE:To make substantially uniform the rise in temperature in a plurality of electrode surfaces and thereby eliminate nonuniformity in the temperature in a semiconductor chip by a method wherein the area of an electrode surface disposed in the vicinity of a lead electrode is made larger than the area of an electrode surface disposed far to the lead electrode. CONSTITUTION:The area of an emitter electrode surface 6a disposed in the vicinity of a lead electrode 3 for an emitter is made larger than the area of an emitter electrode surface 6b disposed far to said electrode Although a current flowing through a wire lead 8a is larger than a current flowing through a wire lead 8b, a current density per unit area in the emitter electrode surface 6a is not larger than a current density per unit area in the emitter electrode surface 6b, since the area of the emitter electrode surface 6a is made larger than that of the emitter electrode surface 6b. When an area ratio is made equal to a current ratio, the current densities in the two electrode surfaces 6a and 6b become equal to each other. Accordingly, the rise of temperature in the two electrode surfaces 6a and 6b is equal, and thus nonuniformity in the temperature in a semiconductor chip 4 is removed. As the result, an adverse effect exerted thereby on the characteristics of a transistor is eliminated.