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    • 65. 发明专利
    • REVERSEECONDUCTING THYRISTOR
    • JPS5586154A
    • 1980-06-28
    • JP15858678
    • 1978-12-25
    • HITACHI LTD
    • SHIMIZU YOSHITERUYAO TSUTOMU
    • H01L29/74H01L29/747
    • PURPOSE:To reduce both on-voltage and turn-off time by forming a thyristor and an anti-parallel-connected diode in the same semiconductor substrate and making Au concentration gradient in the junction between the base and emitter of the thyristor flat when Au is diffused here. CONSTITUTION:An n-type epitaxial layer is grown on one part of an i-type Si substrate, and a p-type impurity for forming a p-type emitter and a p-type base is deposited on the front and back surfaces of the substrate. Next, by operating heat treatment, a p-type emitter layer and a p-type base layer are formed by diffusion in the i-type substrate and the n-type epitaxial layer. An n-type emitter layer is formed by diffusion in the p-type base layer. The composite element of a thyristor and a diode obtained in this way is diffused with Au which is to become lifetime killer. Thus, on-voltage and turn-off time are reduced. At this time, the Au concentration in the junction between the base and emitter of the thyristor is reduced, and at the same time its gradient is made flat.
    • 66. 发明专利
    • THYRISTOR
    • JPS54113272A
    • 1979-09-04
    • JP1964978
    • 1978-02-24
    • HITACHI LTD
    • WATANABE TOKUOYAO TSUTOMU
    • H01L29/74H01L29/08
    • PURPOSE:To extend a conductive region, which is ignited by a gate signal, without interference to improve a switching speed by burying an emitter layer in a shorted hole in the thyristor having a shorted emitter structure. CONSTITUTION:P-type impurity is diffused from the surface and the reverse face of N-type Si substrate 2 to be a base layer, and P-type emitter layer 3 and P-type base layer 4 are formed, and PN junctions J1 and J2 are generated in these layers respectively. Next, N-type emitter regions 5 are formed between N-type emitter regions 5 respectively in layer 4 by diffusion, and further, N-type emitter regions 20 are formed additionally between these regions 5 respectively by diffusion. After that, Al anode electrode 6 and gate electrode 8 are fitted to the reverse face of layer 3 and the exposed surface of layer 4 respectively, and further, cathode electrode 7 which covers regions 5 and 20 and becomes short-circuit 10 is fitted. Thus, when the thyristor is turned on by gate trigger and conduction extends in the transversal direction, this extension is not stopped to improve a switching characteristic because N-type emitter region 20 exists.
    • 67. 发明专利
    • THYRISTOR
    • JPS5483385A
    • 1979-07-03
    • JP15046377
    • 1977-12-16
    • HITACHI LTD
    • YAO TSUTOMUWATANABE TOKUOOKAMURA MASAHIRO
    • H01L29/74H01L29/10
    • PURPOSE:To obtain a highly pressure-resistant and large-current thyristor, by determining, in a thyristor of the PNPN 4-layer construction, seat resistance at the bottom of the P-type base layer and that in the vicinity of the region where the gate electrode is to be fitted. CONSTITUTION:P-type emitter layer PE, N-type base layer NB, P-type base layer PB and N-type emitter layer NE, which are mutually different in the conduction type, are provided between the top surface 112 and bottom surface 111 of semiconductor substrate 11; and PN junctions J1, J2, and J3 are formed between the respective layers. Further, W anode electrode 12, which also serves as a support plate, is fitted on the surface of the PE layer, Al cathode electrode 13 on the surface of the NE layer, and Al gate electrode 14 at the center of top surface 112. The NE layer is perforated with many holes 15; and through these perforations, a part of the PB layer is exposed. The top surface of the exposed layer is placed in low-resistance contact with electrode 13. In this constitution, the seat resistance of the PE layer region located at the bottom of the NE layer is determined at 500 OMEGA/square and the seat resistance in the vicinity of the location of gate electrode 14 is determined at 100 to 200 OMEGA/square.
    • 68. 发明专利
    • THYRISTOR
    • JPS5456775A
    • 1979-05-08
    • JP12323577
    • 1977-10-14
    • HITACHI LTD
    • YAO TSUTOMUMONMA NAOHIRONAITOU MASAMIOKAMURA MASAHIRO
    • H01L29/10H01L29/74
    • PURPOSE:To increase the dielectric strength as well as to secure a large current conversion capacity, by giving a deep diffusion with the impurity density of under 8X10 atom/cm for the P-type base layer of the N-type emitter layer side and prescribing the sheet resistance to 500-1500OMEGA/square. CONSTITUTION:Layers PE, NB, BP and NE whose conduction types differ from each other are laminated between main surface 11 and 12 of semiconductor substrate 1, and PN-junction J1, J2 and J3 are formed between thses layers. Then anode electrode 2 composed of the W supporter panel is coated to PE layer on one main surface 11, and Al cathode electrode 3 is coated to NE layer of the other main surface 12 respectively. Furthermore, gate electrode 4 is provided at the center part of PB layer, and part of PB layer is pierced partially through by NB layer to be exposed on surface 12 and then to be connected to electrode 2. In such constitution, the impurity density is set to 3-5X10 atom/cm near junction J3 of PB layer with the thickness of 90-110mum, and the sheet resistance is set to 600-1000OMEGA/square right under junction J3.
    • 69. 发明专利
    • THYRISTOR
    • JPS5446488A
    • 1979-04-12
    • JP11212377
    • 1977-09-20
    • HITACHI LTD
    • WATANABE TOKUOYAO TSUTOMU
    • H01L29/744H01L29/08H01L29/74
    • PURPOSE:To improve remarkably switching characteristics of the part confronting to a gate electrode, by providing a priority conduction region into a conductive region expanding horizontally. CONSTITUTION:In the wafer in a PENBPBNE four-layer structure, NE layer possesses short path 10, through which the PB layer and cathode electrode 2 are shorted. A voltage is applied between anode 3 and cathode 2 with anode 3 made positive in potential, and while the voltage is cut off, a voltage is applied between gate 4 and electrode 2 with the gate made positive in potential. At this time, the only region close to the gate conducts first, and then expands horizontally. Polarity conduction region 5, whose PB layer is made thick, has high horizontal resistance and the current amplification factor of the NEPBNB-layer part is also large, so that it will become conductive rapidly. In addition, the time when the conductive region expands is shortened, and a rise in temperature is also suppressed by 10%.