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41. 发明专利

JPH0484192A GRAPHIC PROCESSOR AND GRAPHIC PROCESSING METHOD 失效
公开(公告)号：JPH0484192A
公开(公告)日：1992-03-17
申请号：JP19792990
申请日：1990-07-27
申请人： HITACHI LTD
发明人： KATSURA AKIHIRO , FUKUNAGA YASUSHI , FUJITA MAKOTO , KOGA KAZUYOSHI , NISHIDA TAKEHIKO
IPC分类号： G09G5/00 , G06F3/153 , G06F13/18 , G09G5/36 , G09G5/39 , G09G5/393 , G09G5/397 , G09G5/399
摘要： PURPOSE:To efficiently and effectively utilize the degree of integration of memories by constituting the above processor of a display control means and a priority control means which controls the priority of the access from an arithmetic processing means to a memory means and the access from the display control means. CONSTITUTION:The priority control mechanism in the display controller consists of a load counter 2042, a display counter 2043 and a priority control circuit 2044. The time necessary for reading out the remaining display and the remaining operation time of the display raster buffer under display are compared by a remaining time comparator 2045. Consequently, the priority of the display access is lowered when there is the sufficient time for reading out. The priority control signal for raising the priority of the display access is generated when the remaining time decreases. The accessing by the arithmetic processing means and the accessing by the display control means are subjected to the priority control in accordance with the priority thereof in this way and the waste of the memory access is eliminated.

42. 发明专利

JPH03116093A IMAGE PROCESSOR 失效
公开(公告)号：JPH03116093A
公开(公告)日：1991-05-17
申请号：JP25191789
申请日：1989-09-29
申请人： HITACHI LTD
发明人： YUNO KAZUHARU , NISHIDA TAKEHIKO , SUEOKA MAMORU
IPC分类号： G09G5/00
摘要： PURPOSE:To prevent a character or graphic display from becoming hard to see by determining a size of a character and a screen, based on display screen information obtained by utilizing a mechanism for reporting a screen size from a display device, and instructing a screen display to the display device. CONSTITUTION:From a display device 1, data which can recognize length of vertical and horizontal dimensions of a screen effective display area on an image processor 7 side is sent out by using a screen size report signal 2. On the device 7 side, this signal is recognized by a processor 6 through a screen size detecting circuit 4, and based on this data, vertical and horizontal dimensions of an effective display area of the display device 1 are obtained and the vertical dimension and the horizontal dimension per one dot of a picture element being the minimum unit for a screen display are derived in advance. In this state, when a character or a graphic is displayed on the screen of the display 1, a dot width size of an appropriate level is set, and the processor 6 instructs to display this character or graphic to a video signal output part 5. In such a way, it can be prevented that the character or graphic display becomes hard to see.

43. 发明专利

JPH01112472A HIDDEN SURFACE ERASING METHOD 失效
公开(公告)号：JPH01112472A
公开(公告)日：1989-05-01
申请号：JP27141887
申请日：1987-10-27
申请人： HITACHI LTD
发明人： SAKAIBARA TOORU , KANEMA SEIICHI , FUJITA MAKOTO , NISHIDA TAKEHIKO
IPC分类号： G06T11/00 , G06T15/00 , G06T15/40 , G06T15/80
摘要： PURPOSE:To normally execute the display of the edge of a three-dimensional graphic display by storing the graphic of a surface edge or on a surface in one polygon, referring the storage in case of painting-out and deciding a picture element to be hidden with the other surface when the said picture element corresponds to the stored picture element. CONSTITUTION:After the clear of a graphic memory, the graphic information of the edge, etc., namely, the presence and absence of the dot of the edge, etc., are written in correspondence to X and Y coordinates. At such a time, preferably, the Z coordinate of the surface, which is the nearest to this side, concerning the respective picture element is written to a depth value and the color information of the said dot are written to a frame memory. When the painting-out of one polygon is processed, the graphic memory is referred. Then, when the picture element to be written is recognized to be correspondent to the picture element in the graphic memory, the picture element is decided to be hidden by the other surface regardless of the Z coordinate and the picture element for painting-out is not written to the picture element. Thus, the picture element, to which the drawing of the edge and the painting-out processing are executed with being overlapped, is erased and in the display of the three-dimensional graphic, the normal erasion of the hidden surface is executed for the display of the edge.

44. 发明专利

JPS6486193A CHANGEOVER CONTROL OF DOUBLE BUFFER 失效
公开(公告)号：JPS6486193A
公开(公告)日：1989-03-30
申请号：JP24243687
申请日：1987-09-29
申请人： HITACHI LTD
发明人： YUNO KAZUHARU , NISHIDA TAKEHIKO , KOGA KAZUYOSHI
IPC分类号： G09G5/00 , G09G1/00 , G09G1/02 , G09G5/36
摘要： PURPOSE: To avoid deviation of a picture which is brought about on a CRT monitor screen in a conventional double buffer switching operation by causing a display switching means to switch a buffer at the timing of reception of a non-display period signal at the display switching of a frame memory buffer. CONSTITUTION: In switching buffers 7a and 7b, a graphic processor 22 first reads a control input port 26 and accesses a control signal output port 28 for write within a frame period fine adjustment time upon detection of a vertical synchronizing signal (waits for detection if it is not detected) and designates display switching of frame memory buffers 7a and 7b. A register or a color pallet as a conversion table of picture data in a frame memory and a color code is provided in a video D/A converter 20, and data write of this color pallet is limited to the non-display period. Thus, blurring on the CRT monitor screen is excluded.

45. 发明专利

JPS6426978A DETECTING SYSTEM FOR DISPLAY PATTERN 失效
公开(公告)号：JPS6426978A
公开(公告)日：1989-01-30
申请号：JP18232487
申请日：1987-07-23
申请人： HITACHI LTD
发明人： KANEMA SEIICHI , NIO MIYAKO , FUKUNAGA YASUSHI , NISHIDA TAKEHIKO
IPC分类号： G06F17/50 , G06F3/033 , G06F3/048 , G06T11/00 , G06T11/60 , G06T11/80 , G06T15/30
摘要： PURPOSE:To increase the detecting speed of graphic data by performing comparison between read display color data and a display color command of a graphic data buffer or between the read depth value and the depth value of a geometric form command of the graphic data buffer. CONSTITUTION:A graphic processor 6 reads out a display list of a graphic data buffer 5 and compares a set window with the graphic data to write the graphic data included in the window and the partial picture data of said graphic data in a frame memory 7. The memory 7 stores the display color data showing a color to be displayed with the picture elements shown on a display picture 8 in an address corresponding to said picture elements. Then all addresses of the area corresponding to a view port of the picture 8 are successively and repetitively read out. Thus image signals are obtained and supplied to the picture 8. A Z buffer 11 is used with a 3-dimensional pattern so that the depth value is stored for each point on a surface where each pattern can be viewed. The memory 7 stores the display color data only in an address corresponding to the point where the depth value is stored via the buffer 11.

46. 发明专利

JPS63223982A GRAPHIC PROCESSOR 失效
公开(公告)号：JPS63223982A
公开(公告)日：1988-09-19
申请号：JP5662287
申请日：1987-03-13
申请人： HITACHI LTD
发明人： WATANABE NORITO , TANIFUJI SHINYA , FUKUNAGA YASUSHI , FUKUSHIMA TADASHI , NISHIDA TAKEHIKO
IPC分类号： G06T11/20
摘要： PURPOSE:To change picture drawing without necessitating to rewrite a picture drawing instruction itself, by rewriting in advance a picture drawing data to a value to be changed, by a picture drawing instructing device or a picture drawing instruction executing device. CONSTITUTION:At the time of executing picture drawing, a picture drawing instruction executing device 130 can read a calculated value such as a coordinate value, etc. of a picture drawing instruction 121, from a designated picture drawing data store position 122 of a storage device 120 by a calculated value discriminating mechanism 133. In this case, when a picture drawing instructing device 110 or the picture drawing instruction executing device 130 rewrites the picture drawing data 122 to a value to be changed, in advance, the picture drawing can be changed without necessitating to rewrite the picture drawing instruction 121. In such a way, the picture drawing data 122 such as the coordinate value, etc., can be held separately from the picture drawing instruction 121, therefore, at the time of changing a graphic, the picture drawing of the graphic can be changed by only changing the graphic data, without changing the picture drawing instruction 121 itself.

47. 发明专利

JPS6261093A GRAPHIC DISPLAY UNIT 失效
公开(公告)号：JPS6261093A
公开(公告)日：1987-03-17
申请号：JP20044885
申请日：1985-09-12
申请人： HITACHI LTD
发明人： NISHIDA TAKEHIKO , HORI YUTARO , NAMATAME TADAO
IPC分类号： G09G5/18 , G09G1/02 , G09G1/16 , G09G5/36

48. 发明专利

JPS6191691A Display unit 失效
公开(公告)号：JPS6191691A
公开(公告)日：1986-05-09
申请号：JP21248884
申请日：1984-10-12
申请人： Hitachi Ltd
发明人： NISHIDA TAKEHIKO , HORI YUTARO
IPC分类号： G09G5/36 , G09G1/02 , G09G1/16 , G09G1/28 , G09G5/00 , G09G5/02

49. 发明专利

JPS6044695B2 JPS6044695B2 - 失效
公开(公告)号：JPS6044695B2
公开(公告)日：1985-10-04
申请号：JP9696877
申请日：1977-08-15
申请人： Hitachi Ltd
发明人： NISHIDA TAKEHIKO , OONUMA KUNIHIKO
IPC分类号： G06F7/00 , G06F5/00 , G06F5/01 , G06F7/76

50. 发明专利

JPS58133068A COMMUNICATION CONTROLLER 失效
公开(公告)号：JPS58133068A
公开(公告)日：1983-08-08
申请号：JP1490782
申请日：1982-02-03
申请人： HITACHI LTD
发明人： NISHIDA TAKEHIKO
IPC分类号： H04L29/04 , G06F9/445 , G06F13/00 , G06F13/38
摘要： PURPOSE:To change transmission procedures and speed without allowing a data processing device to bear a burden, by providing an RAM for storage of a transmission control program and an ROM for storage of an initializing program in a communication controller. CONSTITUTION:When a device is initialized, a program for transfer stored in an initializing program ROM 22 is operated to generate an interruption, and a transmission program is transferred from a main storage 2 of a data processing device 3 to a transmission control program RAM 23 of a communication controller 5. This transmission program includes all of information on transmission procedures, the transmission speed, and the selection of transmitting and receiving circuits for controlling a terminal to be connected. The transmission program stored in this RAM 23 is executed to switch transmission procedures, the transmission speed, and the serial data communication. Thus, the transmission program to be stored in the RAM 23 is changed to obtain optional transmission procedures and transmission speed.

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