专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

32. 发明专利

JP4752985B2 Conductive connection material and how to connect between terminals using the same 有权
公开(公告)号：JP4752985B2
公开(公告)日：2011-08-17
申请号：JP2011500785
申请日：2010-10-27
申请人：住友ベークライト株式会社
发明人：敏秋中馬 , 奉広鍵本
IPC分类号： H01R11/01 , H01B5/16
CPC分类号： H01L24/29 , C09J7/22 , C09J7/28 , C09J7/35 , C09J2201/602 , C09J2201/61 , C09J2203/326 , C09J2400/163 , C09J2433/00 , C09J2461/00 , C09J2479/08 , H01L24/16 , H01L24/32 , H01L24/83 , H01L24/92 , H01L2224/16225 , H01L2224/29012 , H01L2224/29076 , H01L2224/29083 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29298 , H01L2224/299 , H01L2224/32225 , H01L2224/73204 , H01L2224/83101 , H01L2224/83205 , H01L2224/83815 , H01L2224/83886 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/3025 , H05K3/3436 , H05K3/3457 , H05K3/363 , H05K2201/10977 , H05K2203/0405 , H05K2203/1189 , Y02P70/613 , Y10T428/31678 , Y10T428/31699 , H01L2924/00 , H01L2924/01083 , H01L2924/00012 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299
摘要： The present invention provides a conductive connecting material having a multilayered structure comprising a resin composition (A) and a metal foil (B) selected from a solder foil or a tin foil, wherein the volume ratio ((A)/(B)) of the resin composition (A) and the metal foil (B) selected from a solder foil or a tin foil in the conductive connecting material is 1-40 or 20-500, as well as a method for connecting terminals using the conductive connecting material. The conductive connecting material of the present invention is preferably used for electrically connecting electronic members in an electrical or electronic component.

33. 发明专利

JP2011151399A Integrated process condition sensing wafer and data analysis system 有权
标题翻译：综合过程感知波形和数据分析系统
公开(公告)号：JP2011151399A
公开(公告)日：2011-08-04
申请号：JP2011024346
申请日：2011-02-07
申请人： Kla-Tencor Corp , ケーエルエー−テンカーコーポレイション
发明人： RENKEN WAYNE G , JENSEN EARL , GORDON ROY
IPC分类号： H01L21/02 , H01L21/00 , H01L21/677
CPC分类号： H01L21/67253 , H01L2224/48091 , H01L2924/01087 , H01L2924/10253 , H01L2924/12041 , H01L2924/15153 , H01L2924/15157 , H01L2924/15165 , H01L2924/16152 , H01L2924/16153 , H01L2924/16195 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To highly integrate a process condition measuring device and a handling system with a production environment.
SOLUTION: In integration, the dimensions of the process condition measuring device are set close to those of a production substrate, and the handling system 880 is made similar to a substrate carrier used for the production substrate. Process conditions are measured with little disturbance to the production environment. Data are transferred from the process condition measuring device to a user without accompanying human interventions.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：将生产环境的过程状态测量装置和处理系统高度整合。解决方案：在整合中，将工艺状态测量装置的尺寸设置为接近制造基板的尺寸，并且处理系统880被制成与用于生产基板的基板载体相似。测量过程条件对生产环境的干扰很小。数据从过程状态测量装置转移到用户，而不需要人为干预。版权所有（C）2011，JPO＆INPIT

34. 发明专利

JP2011146709A Light-emitting device and illumination system 审中-公开
标题翻译：发光装置和照明系统
公开(公告)号：JP2011146709A
公开(公告)日：2011-07-28
申请号：JP2011004106
申请日：2011-01-12
申请人： Lg Innotek Co Ltd , エルジーイノテックカンパニーリミテッド
发明人： MIN BONG KUL , KIM DEUNG KWAN
IPC分类号： H01L33/64 , F21S2/00 , F21V19/00 , F21Y101/02 , H01L33/00
CPC分类号： H01L33/483 , H01L25/167 , H01L33/60 , H01L33/62 , H01L33/642 , H01L2224/48091 , H01L2224/48137 , H01L2924/01087 , H05K1/021 , H05K2201/10106 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a light-emitting element package, having a new structure and capable of effectively radiating the heat generated by a light-emitting element, and to provide a light-emitting device. SOLUTION: A light-emitting element package includes a package body in which a cavity is formed; a first and a second frames that penetrate the package body to be exposed in the cavity; a third frame that forms a bottom face of the cavity which is to be electrically divided into the first and the second frames; a light-emitting element arranged on the third frame; and a wire that electrically connects the light-emitting element with the first and the second frames. The top face of the third frame includes a first plane having a first height; a second plane having a second height smaller than the first height; and an inclined plane connecting the first plane and the second plane. The inclined plane is exposed in the cavity. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供具有新结构并能够有效地辐射由发光元件产生的热量的发光元件封装，并提供发光器件。解决方案：发光元件封装包括其中形成空腔的封装体; 穿过所述包装体以暴露在所述空腔中的第一和第二框架; 第三框架，其形成将被分成第一和第二框架的空腔的底面; 布置在所述第三框架上的发光元件; 以及将发光元件与第一和第二框架电连接的导线。第三框架的顶面包括具有第一高度的第一平面; 具有小于所述第一高度的第二高度的第二平面; 以及连接第一平面和第二平面的倾斜平面。倾斜平面暴露在空腔中。版权所有（C）2011，JPO＆INPIT

35. 发明专利

JP2011109104A Method for sealing electronic component 审中-公开
标题翻译：密封电子元件的方法
公开(公告)号：JP2011109104A
公开(公告)日：2011-06-02
申请号：JP2010258171
申请日：2010-11-18
申请人： Stmicroelectronics (Tours) Sas , エステマイクロエレクトロニクス(トゥールス) エスアーエス
发明人： FERON MARC , JARRY VINCENT , BARREAU LAURENT
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L25/0657 , H01L21/561 , H01L23/3114 , H01L25/50 , H01L2224/16145 , H01L2225/06513 , H01L2225/06541 , H01L2924/01087
摘要： PROBLEM TO BE SOLVED: To provide a method for sealing electronic components without the need for use of a handle wafer by avoiding a warpage phenomenon.
SOLUTION: The method for sealing electronic components includes the steps of: forming, in a first surface of a semiconductor wafer (10), electronic components; forming, on the first surface, an conductive interconnection stack (18) covered with an insulating material; forming first and second bonding pads (24A, 24B) on the interconnection stack (18); thinning down the wafer (10), except at least on the contour of the semiconductor wafer (10); filling the thinned-down region of the semiconductor wafer (10) with a first resin layer (38); arranging a first electronic chip (42) on the first bonding pads (24B) and forming a first solder bumps (44) on the second bonding pads (24A); depositing a second resin layer (46) covering the first electronic chips (42) and partially covering the solder bumps (44); bonding an adhesive strip (48) on the first resin layer (38); and scribing the structure into individual chips.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种密封电子部件的方法，而不需要通过避免翘曲现象来使用手柄晶片。解决方案：密封电子部件的方法包括以下步骤：在半导体晶片（10）的第一表面中形成电子部件; 在第一表面上形成用绝缘材料覆盖的导电互连叠层（18）; 在所述互连堆叠（18）上形成第一和第二接合焊盘（24A，24B）; 至少在半导体晶片（10）的轮廓上除外，使晶片（10）变薄; 用第一树脂层（38）填充半导体晶片（10）的减薄区域; 在所述第一接合焊盘（24B）上布置第一电子芯片（42）并且在所述第二接合焊盘（24A）上形成第一焊料凸块（44）; 沉积覆盖第一电子芯片（42）并部分覆盖焊料凸块（44）的第二树脂层（46）; 在第一树脂层（38）上粘合粘合剂条（48）; 并将结构划分成单个芯片。版权所有（C）2011，JPO＆INPIT

36. 发明专利

JP2011515845A Die substrate having a reinforcing structure 有权
公开(公告)号：JP2011515845A
公开(公告)日：2011-05-19
申请号：JP2011500307
申请日：2009-03-19
申请人：エーティーアイ・テクノロジーズ・ユーエルシーAti Technologies Ulc
发明人：ズブルゼズニィ，アダム , トーパシオ，ローデン
IPC分类号： H01L23/12
CPC分类号： H01L23/3128 , H01L23/16 , H01L23/562 , H01L2224/131 , H01L2224/16 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81815 , H01L2224/92125 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511 , H05K1/0271 , H05K3/3452 , H05K3/3457 , H05K2201/09136 , H05K2201/09781 , H05K2203/043 , H01L2924/014 , H01L2924/00014
摘要： Various semiconductor chip package substrates with reinforcement and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a package substrate that has a first side and a second side opposite to the first side. The first side has a central area adapted to receive a semiconductor chip. A solder reinforcement structure is formed on the first side of the package substrate outside of the central area to resist bending of the package substrate.

37. 发明专利

JP2011084743A Adhesive composition, method for manufacturing the same, as well as adhesive film, substrate for mounting semiconductor, and semiconductor device, using this 有权
标题翻译：胶粘剂组合物，其制造方法以及粘合膜，用于安装半导体的基板和半导体器件，使用该
公开(公告)号：JP2011084743A
公开(公告)日：2011-04-28
申请号：JP2010261408
申请日：2010-11-24
申请人： Hitachi Chem Co Ltd , 日立化成工業株式会社
发明人： INADA TEIICHI , SUMIYA KEIJI , TOMIYAMA TAKEO , IWAKURA TETSUO , KAWAKAMI HIROYUKI , SUZUKI MASAO , MATSUZAKI TAKAYUKI , HOSOKAWA YOICHI , HATAKEYAMA KEIICHI , SHIMADA YASUSHI , TANAKA HIROKO , KURITANI HIROYUKI
IPC分类号： C09J163/00 , B32B27/34 , B32B27/38 , C08G59/18 , C09J7/00 , C09J11/00 , H01L23/14 , H01L23/29 , H01L23/31
CPC分类号： H01L23/14 , C08G59/18 , C08L2666/02 , C08L2666/04 , C09J7/10 , C09J7/35 , C09J163/00 , C09J2205/102 , C09J2433/00 , C09J2463/00 , H01L23/145 , H01L23/293 , H01L23/3114 , H01L23/3737 , H01L23/564 , H01L2224/50 , H01L2924/01019 , H01L2924/01068 , H01L2924/01087 , H01L2924/12044 , H01L2924/15311 , H05K1/0271 , Y10T156/1089 , Y10T428/2839 , Y10T428/287 , Y10T428/31511
摘要： PROBLEM TO BE SOLVED: To provide an adhesive composition capable of forming an adhesive film which has the heat resistance and moisture resistance necessary for the case of mounting on a semiconductor-mounting substrate a semiconductor element having the larger difference therefrom in the thermal expansion coefficient and which can suppress the volatile content in the use; a method for manufacturing the same; and an adhesive film, a substrate for mounting a semiconductor, and a semiconductor device each using this adhesive composition. SOLUTION: The adhesive composition comprises (a) an epoxy resin, (b) a hardener, and (c) a polymer compound of the non-compatibility with the epoxy resin, and according to demand, additionally comprises (d) a filler and/or (e) a curing accelerator; the method for manufacturing the adhesive composition comprises mixing (a) an epoxy resin, (b) a hardener, and (d) a filler to give a mixture, and then mixing the mixture with (c) a polymer compound of the non-compatibility with the epoxy resin; the adhesive film is made by forming the composition into a filmy shape; the semiconductor-mounting substrate has the adhesive film on the chip-mounting face of a wiring substrate; and the semiconductor device uses the adhesive film or the semiconductor-mounting substrate. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够形成粘合剂膜的粘合剂组合物，其具有在半导体安装基板上安装的情况下具有耐热性和耐湿性的半导体元件，其在热传导中具有较大差异的半导体元件膨胀系数，可以抑制使用中的挥发物含量; 其制造方法; 以及粘合膜，用于安装半导体的基板和使用该粘合剂组合物的半导体装置。粘合剂组合物包含（a）环氧树脂，（b）固化剂，和（c）与环氧树脂不相容的高分子化合物，根据需要，还包含（d）填料和/或（e）固化促进剂; 制造粘合剂组合物的方法包括混合（a）环氧树脂，（b）固化剂和（d）填料以得到混合物，然后将混合物与（c）不兼容的高分子化合物与环氧树脂; 通过将组合物形成为薄膜状而制成粘合膜; 半导体安装基板在布线基板的芯片安装面上具有粘合膜; 并且半导体器件使用粘合膜或半导体安装基板。版权所有（C）2011，JPO＆INPIT

38. 发明专利

JP2011040749A Method and package for circuit chip packaging 审中-公开
标题翻译：电路芯片封装的方法和封装
公开(公告)号：JP2011040749A
公开(公告)日：2011-02-24
申请号：JP2010179491
申请日：2010-08-10
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： YVES C MARTIN , VAN KESSEL THEODORE G , IRUVANTI SUSHUMNA , WEI XIAOJIN
IPC分类号： H01L23/10 , H01L23/02 , H01L23/373
CPC分类号： H01L23/433 , H01L23/10 , H01L23/367 , H01L24/32 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/83385 , H01L2924/00015 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/1579 , H01L2924/16152 , H01L2924/167 , H01L2924/3511 , H01L2924/01028 , H01L2924/01026 , H01L2924/00014 , H01L2224/8381
摘要： PROBLEM TO BE SOLVED: To provide a method of assembling a bent circuit chip package, and a circuit chip package having a bent structure. SOLUTION: The circuit chip package includes: a substrate having a first coefficient of thermal expansion (CTE); a circuit chip having a second CTE and mounted onto the substrate; a metal foil disposed on the circuit chip in thermal contact with the chip; a metal lid having (i) a third CTE that is different from the first CTE and (ii) a bottom edge region, where the metal lid is disposed on the metal foil in thermal contact with the metal foil; and an adhesive layer along the bottom edge of the metal lid, cured at a first temperature, bonding the lid to the substrate, and producing an assembly which, at a second temperature, is transformed to a bent circuit chip package. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供组装弯曲电路芯片封装的方法和具有弯曲结构的电路芯片封装。电路芯片封装包括：具有第一热膨胀系数（CTE）的衬底; 具有第二CTE并安装在所述基板上的电路芯片; 设置在与芯片热接触的电路芯片上的金属箔; 金属盖，其具有（i）与第一CTE不同的第三CTE和（ii）底部边缘区域，金属盖设置在与金属箔热接触的金属箔上; 以及沿着金属盖的底部边缘的粘合剂层，在第一温度下固化，将盖结合到基底，并且产生在第二温度下被转换成弯曲的电路芯片封装的组件。版权所有（C）2011，JPO＆INPIT

39. 发明专利

JP2010287592A Semiconductor device, semiconductor wafer, and method of manufacturing the same 审中-公开
标题翻译：半导体器件，半导体器件及其制造方法
公开(公告)号：JP2010287592A
公开(公告)日：2010-12-24
申请号：JP2009137893
申请日：2009-06-09
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： NAKA YASUHIRO , TANAKA TADAYOSHI , UEMATSU SHUNEI , MIYAZAKI CHUICHI , SUZUKI KAZUNARI , NAKAJIMA YASUYUKI , ABE YOSHIYUKI , TAKATSU KENJI , KITAICHI YUKIHIRO , OKANE SHINYA
IPC分类号： H01L21/304 , H01L21/301 , H01L21/3205 , H01L21/60 , H01L23/52
CPC分类号： H01L24/11 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05571 , H01L2224/05644 , H01L2224/06102 , H01L2224/13022 , H01L2224/13099 , H01L2224/16 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01064 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10158 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/05552 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a technology capable of suppressing the occurrence of cracks in a diced semiconductor chip, when dicing a semiconductor wafer in which a bump electrode is formed in each chip region into individual semiconductor chips. SOLUTION: A groove DT is formed on the back of a semiconductor wafer WF with an adhesive tape AT pasted to the main surface of the semiconductor wafer WF. In order to form the groove DT on the back of the semiconductor wafer WF, after applying a resist film on the back of the semiconductor wafer WF, the resist film is patterned by using photolithography technology. The resist film is patterned so that no resist film remains in a region for forming the groove DT. The groove DT is formed in the prescribed region of the semiconductor wafer WF by dry-etching technology using the patterned resist film as a mask. Concretely, the groove DT is formed in a region in the vicinity of a dicing line DL. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供能够抑制切割的半导体芯片中的裂纹的发生的技术，当将在每个芯片区域中形成凸起电极的半导体晶片切割成单独的半导体芯片时。解决方案：在半导体晶片WF的背面上形成凹槽DT，其中粘合带AT粘贴到半导体晶片WF的主表面。为了在半导体晶片WF的背面上形成沟槽DT，在半导体晶片WF的背面上涂覆抗蚀剂膜之后，通过使用光刻技术对抗蚀剂膜进行构图。抗蚀剂膜被图案化，使得在用于形成凹槽DT的区域中不存在抗蚀剂膜。通过使用图案化的抗蚀剂膜作为掩模的干蚀刻技术，在半导体晶片WF的规定区域中形成凹槽DT。具体地说，槽DT形成在切割线DL附近的区域。版权所有（C）2011，JPO＆INPIT

40. 发明专利

JP4602970B2 Electrical stability and impact resistance of the electronic device for the conductive adhesive composition 有权
公开(公告)号：JP4602970B2
公开(公告)日：2010-12-22
申请号：JP2006508764
申请日：2004-02-18
申请人：ナショナルスターチアンドケミカルインベストメントホールディングコーポレイション
发明人：シャオ，ユー , チェン，チ−ミン , ドレーゼン，ギュンテル , ヒーレーマン，スン
IPC分类号： C08G59/56 , C08G59/18 , C08G59/68 , C08K3/00 , C08K3/08 , C08K5/3415 , C08L63/00 , C09J163/02 , H01B1/22 , H01L21/52 , H01L21/60 , H05K3/32
CPC分类号： C09J163/00 , C08G59/184 , C08G59/686 , C08K3/08 , H01L24/83 , H01L2224/2929 , H01L2224/29311 , H01L2224/29313 , H01L2224/29324 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29364 , H01L2224/29369 , H01L2224/29393 , H01L2224/29424 , H01L2224/29447 , H01L2224/83851 , H01L2924/01079 , H01L2924/01087 , H01L2924/01322 , H01L2924/14 , H05K3/321 , H05K2203/122 , H05K2203/124 , H01L2924/3512 , H01L2924/00 , H01L2924/0665 , H01L2924/00014
摘要： A composition that comprises a) an admixing of at least one epoxy resin and aliphatic amine wherein the ratio of epoxy function group/amine is greater than 1; b) a conductive filler; c) one or more corrosion inhibitors, oxygen scavengers or both; d) imidazole as a curing agent/catalyst; and e) optionally other additives such as organic solvents, flow additives, adhesion promoters and rheology modifiers. The reaction of epoxy and aliphatic amine with excess epoxy functionality results in a flexible resin with remaining active epoxy groups. The compositions exhibit improved electrical stability and impact resistance over other conductive adhesive compositions that do not comprise the admixture.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式