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31. 发明专利

JPS59161195A Differential signal detecting circuit 失效
标题翻译：差分信号检测电路
公开(公告)号：JPS59161195A
公开(公告)日：1984-09-11
申请号：JP3458783
申请日：1983-03-04
申请人： Hitachi Ltd , Nippon Telegr & Teleph Corp
发明人： KITANO JIYUNJIROU , OOHIGATA ICHIROU , HAYASHI TOSHIO , KIMURA TADAKATSU
IPC分类号： H04Q3/42 , H04M19/00 , H04Q3/72
CPC分类号： H04M19/005 , Y02D70/00
摘要： PURPOSE:To realize a monolithic IC constitution of a subscriber's circuit at a low cost by constituting a titled circuit so that only a differential signal is detected from two differential signal outputs, and the same phase noise signal is suppressed. CONSTITUTION:A two-wire differential signal current generated from a subscriber's terminal 3 flows through current mirrors 12, 13 as indicated with a full line arrow id, and an output current of the mirror 12 is current-inverted by a current mirror 14, and flows through a resistance 18 and a transistor TR17. An output current of the mirror 13 flows to a resistance 16 and a TR15. In this case, in case when resistance values of the resistances 16, 18 are made equal to each other, if the same phase noise current indicated with a dotted line ic is generated in a line resistance 4, the same phase current component inputted to the mirror 12 becomes an opposite direction, therefore, the same phase component is not generated in an output terminal 19. In the same way the same phase noise current is not generated in an output terminal 20. That is to say, only a differential signal is detected from the terminals 19, 20, and the same phase noise signal is suppressed. According to this circuit configuration, it is unnecessary to use a high resistance in order to reduce the power consumption, and an IC constitution is executed easily.
摘要翻译：目的：通过构成标题电路，以低成本实现用户电路的单片IC结构，使得仅从两个差分信号输出检测差分信号，并抑制相同的相位噪声信号。构成：从用户终端3产生的两线差分信号电流流过电流镜12,13，如全线箭头id所示，反射镜12的输出电流由电流镜14电流反相，而流过电阻18和晶体管TR17。反射镜13的输出电流流向电阻16和TR15。在这种情况下，在使电阻16,18的电阻值相等的情况下，如果在线电阻4中产生用虚线ic表示的相同的相位噪声电流，则输入到反射镜12成为相反的方向，因此在输出端子19中不产生相同的相位分量。以相同的方式，在输出端子20中不产生相同的相位噪声电流。也就是说，仅差分信号为从端子19,20检测出相同的相位噪声信号。根据该电路结构，为了降低功耗，不需要使用高电阻，容易进行IC结构。

32. 发明专利

JPS59161193A Two wire-four wire conversion circuit 失效
标题翻译：两线四线转换电路
公开(公告)号：JPS59161193A
公开(公告)日：1984-09-11
申请号：JP3457883
申请日：1983-03-04
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： KITANO JIYUNJIROU , OOHIGATA ICHIROU , HAYASHI TOSHIO , KIMURA TADAKATSU , TAWARA TOSHIYUKI , UEKI ISAMU , TAKADA KENZOU
IPC分类号： H04B3/03 , H04B1/58 , H04M19/00 , H04Q3/42
CPC分类号： H04B1/58
摘要： PURPOSE:To hold the good characteristic of a subscriber's circuit, also to simplify the configuration of a circuit, and to realize an IC constitution by executing the processing for cancelling a leakage signal by a current mode. CONSTITUTION:A terminal impedance ZL of two-wire side terminals (A, B) is determined in proportion to an impedance 14 by a negative feedback loop of a differential signal detector 1 - a voltage-current transducer 12 - a current amplifier 6. In this way, basing on mismatching of the impedance ZL and 14, a leakage signal to the transmitting side from the receiving side is cancelled by a current generated in a series circuit of a balance impedance 19 and an artificial terminal impedance.
摘要翻译：目的：为了保持用户电路的良好特性，也简化电路的配置，并且通过执行通过当前模式来消除泄漏信号的处理来实现IC结构。构成：两线侧端子（A，B）的端子阻抗ZL通过差分信号检测器1的负反馈环路 - 电压 - 电流传感器12--电流放大器6，与阻抗14成比例地确定。以这种方式，基于阻抗ZL和14的不匹配，通过在平衡阻抗19的串联电路中产生的电流和人造端子阻抗来消除从接收侧到发送侧的泄漏信号。

33. 发明专利

JPS598463A Grounding detection circuit 失效
标题翻译：接地检测电路
公开(公告)号：JPS598463A
公开(公告)日：1984-01-17
申请号：JP11675782
申请日：1982-07-07
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： KITANO JIYUNJIROU , OOHIGATA ICHIROU , HAYASHI TOSHIO , TAWARA TOSHIYUKI , UEKI ISAMU , USAMI TAKASHI
IPC分类号： H04M19/00 , H04Q3/00
CPC分类号： H04Q3/00
摘要： PURPOSE:To attain the detection with high accuracy using the same grounding detection resistor and to apply this circuit with IC constitution, by compensating a difference of the grounding detection resistor based on the difference of a grounding current due to use/non-use state of a terminal, by a load current output. CONSTITUTION:A detecting voltage proportional to a current difference IA-IB between a battery line current IA and a grounding line current IB is applied from a current difference detecting circuit 7 to a comparison circuit, and a voltage difference subtracting a detected voltage proportional to a load current IL out of a reference voltage VREF is applied from a circuit 11 to the comparison circuit 8, respectively. The circuit 8 generates an inverted grounding detecting output when the comparison input is larger than a reference input. Further, the grounding detecting resistor is made the same independently of the use/non-use state of the terminal 1 by determining the decrease compensating component of a grounding current IG depending on the usage state of a subscriber terminal 1 to a prescribed value.
摘要翻译：目的：使用相同的接地检测电阻器以高精度实现检测，并通过IC结构应用该电路，通过基于由于使用/不使用状态引起的接地电流的差异来补偿接地检测电阻器的差异一个终端，通过负载电流输出。构成：将电流线电流IA与接地线电流IB之间的电流差IA-IB成比例的检测电压从电流差检测电路7施加到比较电路，减去与参考电压VREF中的负载电流IL分别从电路11施加到比较电路8。当比较输入大于参考输入时，电路8产生反相接地检测输出。此外，通过根据用户终端1的使用状态确定接地电流IG的减小补偿分量至规定值，使接地检测电阻器与终端1的使用/不使用状态无关。

34. 发明专利

JPS58104559A DIRECT CURRENT SUPPLYING CIRCUIT 失效
公开(公告)号：JPS58104559A
公开(公告)日：1983-06-22
申请号：JP20402781
申请日：1981-12-17
申请人： NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD , FUJITSU LTD
发明人： HAYASHI TOSHIO , KAWARADA KUNIYASU , UEKI ISAMU , KITANO JIYUNJIROU , TAWARA TOSHIYUKI , TAKADA KENZOU
IPC分类号： H04M19/00
摘要： PURPOSE:To reduce the power consumption of a DC supplying circuit for subscriber circuits, by setting the stand-by power of a differential amplifier or its corresponding amplifier to zero or a value close to zero. CONSTITUTION:Assuming that a current amplifier consists of resistors 32, 33 and transistors (TRs) 37, 38 and 31 and the current amplification factor of each TR is high and each base current is negligible in its operation, an input current from a terminal 35 flows to the resistor 33, and an input current from a terminal 34 and an output current from a terminal 36 flow to a terminal 34, then the current amplification factor of the entire circuit is given with the resistance ratio of the resistors 32 and 33 only. The current flowing to the TRs 37, 38 and the resistor 33 is respectively equal to the input currents from the terminals 34 and 35 and the current flowing to the TR31 and the resistor 32 is proportional to the input current, then the input current is made to zero, each operating current becomes zero, allowing to zero the power consumption at stand-by.

35. 发明专利

JPS58101511A DC OFFSET ELIMINATING CIRCUIT 失效
公开(公告)号：JPS58101511A
公开(公告)日：1983-06-16
申请号：JP19950281
申请日：1981-12-12
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： TAWARA TOSHIYUKI , KATAOKA MUTSUO , HAYASHI TOSHIO , UEKI ISAMU , KITANO JIYUNJIROU , TAKADA KENZOU
IPC分类号： H03F3/34 , H03F3/347
摘要： PURPOSE:To make the electronic circuitry and circuit integration easy, without using a choke coil and with decreased capacitance value, by converting an output of a current voltage conversion circuit into a current via a low-pass filter and feeding it back to the current voltage converting circuit. CONSTITUTION:The absolute value of currents applied to an inverting and a non-inverting input of an operational amplifier OP of a current voltage conversion circuit 10 is the same and the polarity is inverted. Further, an unbalanced output voltage Vout passes through a low-pass filter consisting of a resistor R4 and a capacitor C0, is applied to the base of a transistor(TR) Q0 of a voltage current conversion circuit 30, where the voltage is converted into a current with the mutual conductance of TRsQ0, Q1. The current is fed back to points (a), (b) being inputs to the circuit 10 as a current signal and summed with a signal current of a balanced current source 1 and applied to the circuit 10. Thus, only a DC component negligible as small as several mV appears at the Vout, allowing to output an AC signal voltage as large as several V.

36. 发明专利

JPS58100566A DIRECT CURRENT OFFSET COMPENSATING CIRCUIT 失效
公开(公告)号：JPS58100566A
公开(公告)日：1983-06-15
申请号：JP19934481
申请日：1981-12-10
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD
发明人： TAKADA KENZOU , USAMI TAKASHI , HAYASHI TOSHIO , TAWARA TOSHIYUKI , UEKI ISAMU , KITANO JIYUNJIROU
IPC分类号： G05F3/16 , H04M19/00
摘要： PURPOSE:To eliminate the noise of a power supply and to extend the range of distance of a subscriber line, by providing a constant current source which flows a constant current compensating a voltage drop of a current mirror circuit and a power supply noise rejection circuit superimposingly on the current mirror circuit. CONSTITUTION:In a subscriber circuit supplying a current IL to a load ZL including a subscriber telephone circuit connected between lines A and B, a constant current source CNI which flows a constant current I0 compensating a voltage drop due to current mirror circuits A-C, A'-C' and a power supply noise rejection circuit consisting of filters R1, R2, C1 superimposingly on the current mirror circuit, is provided, allowing to compensate the voltage drop even if a subscriber circuit consists of a plurality of current mirror circuits and to obtain the similar feeding characteristics as the direct feeding to the load ZL with a power supply voltage VBB. Further, the constant current source CNI, the current mirror circuit and transistors Q1, Q2 are made coincident with the temperature characteristics, allowing to constitute the integrated circuit on the same silicon chip.

37. 发明专利

JPS5895414A LEVEL SWITCHING CIRCUIT 失效
公开(公告)号：JPS5895414A
公开(公告)日：1983-06-07
申请号：JP19393481
申请日：1981-12-02
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD
发明人： TAKADA KENZOU , ISHIKAWA TAMOTSU , HAYASHI TOSHIO , UEKI ISAMU , KITANO JIYUNJIROU , TAWARA TOSHIYUKI
IPC分类号： H03G3/12 , H03G1/00
摘要： PURPOSE:To switch easily a signal current level, by connecting the collector of a transistor for voltage-current conversion to a current mirror circuit and connecting the emitter to plural resistances which are switched to be connected. CONSTITUTION:When the control signal applied to an input terminal CTL is 0, an analog switch consisting of transistors TRs Q1 and Q2 is turned off, and a current Vin/(R1+R2) is flowed to resistances R1 and R2 by a signal voltage Vin applied to an input terminal IN, and a constant current due to a constant current source I1 is superposed in the emitter of a TRQ0, and the collector output current is flowed to the input terminal of a current mirror circuit R. A constant current due to a constant current source I2 is subtracted to output a signal current Iout=Vin/(R1+R2) to an output terminal OUT. When the control signal is 1, the analog switch is turned on, and the resistance R2 is short-circuited, and a current Vin/R1 is flowed to the resistance R1, and an output current Iout=Vin/R1 is outputted.

38. 发明专利

JPS57124962A Current supply circuit 失效
标题翻译：电流供电电路
公开(公告)号：JPS57124962A
公开(公告)日：1982-08-04
申请号：JP1024481
申请日：1981-01-28
申请人： Hitachi Ltd , Nippon Telegr & Teleph Corp
发明人： TOKUNAGA MICHIO , KITANO JIYUNJIROU , SAGAWA AKIO , HAYASHI TOSHIO , HAMASATO KAZUO
IPC分类号： G05F1/56 , H04M19/00
CPC分类号： H04M19/00 , Y02D70/00
摘要： PURPOSE:To decrease the power consumption of a current supply circuit, by converting the output voltage of a DC-DC conversion circuit into a voltage between a sum of a voltage drop across a load resistor plus a specified value of an operating voltage of a DC power supply circuit, and a power supply voltage, through the use of the DC-DC conversion circuit. CONSTITUTION:When a current Is proportional to a load current flows to a comparison terminal of an error amplifier COMP, an output voltage VOUT of a DC-DC converting circuit 9 changed depending on the current Is, and when the current Is increases, the voltage VOUT is decreased, while the current Is decreases, the voltage VOUT is increased. In this operation, when an output voltage of the circuit 9 is between a sum of a specified value of the operating voltage of a DC supply circuit 8 plus a voltage drop across a load resistor, and a power supply voltage VBB, the power consumption of a current supply circuit 6 is reduced.
摘要翻译：目的：为了降低电源电路的功耗，通过将DC-DC转换电路的输出电压转换为负载电阻之间的电压降和DC的工作电压的指定值之和之间的电压电源电路和电源电压，通过使用DC-DC转换电路。构成：当与负载电流成比例的电流流向误差放大器COMP的比较端时，DC-DC转换电路9的输出电压VOUT根据电流Is而变化，并且当电流Is增加时， VOUT减小，而电流Is降低，电压VOUT增加。在这种操作中，当电路9的输出电压在直流电源电路8的工作电压的指定值加上负载电阻器两端的电压降的和之和和电源电压VBB之间时，功率消耗电流供给电路6减少。

39. 发明专利

JPS5758405A Semiconductor electric circuit 失效
标题翻译：半导体电路
公开(公告)号：JPS5758405A
公开(公告)日：1982-04-08
申请号：JP13294680
申请日：1980-09-26
申请人： Hitachi Ltd , Nippon Telegr & Teleph Corp
发明人： SUZUKI MASAYOSHI , SAGAWA AKIO , KITANO JIYUNJIROU , HAYASHI TOSHIO
IPC分类号： H03F3/343 , H03F3/34 , H03F3/347
摘要： PURPOSE: To reduce error of a constant current output, by setting the voltage operating point of a current setting transistor to a region where a collector current is constant.
CONSTITUTION: A means 20 having a constant voltage characteristics is connected to base and collector of a current setting transistor 10, a voltage between th collector and emitter at setting is increased, and th nonlinear effect can be reduced. A voltage between the collector and emitter of the transistor 10 is increased by a voltage of a means 20 having the constant voltage characteristics, and the operating point is as shown in point (c), the voltage between the collector and emitter can be increased as VB3, and the constant current region of the transistor can be utilized, and the output current characteristics can be improved. As the means 20 of the constant voltage characteristics, battery, constant voltage diode and diode forward series connection can be used.
COPYRIGHT: (C)1982,JPO&Japio
摘要翻译：目的：通过将电流设定晶体管的电压工作点设置为集电极电流恒定的区域，以减少恒定电流输出的误差。构成：具有恒定电压特性的装置20连接到电流设定晶体管10的基极和集电极，设定时集电极和发射极之间的电压增加，并且可以减小非线性效应。晶体管10的集电极和发射极之间的电压通过具有恒定电压特性的装置20的电压而增加，并且工作点如点（c）所示，集电极和发射极之间的电压可以增加为 VB3，并且可以利用晶体管的恒定电流区域，并且可以提高输出电流特性。作为恒压特性的手段20，可以使用电池，恒压二极管和二极管正向串联连接。

40. 发明专利

JPS55158647A MULTIPLE POWER SOURCE SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPS55158647A
公开(公告)日：1980-12-10
申请号：JP6564779
申请日：1979-05-29
申请人： HITACHI LTD
发明人： MATSUYAMA MITSUO , KITANO JIYUNJIROU
IPC分类号： H01L21/822 , H01L21/8222 , H01L27/02 , H01L27/04 , H01L27/06
摘要： PURPOSE:To minimize the variation of substrate potential by a method wherein diodes, which are changed into inverse bias when the diodes are normally operated, are previously connected among a power source terminal deciding the substrate potential and other terminals in a multiple power source semiconductor IC for electrically insulating elements mutually according to a pn-junction separating system. CONSTITUTION:A resistor 36 is connected to a base of a transistor 34 forming an IC and a resistor 35 to a collector respectively, and the positive potential of a power source E3 deciding substrate potential is connected to the resistors 36, 35 through a terminal VCC and negative potential to an emitter of the transistor 34 through a terminal GND respectively. Other power sources are further used in order to mutually separate the elements of the transistor 34; the negative potential of a power source E1, whose potential is minimized, is applied to the emitter of the transistor 34 through a terminal VBB and a diode 33 and to the resistors 35, 36 through a diode 32 and further to the negative potential of a power source E2 separately mounted through a diode 31 and a terminal VEE respectively. Thus, the floating potential of a substrate is clamped by means of the diodes 31-33 changed into inverse bias.

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