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31. 发明专利

JP2008263159A Method of manufacturing variable resistance element 有权
标题翻译：制造可变电阻元件的方法
公开(公告)号：JP2008263159A
公开(公告)日：2008-10-30
申请号：JP2007282261
申请日：2007-10-30
申请人： Sharp Corp , シャープ株式会社
发明人： INOUE YUSHI , ONISHI TETSUYA , ISHIHARA KAZUYA , SHIBUYA TAKAHIRO , HOSOI YASUNARI , YAMAZAKI NOBUO , NAKANO TAKASHI
IPC分类号： H01L27/10 , H01L45/00 , H01L49/00
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing variable resistance elements which can exactly reproduce a stable switching operation. SOLUTION: A conductive thin film 14 is deposited on a semiconductor substrate 11 and is patterned after a predetermined figure, then a first interlayer insulating film 13 is deposited on the thin film 14. Then, an opening portion 15 is formed on the first interlayer insulating film 13 so that the upper surface of the conductive thin film 14 is exposed, and thinning treatment is carried out onto the conductive thin film 14 formed on the bottom of the opening portion 15, and then oxidation treatment is carried out onto the surrounding portion of the exposed conductive thin film 14. Whereby, a variable resistance film 16 is formed in the surrounding area of the opening portion 15, and the conductive thin film 14 is divided into a first electrode 14a and a second electrode 14b due to the variable resistance film 16. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造可精确再现稳定切换操作的可变电阻元件的方法。解决方案：将导电薄膜14沉积在半导体衬底11上，并在预定图形之后进行图案化，然后在薄膜14上沉积第一层间绝缘膜13.然后，在第一层间绝缘膜13，使得导电薄膜14的上表面露出，并且对形成在开口部15的底部的导电薄膜14进行稀化处理，然后进行氧化处理暴露的导电薄膜14的环绕部分。由此，在开口部分15的周围区域中形成可变电阻膜16，并且由于导电薄膜14被分为第一电极14a和第二电极14b 可变电阻膜16.版权所有（C）2009，JPO＆INPIT

32. 发明专利

JP2007294998A Variable resistive element and its manufacturing method 有权
标题翻译：可变电阻元件及其制造方法
公开(公告)号：JP2007294998A
公开(公告)日：2007-11-08
申请号：JP2007178478
申请日：2007-07-06
申请人： Sharp Corp , シャープ株式会社
发明人： HOSOI YASUNARI , ISHIHARA KAZUYA , SHIBUYA TAKAHIRO , ONISHI TETSUYA , NAKANO TAKASHI
IPC分类号： H01L27/10 , H01L45/00 , H01L49/00
摘要： PROBLEM TO BE SOLVED: To provide a variable resistive element having a structure in which an area of an electrically contributing region of a variable resistor is more minute than an area specified by an upper electrode, a lower electrode and the like, and to provide its manufacturing method. SOLUTION: On the upper part of the lower electrode 1 disposed on a base substrate 5, a bump electrode material 2 extending parallelly in the same direction as the lower electrode 1 is formed. The different surface of the bump electrode material 2 from the contacting surface with the lower electrode 1 contacts with the variable resistor 3. The different surface of the variable resistor 3 from the contacting surface with the bump electrode material 2 contacts with the upper electrode 4. Thereby, since the crosspoint of the bump electrode material 2 (variable resistor 3) and the upper electrode 4 becomes the electrically contributing region of the variable resistor, the area of the region is reduced more than areas of the regions of conventional variable resistive elements. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种可变电阻元件，其具有可变电阻器的电气区域的面积比由上电极，下电极等指定的面积更小的结构，以及提供其制造方法。解决方案：在设置在基底5上的下电极1的上部形成有与下电极1同向延伸的突起电极材料2。突起电极材料2与下电极1的接触面的不同表面与可变电阻3接触。可变电阻3与凸起电极材料2的接触面的不同表面与上电极4接触。因此，由于凸块电极材料2（可变电阻器3）和上部电极4的交叉点成为可变电阻器的电赋能区域，所以该区域的面积比常规可变电阻元件的区域的面积减小。版权所有（C）2008，JPO＆INPIT

33. 发明专利

JP2014150481A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2014150481A
公开(公告)日：2014-08-21
申请号：JP2013019278
申请日：2013-02-04
申请人： Sharp Corp , シャープ株式会社
发明人： ISHIHARA KAZUYA
IPC分类号： H03K19/00 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/04 , H01L27/08 , H01L27/088 , H01L27/092 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To achieve, by simple manufacturing processes, a semiconductor device which can perform power gating with a small area.SOLUTION: A semiconductor arithmetic device 1 comprises a power switch 7 for shutting down (power gating) the power supply to a logic circuit block in a standby state out of a plurality of logic circuit blocks 30. The power switch 7 includes a plurality of transistors 70 connected in parallel between a virtual ground line 6 and a ground voltage GND. The plurality of transistors 70 are formed on an upper surface of a semiconductor integrated circuit 80 where a plurality of the logic circuit blocks 30 are formed, and are composed of thin-film transistors in which an oxide semiconductor is used as a channel layer.
摘要翻译：要解决的问题：通过简单的制造工艺来实现能够以小面积进行电力门控的半导体器件。解决方案：半导体运算装置1包括用于将电源关闭（电源选通）的电源开关7 逻辑电路块在多个逻辑电路块30中处于待机状态。功率开关7包括并联连接在虚拟接地线6和接地电压GND之间的多个晶体管70。多个晶体管70形成在形成有多个逻辑电路块30的半导体集成电路80的上表面上，并且由使用氧化物半导体作为沟道层的薄膜晶体管构成。

34. 发明专利

JP2014130525A Tactile sense presentation device and tactile display device including the same 审中-公开
标题翻译：触觉显示装置和包括其的触觉显示装置
公开(公告)号：JP2014130525A
公开(公告)日：2014-07-10
申请号：JP2012288717
申请日：2012-12-28
申请人： Sharp Corp , シャープ株式会社
发明人： ISHIHARA KAZUYA
IPC分类号： G06F3/01 , G06F3/0488
摘要： PROBLEM TO BE SOLVED: To provide a tactile sense presentation device capable of driving at low power consumption a tactile sense presentation element that presents a tactile sense by an electric stimulus.SOLUTION: A tactile sense presentation device includes: a tactile sense presentation element (for example, a tactile sense presentation element including a counter electrode 25) that presents a tactile sense by an electric stimulus: and a driving unit that drives the tactile sense presentation element. The driving unit includes thin-film transistors (for example, a first thin-film transistor 23 and a second thin-film transistor 24) that use a metal oxide semiconductor.
摘要翻译：要解决的问题：提供一种能够以低功耗驾驶的触觉呈现装置，其通过电刺激呈现触觉的触觉呈现元件。解决方案：触觉呈现装置包括：触觉呈现元件（用于例如，包括通过电刺激呈现触觉的触觉感知呈现元件，包括对置电极25）以及驱动触敏感呈现元件的驱动单元。驱动单元包括使用金属氧化物半导体的薄膜晶体管（例如，第一薄膜晶体管23和第二薄膜晶体管24）。

35. 发明专利

JP2013084324A Semiconductor memory device and semiconductor device 有权
标题翻译：半导体存储器件和半导体器件
公开(公告)号：JP2013084324A
公开(公告)日：2013-05-09
申请号：JP2011223087
申请日：2011-10-07
申请人： Sharp Corp , シャープ株式会社 , Elpida Memory Inc , エルピーダメモリ株式会社
发明人： NAGURA MITSURU , AWAYA NOBUYOSHI , ISHIHARA KAZUYA , SEKO AKIYOSHI
IPC分类号： G11C13/00 , H01L27/10 , H01L27/105
CPC分类号： G11C13/0028 , G11C13/0002 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/79
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of performing each verify operation after two kinds of write operations having different voltage application polarities to a variable resistance element at low power consumption and high speed.SOLUTION: The semiconductor memory device comprises: a write circuit 22; and a read circuit 21. The write circuit 22 is configured to perform: a set operation of reducing electric resistance of the variable resistance element by causing current to flow from one end side of a memory cell to the other end side of the memory cell via the variable resistance element; and a reset operation of increasing the electric resistance of the variable resistance element by causing current to flow from the other end side of the memory cell to the one end side of the memory cell via the variable resistance element. The read circuit 21 is configured to perform: a first read operation of reading a resistance state of the variable resistance element by causing current to flow from one end side of the memory cell to the other end side of the memory cell via the variable resistance element; and a second read operation of reading a resistance state of the variable resistance element by causing current to flow from the other end side of the memory cell to the one end side of the memory cell via the variable resistance element.
摘要翻译：要解决的问题：提供一种能够以低功耗和高速度对具有不同电压施加极性的两种写入操作对可变电阻元件执行每个验证操作的半导体存储器件。解决方案：半导体存储器件包括：写入电路22; 写电路22构成为：通过使电流从存储单元的一端侧流向存储单元的另一端侧而使电流降低的可变电阻元件的电阻的设定动作可变电阻元件; 以及通过使电流从存储单元的另一端侧经由可变电阻元件流向存储单元的一端侧而增加可变电阻元件的电阻的复位动作。读取电路21被配置为执行：通过使电流从存储单元的一端侧经由可变电阻元件流过存储单元的另一端而读取可变电阻元件的电阻状态的第一读取操作 ; 以及第二读取操作，其通过使电流从存储单元的另一端侧经由可变电阻元件流向存储单元的一端侧来读取可变电阻元件的电阻状态。版权所有（C）2013，JPO＆INPIT

36. 发明专利

JP2012256392A Semiconductor storage device 有权
标题翻译：半导体存储设备
公开(公告)号：JP2012256392A
公开(公告)日：2012-12-27
申请号：JP2011128954
申请日：2011-06-09
申请人： Sharp Corp , シャープ株式会社
发明人： ONISHI JUNYA , AWAYA NOBUYOSHI , NAGURA MITSURU , ISHIHARA KAZUYA
IPC分类号： G11C29/42 , G06F12/16 , G11C13/00 , H01L27/10 , H01L27/105 , H01L45/00 , H01L49/00
CPC分类号： G06F11/1048 , G11C13/004 , G11C13/0061 , G11C2029/0411
摘要： PROBLEM TO BE SOLVED: To realize a semiconductor storage device excellent in long-term data retention characteristics capable of efficiently detecting and correcting an error of data during readout.SOLUTION: In a semiconductor storage device 1 in which a variable resistive element including a metal oxide is used for information storage, a voltage amplitude of rewriting voltage pulse to apply when transiting the variable resistive element to a high resistance state is set to be a voltage range having data retention characteristics in which a resistance value of high resistance state after a transition increases as time passes, specifically, the voltage range such that the resistance value of high resistance state after the transition increases toward a predetermined peak value as the voltage amplitude increases. Further, in the case where an error of data is detected by an ECC circuit 106, the data essentially in low resistance state is considered to have changed to high resistance state, and variable resistive elements of all memory cells having an error detected are rewritten into low resistance state to correct a bit having an error detected.
摘要翻译：解决的问题：实现能够有效地检测和校正读出期间的数据误差的长期数据保持特性优异的半导体存储装置。解决方案：在将包括金属氧化物的可变电阻元件用于信息存储的半导体存储器件1中，将可变电阻元件转变为高电阻状态时所施加的重写电压脉冲的电压幅度设定为是具有数据保持特性的电压范围，其中转变后的高电阻状态的电阻值随着时间的过去而增加，具体地说是电压范围，使得转变后的高电阻状态的电阻值向着预定的峰值增加，作为电压幅度增加。此外，在由ECC电路106检测到数据的错误的情况下，基本上处于低电阻状态的数据被认为已经变为高电阻状态，并且将具有检测到的错误的所有存储单元的可变电阻元件重写为低电阻状态来校正检测到错误的位。版权所有（C）2013，JPO＆INPIT

37. 发明专利

JP2012038408A Semiconductor storage device and its driving method 有权
标题翻译：半导体存储器件及其驱动方法
公开(公告)号：JP2012038408A
公开(公告)日：2012-02-23
申请号：JP2011078419
申请日：2011-03-31
申请人： Sharp Corp , シャープ株式会社
发明人： YAMAZAKI NOBUO , OTA YOSHIJI , ISHIHARA KAZUYA , NAGURA MITSURU , KAWABATA MASARU , AWAYA NOBUYOSHI
IPC分类号： G11C13/00
CPC分类号： G11C13/0007 , G11C7/1048 , G11C7/12 , G11C13/0004 , G11C13/0026 , G11C13/0038 , G11C13/0069 , G11C2013/0071 , G11C2213/79 , G11C2213/82
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor storage device capable of high-speed operation by solving the problem in which a short-time voltage pulse cannot be applied to a storage element from a common line side.SOLUTION: A semiconductor storage device 1 comprises a memory cell array 100 in which a plurality of memory cells including two-terminal storage elements and selection transistors connected in series are arranged in matrix, a first voltage application circuit 101 for applying a rewriting voltage pulse to a first bit line, and a second voltage application circuit 102 for applying a pre-charge voltage to a bit line and a common line. The memory cell is rewritten in a manner that, after both ends of the memory cell are pre-charged in advance by the second voltage application circuit 102 at the same voltage, the first voltage application circuit 101 applies via the bit line the rewriting voltage pulse to one end of the memory cell to be rewritten. During the application of the rewriting voltage pulse, the second voltage application circuit 102 keeps applying the pre-charge voltage to the other end of the memory cell via the common line CML.
摘要翻译：要解决的问题：提供一种能够通过解决从公共线路侧不能将短时电压脉冲施加到存储元件的问题来提供能够进行高速操作的半导体存储装置。解决方案：半导体存储装置1包括：存储单元阵列100，其中包括串联连接的两端存储元件和选择晶体管的多个存储单元排列成矩阵;第一电压施加电路101，用于施加重写电压脉冲到第一位线，以及第二电压施加电路102，用于将预充电电压施加到位线和公共线。以这样的方式重写存储器单元，即在相同电压下由第二电压施加电路102预先对存储单元的两端进行预充电之后，第一电压施加电路101经由位线施加重写电压脉冲到要重写的存储器单元的一端。在施加重写电压脉冲期间，第二电压施加电路102经由公共线CML继续将预充电电压施加到存储单元的另一端。版权所有（C）2012，JPO＆INPIT

38. 发明专利

JP2012033649A Nonvolatile semiconductor storage device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：JP2012033649A
公开(公告)日：2012-02-16
申请号：JP2010171079
申请日：2010-07-29
申请人： Sharp Corp , シャープ株式会社
发明人： ONISHI JUNYA , YAMAZAKI NOBUO , ISHIHARA KAZUYA , INOUE YUSHI , TAMAI YUKIO , AWAYA NOBUYOSHI
IPC分类号： H01L27/10 , H01L45/00 , H01L49/00
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/1233 , H01L45/146
摘要： PROBLEM TO BE SOLVED: To provide a variable resistive element which can stably perform switching operation owing to reduction in characteristic variation by inhibiting steep current associated with completion of forming processing and to provide a nonvolatile semiconductor storage device provided with the variable resistive element.SOLUTION: The nonvolatile semiconductor storage device uses a variable resistive element 2 sandwiching a resistance change layer 13 between a first electrode 12a and a second electrode 14 for storing information. The variable resistive element 2 includes a buffer layer 12b inserted between the first electrode 12a and the resistance change layer 13 at which a switching boundary surface is formed. The buffer layer 12b and the resistance change layer 13 both include n-type metal oxide. Materials of the buffer layer 12a and the resistance change layer 13 are selected such that energy of conduction band minimum of the n-type metal oxide included in the buffer layer 12b is lower than that of the n-type metal oxide included in the resistance change layer 13.
摘要翻译：要解决的问题：提供一种可变电阻元件，其可以通过抑制与形成处理完成相关的陡峭电流而由于特性变化的降低而稳定地执行开关操作，并且提供设置有可变电阻元件的非易失性半导体存储器件。解决方案：非易失性半导体存储装置使用在第一电极12a和第二电极14之间夹着电阻变化层13的可变电阻元件2用于存储信息。可变电阻元件2包括插入在第一电极12a和形成开关边界面的电阻变化层13之间的缓冲层12b。缓冲层12b和电阻变化层13都包括n型金属氧化物。选择缓冲层12a和电阻变化层13的材料，使得包括在缓冲层12b中的n型金属氧化物的最小导电能量比包含在电阻变化中的n型金属氧化物的能量低第13层。版权所有（C）2012，JPO＆INPIT

39. 发明专利

JP2010103555A Variable resistor element 有权
标题翻译：可变电阻元件
公开(公告)号：JP2010103555A
公开(公告)日：2010-05-06
申请号：JP2009296280
申请日：2009-12-25
申请人： National Institute Of Advanced Industrial Science & Technology , Sharp Corp , シャープ株式会社 , 独立行政法人産業技術総合研究所
发明人： TAMAI YUKIO , HOSOI YASUNARI , AWAYA NOBUYOSHI , ONISHI SHIGEO , ISHIHARA KAZUYA , SHIMA HISASHI , TAKANO FUMIYOSHI , AKINAGA HIROYUKI
IPC分类号： H01L49/00 , H01L27/10 , H01L45/00
摘要： PROBLEM TO BE SOLVED: To reduce a forming voltage applied to form a through-hole in a metal oxide material, without making the leakage current increase. SOLUTION: A variable resistor 1 includes an electrode 11, an electrode 12, and a metal oxide material disposed in between the electrode 11 and electrode 12, and the electrical resistance for the variable resistor 1 between the electrode 11 and the electrode 12 varies reversibly, according to the voltage applied between the electrode 11 and the electrode 12. The metal oxide material includes a resistor 14, which is separated from at least either of the electrode 11 and the electrode 12 and has resistance lower than resistance of the metal oxide material. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了降低施加在金属氧化物材料中形成通孔的成形电压，而不会使漏电流增加。解决方案：可变电阻器1包括设置在电极11和电极12之间的电极11，电极12和金属氧化物材料，以及电极11和电极12之间的可变电阻器1的电阻根据施加在电极11和电极12之间的电压可逆地变化。金属氧化物材料包括与电极11和电极12中的至少一个分离的电阻器14，并且具有低于金属电阻的电阻氧化物。版权所有（C）2010，JPO＆INPIT

40. 发明专利

JP2010009662A Nonvolatile semiconductor memory device and driving method therefor 有权
标题翻译：非易失性半导体存储器件及其驱动方法
公开(公告)号：JP2010009662A
公开(公告)日：2010-01-14
申请号：JP2008166406
申请日：2008-06-25
申请人： Sharp Corp , シャープ株式会社
发明人： YAMAZAKI NOBUO , AWAYA NOBUYOSHI , ISHIHARA KAZUYA , TABUCHI YOSHIAKI
IPC分类号： G11C13/00 , H01L27/10 , H01L45/00 , H01L49/00
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device which ensures stable rewrite operation by changing a resistance state for sure without enlarging a memory cell area and chip area. SOLUTION: In a variable resistance element 1, the resistance is reduced by applying voltage so that a current whose absolute value is Is or more flows from a terminal 1a to a terminal 1b, and the resistance is increased by applying voltage so that a current whose absolute value is Ir or more flows from a terminal 1b to a terminal 1a. When Ir COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种非易失性半导体存储器件，其通过改变电阻状态来确保稳定的重写操作，而不增大存储单元面积和芯片面积。解决方案：在可变电阻元件1中，通过施加电压来降低电阻，使得绝缘值为Is以上的电流从端子1a流到端子1b，并且通过施加电压来增加电阻，使得绝缘值为Ir或更大的电流从端子1b流到端子1a。当Ir

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