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21. 发明专利

JP2009239113A Package for optical semiconductor element 有权
标题翻译：光学半导体元件封装
公开(公告)号：JP2009239113A
公开(公告)日：2009-10-15
申请号：JP2008084837
申请日：2008-03-27
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： KIMURA YASUYUKI
IPC分类号： H01S5/022
CPC分类号： H01L23/055 , H01L23/10 , H01L2924/0002 , H01L2924/3011 , H01S5/02212 , H01S5/0425 , H01S5/06226 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a package for an optical semiconductor element allowing a lead pin to be airtightly sealed, and matching characteristic impedance to a specific value.
SOLUTION: In this package for an optical semiconductor element, a lead pin 12 is sealed in a sealing hole formed on a stem body 10 by sealing glass 13; and characteristic impedance in the glass sealing part of the lead pin 12 is adjusted to a specific value. The package is characterized in that the characteristic impedance Zo is set by expression: Zo=(138/Er
1/2 )×log(D/d), where a hole diameter of the sealing hole is denoted by D, a wire diameter of the lead pint is denoted by d, and a dielectric constant of the sealing glass 13 is denoted by Er, and the dielectric constant Er of the sealing glass is set by controlling an amount of bubble contained in the sealing glass 13.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于允许引脚被气密密封的光半导体元件的封装，并且将特性阻抗匹配到特定值。解决方案：在该光半导体元件用封装件中，通过密封玻璃13将引脚12密封在形成在茎体10上的密封孔中; 并且引线引脚12的玻璃密封部分中的特性阻抗被调节到特定值。封装的特征在于，特征阻抗Zo通过以下表达式来设置：Zo =（138 / Er 1/2 ）×log（D / d），其中表示密封孔的孔径由D表示，铅值的线径由d表示，密封玻璃13的介电常数用Er表示，密封玻璃的介电常数Er通过控制密封玻璃中所含的气泡量来设定玻璃13.版权所有（C）2010，JPO＆INPIT

22. 发明专利

JP2009026805A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009026805A
公开(公告)日：2009-02-05
申请号：JP2007185710
申请日：2007-07-17
申请人： Oki Electric Ind Co Ltd , Oki Semiconductor Miyazaki Co Ltd , Okiセミコンダクタ宮崎株式会社 , 沖電気工業株式会社
发明人： HASEGAWA HIDENORI
IPC分类号： H01L23/12
CPC分类号： H01L23/49827 , H01L21/481 , H01L21/561 , H01L23/055 , H01L23/49838 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/97 , H01L2224/16225 , H01L2224/16227 , H01L2224/451 , H01L2224/48227 , H01L2224/81191 , H01L2224/81801 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To easily manufacture a double-sided electrode package without performing complicated processing such as the spot facing of a package substrate and the laser processing of many through-holes. SOLUTION: A semiconductor chip 44 and a bump 68 are sealed with a sealing resin layer 50. The sealing resin layer 50 is formed by molding (metal molding) in such a manner that the resin layer covers the periphery of the semiconductor chip 44 and the resin layer has a plurality of through-holes 32 which penetrate the resin sealing layer 50 and reach wiring 20. A conductive material 34 fills each through-hole 32 to form a through electrode 36. One end of the through electrode 36 is exposed to the surface of the sealing resin layer 50 as an end face 36A. The other end of the through electrode 36 is electrically connected with the wiring 20. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了容易地制造双面电极封装而不进行诸如封装基板的光斑面的复杂处理以及许多通孔的激光加工。解决方案：半导体芯片44和凸块68用密封树脂层50密封。密封树脂层50通过模制（金属模制）形成，使得树脂层覆盖半导体芯片的周边 44，树脂层具有穿过树脂密封层50并到达布线20的多个通孔32.导电材料34填充每个通孔32以形成通孔36.贯通电极36的一端为暴露于作为端面36A的密封树脂层50的表面。通孔电极36的另一端与布线20电连接。版权所有（C）2009，JPO＆INPIT

23. 发明专利

JP2009016383A Packaged device, and method of manufacturing packaged device 审中-公开
标题翻译：包装装置，以及制造包装装置的方法
公开(公告)号：JP2009016383A
公开(公告)日：2009-01-22
申请号：JP2007173077
申请日：2007-06-29
申请人： Fujitsu Ltd , 富士通株式会社
发明人： MIZUNO YOSHIHIRO , KOMA NORINAO , OKUDA HISAO , SONETA HIROMITSU , MATSUMOTO TAKESHI , TSUBOI OSAMU
IPC分类号： H01L23/00 , H01L23/10
CPC分类号： H01L23/055 , B81B7/0038 , B81B2201/0235 , G01P1/023 , G01P15/0802 , H01L23/564 , H01L24/05 , H01L24/16 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/0401 , H01L2224/05554 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/484 , H01L2224/49175 , H01L2224/73257 , H01L2224/8192 , H01L2224/8592 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/10161 , H01L2924/1461 , H01L2924/15153 , H01L2924/15165 , H01L2924/16195 , H01L2924/06 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To provide a packaged device which suitably controls moisture in an internal space of a package, and to provide a method of manufacturing the same. SOLUTION: The packaged device X1 according to the present invention includes the package 20 having inner surfaces 21a and 22a defining the closed internal space 20a, a device chip 10 fixed to the package 20, and a parylene film 30 covering at least parts of the inner surfaces 21a and 22a of the package 20 and/or at least a part of a surface of the device chip 10. The method of manufacturing the packaged device according to the present invention includes a process of mounting the device chip 10 on a package body 21 provided with an electrode pad 23, a stage of electrically connecting the device chip 10 and the electrode pad 23 by a wiring component 26, a process of vapor-depositing parylene 30 in a recessed portion 20a' of the package body 21, and a process of joining a lid body 22 for closing the recessed portion 20a' and the package body 21 together. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供适当地控制包装内部空间中的水分的包装装置，并提供其制造方法。解决方案：根据本发明的封装装置X1包括具有限定封闭内部空间20a的内表面21a和22a的封装20，固定到封装20的器件芯片10和覆盖至少部分的聚对二甲苯膜30 封装20的内表面21a和22a和/或器件芯片10的表面的至少一部分。根据本发明的封装器件的制造方法包括将器件芯片10安装在设置有电极焊盘23的封装体21，通过布线部件26电连接器件芯片10和电极焊盘23的阶段，在封装主体21的凹部20a'中蒸镀聚对二甲苯30的工序，以及将用于将凹部20a'和封装主体21封闭在一起的盖体22的工序。版权所有（C）2009，JPO＆INPIT

24. 发明专利

JP2009010261A Semiconductor package and manufacturing method thereof 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：JP2009010261A
公开(公告)日：2009-01-15
申请号：JP2007171915
申请日：2007-06-29
申请人： Fujikura Ltd , 株式会社フジクラ
发明人： SUDO YUUKI
IPC分类号： H01L23/12 , H01L27/14
CPC分类号： H01L31/0203 , H01L23/055 , H01L23/16 , H01L23/49816 , H01L23/5389 , H01L24/18 , H01L24/82 , H01L24/97 , H01L27/14618 , H01L27/14621 , H01L27/14683 , H01L2224/18 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0106 , H01L2924/01073 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/10329 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/181 , H01L2924/3025 , H01L2224/82 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor package and a manufacturing method thereof such that peeling of a filter due to chipping in a dicing step can be suppressed. SOLUTION: The semiconductor package includes at least: a semiconductor substrate having a semiconductor device arranged over one surface; a cap substrate disposed opposite to the semiconductor substrate through a gap with the one surface of the semiconductor substrate; and a spacer projected on the surface of the cap substrate opposite to the semiconductor substrate to bond the cap substrate and semiconductor substrate together, wherein a filter is arranged on the cap substrate to superpose the semiconductor device, but does not superpose the spacer. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体封装及其制造方法，可以抑制由于在切割步骤中的切屑而导致的过滤器的剥离。解决方案：半导体封装至少包括：具有布置在一个表面上的半导体器件的半导体衬底; 帽衬底，其通过与所述半导体衬底的所述一个表面的间隙与所述半导体衬底相对设置; 以及间隔物，其突出在与半导体衬底相对的盖衬底的表面上，以将盖衬底和半导体衬底接合在一起，其中，过滤器布置在盖衬底上以叠置半导体器件，但不叠置间隔件。版权所有（C）2009，JPO＆INPIT

26. 发明专利

JPWO2006126441A1 電子部品用パッケージ、このパッケージを使用した電子部品、および電子部品用パッケージの製造方法有权
公开(公告)号：JPWO2006126441A1
公开(公告)日：2008-12-25
申请号：JP2007517790
申请日：2006-05-18
申请人：株式会社村田製作所
发明人：北村　誠 , 誠北村 , 甲斐下　仁平 , 仁平甲斐下 , 武田　健 , 健武田
IPC分类号： H05K9/00
CPC分类号： H05K5/0095 , H01L23/055 , H01L23/49861 , H01L23/552 , H01L2924/0002 , H01L2924/16195 , H01L2924/00
摘要：シールド性に優れ、かつ内蔵部品とのショートの解消を目的としたもので、金属板により有底形状に形成され、その底部に貫通穴(13)が形成されたシールドケース(10)と、シールドケース(10)の内面及び外面にモールドされた有底形状の樹脂ケース(2)と、貫通穴(13)を介してシールドケース(10)内に非接触で挿入され、一端部(21)が樹脂ケース(2)の内面に露出し、他端部(22)が樹脂ケース(2)の外面に露出するように、樹脂ケース(2)内にインサートモールドされたホット端子(20)とを備える電子部品用パッケージ(1)である。

27. 发明专利

JP2008227233A Semiconductor device and manufacturing method thereof, and optical pickup module 审中-公开
标题翻译：半导体器件及其制造方法和光学拾取模块
公开(公告)号：JP2008227233A
公开(公告)日：2008-09-25
申请号：JP2007064827
申请日：2007-03-14
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KOYASHIKI JUNYA , MORIBE SHOZO , UDATSU HIROKI , YOSHIKAWA NORIYUKI , FUKUDA TOSHIYUKI , NANO MASANORI , ISHIDA HIROYUKI
IPC分类号： H01L23/12 , G11B7/13 , G11B7/135 , G11B7/22 , H01L31/02 , H01S5/022
CPC分类号： G11B7/1275 , H01L21/4803 , H01L23/055 , H01L23/24 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L27/14618 , H01L27/14687 , H01L2224/05553 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/10161 , H01L2924/12041 , H01L2924/12043 , H01L2924/14 , H01L2924/1461 , H01L2924/181 , H01L2924/3025 , H01L2224/83 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/32245 , H01L2224/48247
摘要： PROBLEM TO BE SOLVED: To provide a method of efficiently manufacturing a semiconductor device capable of miniaturizing an entire size and especially capable of reducing the length of a pair of opposing sides in four sides of a nearly rectangular package. SOLUTION: A plurality of rib precursors 80 are installed in parallel on a flat baseplate 61. A plurality of semiconductor elements 10 are mounted in a groove 55 between the adjacent rib precursors 80, and a transparent member 94 is laminated on the semiconductor elements 10. An electrode pad 20 and a connection electrode 75 in the semiconductor elements 10 are bonded by a wire and a sealing resin 96 is filled into the groove 55. Then, the center in the longitudinal direction of the rib precursors 80 is cut by a dicing saw 40, and further an area between the adjacent semiconductor elements 10 is cut, thus completing the semiconductor device 1. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种有效地制造半导体器件的方法，该半导体器件能够使整体尺寸小型化，特别是能够减小近似矩形封装的四边中的一对相对侧的长度。解决方案：多个肋前体80平行安装在平坦的基板61上。多个半导体元件10安装在相邻肋前体80之间的凹槽55中，并且透明构件94层压在半导体半导体元件10中的电极焊盘20和连接电极75通过导线接合，密封树脂96填充到槽55中。然后，肋前体80的纵向方向上的中心被切割锯40，并且进一步切割相邻半导体元件10之间的区域，从而完成半导体器件1.版权所有（C）2008，JPO＆INPIT

30. 发明专利

JP2007042741A Structure for mounting electronic component and manufacturing method thereof 有权
标题翻译：安装电子元件的结构及其制造方法
公开(公告)号：JP2007042741A
公开(公告)日：2007-02-15
申请号：JP2005222973
申请日：2005-08-01
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： HARUHARA MASAHIRO , AZUMA MITSUTOSHI , SHIRAISHI AKINORI
IPC分类号： B81C99/00 , H01L23/10 , B81C3/00 , H01L21/3205 , H01L23/52 , H01L27/14
CPC分类号： B81C1/00301 , B81B2207/096 , B81C2203/0109 , H01L23/055 , H01L23/147 , H01L27/14618 , H01L2224/16225 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15311 , H01L2924/157 , H01L2924/16251 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a structure for mounting an electronic component by which a sealing cap can be provided on a silicon substrate (interposer) provided with a through electrode in high reliability.
SOLUTION: An electronic component 40 is mounted or formed on a silicon substrate 1 having a structure where wiring layers 32 and 26 on both surface sides are interconnected with each other by means of the through electrode 16, and an annular projecting joint 50b made of glass and the projecting joint 50b of a sealing cap 50x wherein a cavity 50a is formed thereby are anode-bonded with the joint 10b of the silicon circuit substrate 1. Thus, the electronic component 40 is hermetically sealed within the cavity 50a of the sealing cap 50x.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于安装电子部件的结构，通过该电子部件可以以高可靠性在设置有通孔的硅基板（插入件）上设置密封盖。解决方案：电子部件40安装或形成在具有通过贯通电极16彼此互连的两个表面侧的布线层32和26的结构的硅基板1上，并且环形突出接头50b 由玻璃制成的密封帽50x的突出接头50b，其中形成有空腔50a，由此与硅电路基板1的接头10b进行阳极接合。因此，将电子部件40气密地密封在密封帽50x。版权所有（C）2007，JPO＆INPIT

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