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21. 发明专利

JPS6310604B2 失效
公开(公告)号：JPS6310604B2
公开(公告)日：1988-03-08
申请号：JP18087081
申请日：1981-11-10
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MURAKAMI OONORI , OZASA MASAYUKI
IPC分类号： H03D1/06 , H03D1/18

22. 发明专利

JP2008011051A Differential operational amplifier 审中-公开
标题翻译：差分运算放大器
公开(公告)号：JP2008011051A
公开(公告)日：2008-01-17
申请号：JP2006178186
申请日：2006-06-28
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OZASA MASAYUKI , SORAMOTO TAKAO , YOKOYAMA AKIO
IPC分类号： H03F1/02 , H03F1/32 , H03F3/45 , H03F3/68
摘要： PROBLEM TO BE SOLVED: To provide a differential operational amplifier capable of sufficiently supplying a current to a load in a dynamic operation, decreasing the power consumption in a static operation, reducing the offset, and reducing the distortion.
SOLUTION: The differential operational amplifier is provided with: output transistors 50, 60 of a positive polarity side whose control terminals respectively receive one output signal from a differential transistor pair 10 via a current voltage conversion circuit 20 of a positive polarity side, and output transistors 70, 80 of a negative polarity side whose control terminals respectively receive the other output signal from the differential transistor pair 10 via a current voltage conversion circuit 30 of a negative polarity side. The output transistors 50, 70 are operated in a class A amplification operation region and the output transistors 70, 80 are operated in a class B amplification operation region.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在动态操作中向负载充分供应电流的差分运算放大器，降低静态操作中的功耗，减少偏移并减少失真。解决方案：差分运算放大器具有：正极侧的输出晶体管50,60，其控制端分别经由正极侧的电流电压转换电路20从差分晶体管对10接收一个输出信号，以及负极侧的输出晶体管70,80，其控制端子经由负极侧的电流电压转换电路30分别从差分晶体管对10接收另一输出信号。输出晶体管50,70在A类放大操作区域中工作，并且输出晶体管70,80在B类放大操作区域中操作。版权所有（C）2008，JPO＆INPIT

23. 发明专利

JP2007088751A Receiving system 有权
标题翻译：接收系统
公开(公告)号：JP2007088751A
公开(公告)日：2007-04-05
申请号：JP2005274308
申请日：2005-09-21
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OKUBO MANABU , YOKOYAMA AKIO , OZASA MASAYUKI , SORAMOTO TAKAO
IPC分类号： H04B1/26 , H03D7/18
摘要： PROBLEM TO BE SOLVED: To reduce power consumption by making a receiving system after a level shifter operate at a low power source voltage. SOLUTION: The receiving system places the level shifter 60 between an image rejection mixer 15 and a channel selection filter 17. A power supply voltage of a circuit in the rear stage of the level shifter 60 is made lower than a power supply voltage of a circuit at the front stage of the level shifter 60. An RF filter 11, an RF amplifier 20, and the image rejection mixer 15 are located in the front stage of the output unit of the level shifter 60, a channel selection filter 71 composed of a switched capacitor filter, an IF amplifier 81, and an IF detector 91 are located in the rear stage of the output part of the level shifter 60. Since the front stage of the level filter 60 and the rear stage of it are separately formed into integrated circuits, different power supply voltages are given. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过在电平转换器在低电源电压下操作之后使接收系统降低功耗。解决方案：接收系统将电平移位器60放置在镜像抑制混频器15和频道选择滤波器17之间。使电平移位器60后级电路的电源电压低于电源电压电平移位器60的前级的电路。RF滤波器11，RF放大器20和镜像抑制混频器15位于电平移位器60的输出单元的前级，频道选择滤波器71 由开关电容滤波器，IF放大器81和IF检测器91组成，位于电平移位器60的输出部分的后级中。由于电平滤波器60的前级及其后级分开形成集成电路，给出不同的电源电压。版权所有（C）2007，JPO＆INPIT

24. 发明专利

JP2006319398A Receiver and receiving method 有权
标题翻译：接收和接收方法
公开(公告)号：JP2006319398A
公开(公告)日：2006-11-24
申请号：JP2005137034
申请日：2005-05-10
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SORAMOTO TAKAO , OKUBO MANABU , YOKOYAMA AKIO , OZASA MASAYUKI
IPC分类号： H04B1/26 , H03H11/16 , H03H11/22
CPC分类号： H03H2007/0192
摘要： PROBLEM TO BE SOLVED: To provide a receiver in which a time discrete band filter can be integrated at a low cost and with high performance and a polyphase filter can correspond to various frequency bands, and a receiving method thereof. SOLUTION: The receiver is provided with frequency converters 1, 2 for receiving an RF signal and a first reference signal and outputting a polyphase intermediate frequency signal; a filter 4 for receiving the intermediate frequency signal and eliminating an image to output the input signal; a variable frequency divider 6 for receiving a second reference signal and varying a division ratio in accordance with the frequency band to output the reference signal; a tuning circuit 5 for adjusting the frequency characteristic of the filter 4 on the basis of the output signal of the variable frequency divider 6; and a filter 7 for setting a bandwidth on the basis of an output signal of the variable frequency divider 6 and selecting a desired signal from among the intermediate frequency signal whose image is eliminated. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种接收机，其中时间离散带滤波器可以低成本并且具有高性能并且多相滤波器可以对应于各种频带，及其接收方法。解决方案：接收机设置有用于接收RF信号和第一参考信号并输出多相中频信号的频率转换器1,2; 滤波器4，用于接收中频信号并消除图像以输出输入信号; 可变分频器6，用于接收第二参考信号并根据频带改变分频比以输出参考信号; 调谐电路5，用于根据可变分频器6的输出信号调整滤波器4的频率特性; 以及滤波器7，用于根据可变分频器6的输出信号设置带宽，并从去除了图像的中频信号中选择所需的信号。版权所有（C）2007，JPO＆INPIT

25. 发明专利

JP2005252932A Current mirror circuit 审中-公开
标题翻译：当前镜像电路
公开(公告)号：JP2005252932A
公开(公告)日：2005-09-15
申请号：JP2004063543
申请日：2004-03-08
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MIZUNO HARUHIKO , OZASA MASAYUKI , ENOMOTO YASUHIRO
IPC分类号： H03F3/343 , H03F1/26
摘要： PROBLEM TO BE SOLVED: To provide a circuit which switches at a high speed when eliminating high-frequency noise by a target cut-off frequency, and when passing through a low-pass filter in a current mirror circuit. SOLUTION: The low pass filter comprising resistors and capacitors, is connected via a voltage follower between control electrodes of an input transistor and an output transistor which comprise the current mirror, and a switch composed of transistors for selecting the case to by-pass the low-pass filter and the case to pass through the low-pass filter. By this means, it is possible to constitute the low pass filter which is not influenced by the input load, and also it is possible to switch in high speed the case for eliminating high-frequency noise by means of the low-pass filter and the case for by-passing the low-pass filter. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种在以目标截止频率消除高频噪声时以及当通过电流镜电路中的低通滤波器时以高速切换的电路。解决方案：包括电阻器和电容器的低通滤波器通过电压跟随器在输入晶体管的控制电极和包括电流镜的输出晶体管之间连接，以及由用于选择外壳的晶体管组成的开关，通过低通滤波器和通过低通滤波器的情况。通过这种方式，可以构成不受输入负载影响的低通滤波器，并且还可以通过低通滤波器高速切换用于消除高频噪声的情况，并且用于旁路低通滤波器的情况。版权所有（C）2005，JPO＆NCIPI

26. 发明专利

JP2003223796A SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
公开(公告)号：JP2003223796A
公开(公告)日：2003-08-08
申请号：JP2002016804
申请日：2002-01-25
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KURIMOTO HIDEHIKO , OZASA MASAYUKI , OKAMOTO TATSUSHIZU , MICHIMASA SHIRO , YANAGISAWA NAOSHI
IPC分类号： G11C27/00 , H03K5/14
摘要： PROBLEM TO BE SOLVED: To automatically select only one memory cell and switch to a normal operation even if a vertical line or a horizontal line of an analog memory is not selected at power up time or other unexpected occurrences, and no memory cell to be selected remains. SOLUTION: When a memory horizontal selection circuit 6 does not generate a selection pulse of a horizontal line at a first row, a memory horizontal selection pulse disappearance detection circuit 23 detects the disappearance of the selection pulse, generates a forced reset pulse and resets the memory horizontal selection circuit 6, and generates the selection pulse of the horizontal line at the first row. Similarly, a memory vertical selection circuit 5 does not generate a selection pulse of a vertical line at the first row, a memory vertical selection pulse disappearance detection circuit 22 detects the disappearance of the selection pulse, generates a forced reset pulse and resets the memory vertical selection circuit 5, and generates the selection pulse of the vertical line at the first row. Consequently, even at the time of abnormity when any memory cell to be selected does'nt exist, transition to the normal operation can be achieved. COPYRIGHT: (C)2003,JPO

27. 发明专利

JP2003077135A Rf signal amplitude controller for optical disk 审中-公开
标题翻译：射频信号放大控制器用于光盘
公开(公告)号：JP2003077135A
公开(公告)日：2003-03-14
申请号：JP2001263184
申请日：2001-08-31
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： FUKUDA KOICHI , HASHIMOTO TAKAO , OZASA MASAYUKI
IPC分类号： G11B20/10 , G11B7/005
摘要： PROBLEM TO BE SOLVED: To stably and accurately output an RF signal amplitude even at multiple speed reproduction.
SOLUTION: The RF signals obtained from a quadripartite photodetector 11 converging a reflected light from a laser emitted to an optical disk medium are added and amplified after the current-voltage conversion, and the amplified signals are logically added after binarized by comparators 15a, 15b having both positive and negative polarities, then the logically added signals are amplified by two amplifiers 17a, 17b having the relation of gain ratio 10:1. An output signal of the amplifier 17a is integrated, and also an output signal of the amplifier 17b is inverted and integrated, and from these output voltages, a difference voltage is obtained by a voltage-current converter 19 and converted further into the current. By adopting such a constitution, the generation of an accurate error signal of RF amplitude becomes possible, then such a RF signal amplitude controller is obtained that the stable RF amplitude is controllable at multiple speed reproduction such as 16-fold speed or faster.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：甚至即使在多重速再现时也能稳定且精确地输出RF信号幅度。解决方案：将来自发射到光盘介质的激光的反射光会聚的四方光电检测器11获得的RF信号在电流 - 电压转换之后被相加和放大，并且放大的信号在二进制化后被比较器15a，15b 正极性和负极性两者之间，则由具有增益比10:1的关系的两个放大器17a，17b放大逻辑相加信号。放大器17a的输出信号被积分，并且放大器17b的输出信号也被反相和积分，并且从这些输出电压，通过电压 - 电流转换器19获得差分电压并进一步转换为电流。通过采用这样的结构，可以产生RF振幅的精确误差信号，得到这样的RF信号幅度控制器，即稳定的RF幅度可以在16倍速度或更快的多速再现中被控制。

28. 发明专利

JP2002314384A HYSTERESIS COMPARATOR 失效
公开(公告)号：JP2002314384A
公开(公告)日：2002-10-25
申请号：JP2001114024
申请日：2001-04-12
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OZASA MASAYUKI , FUKAMIZU SHINGO
IPC分类号： G01R19/165 , H03K5/08
摘要： PROBLEM TO BE SOLVED: To suppress delay time due to hysteresis small by making a hysteresis voltage width narrow and also to perform fast operation. SOLUTION: A first voltage follower circuit for inputting voltage of a signal source 2, a second voltage follower circuit for inputting a reference voltage of a reference voltage source 1, a comparator 22 for comparing the respective output voltages with each other of the first and second voltage follower circuits, a current source 7 for changing current quantity caused to flow to the first and second voltage follower circuits, and a switch 21 for controlling current of the current source 7 according to the output results of the comparator 22 are provided, the hysteresis voltage width is narrowly set to suppress the delay time small due to the hysteresis, and a fast operation can be performed.

29. 发明专利

JP2001313561A LEVEL SHIFT CIRCUIT 失效
公开(公告)号：JP2001313561A
公开(公告)日：2001-11-09
申请号：JP2000132561
申请日：2000-05-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OZASA MASAYUKI , FUKAMIZU SHINGO
IPC分类号： H03K19/0185 , H03K19/0175
摘要： PROBLEM TO BE SOLVED: To shift both a high logic level and a low logic level at high-speed. SOLUTION: The level shift circuit is provided with a p-channel MOS transistor(TR) M1 1 that configures a current source, n-channel MOS TRs M13, M14 that configure a current mirror, a p-channel MOS TR M12 for logical input and p-channel MOS TRs M15, M16 acting like a voltage limiter to limit the output voltage.

30. 发明专利

JPH11205814A COMB FILTER DEVICE 失效
公开(公告)号：JPH11205814A
公开(公告)日：1999-07-30
申请号：JP301798
申请日：1998-01-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OKAMOTO RIYUUCHIN , TAMAGAWA NOBUYUKI , KURIMOTO HIDEHIKO , OZASA MASAYUKI , MICHIMASA SHIRO
IPC分类号： H04N9/78 , H03H17/02
摘要： PROBLEM TO BE SOLVED: To obtain a satisfactory comb characteristic, even if an offset voltage is generated between delay circuits and to easily make LSI by controlling the offset voltage of a second delay amplifier with a recorder output and controlling the gain of a variable gain amplifier with a detector output. SOLUTION: A circuit in which the input of a switch 4 is set to the reference signal of an amplitude level, capable of realizing a desired comb characteristic during a blanking period, then the offset voltage difference between first and second delay circuits 8 and 9 is recorded in a recorder 17 and which negatively feeds back to the second delay amplifier 14 is provided and the offset voltage difference of the first and second delay circuits 8 and 9 is corrected. A circuit, in which the input of the switch 4 is charged over to the test signal which is able to realize the desired comb characteristic, a detector X19 amplifies/integrates the signal amplitude level of the output of a subtracter 15, so that it is matched with the reference signal and which negatively feeds back to a variable gain amplifier 10 is provided and the gain difference of the first and second delay circuits 8 and 9 is suppressed. When finally the input of the switch 4 is changed over to a video signal, since a gain difference does not exist between the delay circuits, a satisfactory comb characteristic can be obtained.

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