专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明专利

JPS6031257A SEMICONDUCTOR RECTIFYING DEVICE 失效
公开(公告)号：JPS6031257A
公开(公告)日：1985-02-18
申请号：JP13944483
申请日：1983-08-01
申请人： HITACHI LTD
发明人： GOTOU FUMIO , MISAWA MICHIHIRO , AOKI SHIGERU
IPC分类号： H01L25/07 , H01L23/538
摘要： PURPOSE:To contrive to improve the reliability by fixing diode pellets to AC phase or DC output conductors fixed on an insulation board. CONSTITUTION:The insulation board 3 is fixed on a heat dissipating plate 1 via solder, and the AC phase conductors 5a-5c and the DC output conductors 6c and 6b are fixed on the board 3 via solder. The diode pellets 7a-7c are fixed to the conductors 5a-5c with solder, respectively, and the diode pellets 7d-7f to the conductor 6b with solder. The diode pellets 7a-7c are regarded as the cathode side in the sides of the conductors 5a-5c, and the anode side is connected to the conductor 6a by means of the conductor 9a. The diode pellets 7d- 7f are regarded as the cathode side in the side of the conductor 6b, and the anode sides are connected to the conductors 5a-5c via the conductors 9b-9d, respectively.

22. 发明专利

JPS5885537A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5885537A
公开(公告)日：1983-05-21
申请号：JP18383681
申请日：1981-11-18
申请人： HITACHI LTD
发明人： ISOMAE SEIICHI , AOKI SHIGERU , TAMAOKI YOUICHI , ISHIKAWA MICHIO
IPC分类号： H01L21/322
摘要： PURPOSE:To reduce the number of lattice defects generating in the vicinity of the surface by a method wherein a Si3N4 film is coated on the desired portions of a wafer and it undergoes heat treatment so as to getter impurities. CONSTITUTION:A Si3N4 film is coated on the surface of a silicon wafer to form a Si3N4 film pattern 1 on a wafer 10. With no Si3N4 being coated, a high- density defective layer 3 is formed within the wafer 10 and a nondefective layer 2 is formed all over the surface. Meanwhile, with the Si3N4 film pattern 1 being coated, a high-density defective region 4 is formed blow the patten 1 with IG (intrinsic gettering) heat treatment and, hence, the nondefective region 2 is formed in only the limited areas. It is expected, therefore, that gettering is effected in not only the defective layer 3 within the wafer but also the near- surface layer 4. Also, since the element forming region 2 is surrounded by the defective layer 4 having a short life time, the region 2 is completely shut off from other element forming regions electrically.

23. 发明专利

JPS54110783A SEMICONDUCTOR SUBSTRATE AND ITS MANUFACTURE 失效
公开(公告)号：JPS54110783A
公开(公告)日：1979-08-30
申请号：JP1826078
申请日：1978-02-20
申请人： HITACHI LTD
发明人： TAKANO YUKIO , KOGIRIMA MASAHIKO , AOKI SHIGERU , MAKI MICHIYOSHI , KATOU SHIGEO
IPC分类号： H01L21/205 , H01L21/30 , H01L21/304 , H01L21/322
摘要： PURPOSE:To obtain a substrate featuring the reduced crystalline defects by giving the mechanical grinding to the back of the Si substrate before the mechanical/ chemical mirror surface polishing to form the working distortion and then giving the chemical etching to form the heat oxide film on the back of the substrate respectively. CONSTITUTION:First, the working distortion layer is formed via the grindstone to the water. The depth of the distortion increases as the size of the abrasive grain increases, and the depth on the (111) surface features about 0.8 times as much as that on the (100) surface. If the heat treatment is applied immediately, the displacement is caused at the distortion layer. And the depth of the displacement increases suddenly at 15mum or more of the distortion layer, giving the evil effect to the characteristics. While a large curving is produced when the grinding is given only to one surface of the wafer, resulting to the crack occurrence at the mirror surface working time as well as to the uneven thickness. When the distortion layer is etched off about 0.5mum with the 1000 deg.C heat treatment applied, the curvature can be reduced down almost to zero. Thus, a flat substrate can be obtained with the reduced crystalline defects.

24. 发明专利

JPS52152171A WAFER ALIGNMENT METHOD 失效
公开(公告)号：JPS52152171A
公开(公告)日：1977-12-17
申请号：JP6881676
申请日：1976-06-14
申请人： HITACHI LTD
发明人： KISHINO SEIGOU , AOKI SHIGERU , MAKI MICHIYOSHI , HONMA KOUJI , UEHARA KEIJIROU
IPC分类号： H01L21/027 , H01L21/302
摘要： PURPOSE:To improve the contrast of moire patterns and perform mask alignment effectively by providing straight line or curve groups of effective widths on a wafer and photo mask.

25. 发明专利

JPS52135682A PRODUCTION OF SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPS52135682A
公开(公告)日：1977-11-12
申请号：JP5223676
申请日：1976-05-10
申请人： HITACHI LTD
发明人： MORIYAMA KOUICHI , YAMAMOTO TOSHITAKA , AOKI SHIGERU
IPC分类号： H01L21/66
摘要： PURPOSE:To improve assembly yield and stabilize quality by early identifying passivation defect owing to the occurrence of cracking in glass, insufficient pretreatment or surface contamination in the production of process of semiconductor elements.

26. 发明专利

JPH03266465A SOLID-STATE IMAGE SENSING DEVICE 失效
公开(公告)号：JPH03266465A
公开(公告)日：1991-11-27
申请号：JP6417090
申请日：1990-03-16
申请人： HITACHI LTD
发明人： NAKAI MASAAKI , SATO AKIRA , AOKI SHIGERU , KONAME KANJI , OYU SHIZUNORI , HIRAIWA ATSUSHI
IPC分类号： H01L27/148 , H04N5/335 , H04N5/359 , H04N5/365 , H04N5/367 , H04N5/369 , H04N5/372 , H04N5/374
摘要： PURPOSE:To suppress crystal defects caused by contaminants by a method wherein a crystal defect layer of high density is positively formed inside an overflow drain. CONSTITUTION:A P-type well layer 22 is formed on an N-type Si substrate 21, a P -type double well and an N-type diffusion layer are selectively formed on a vertical CCD channel section, a first gate oxide film 31 is deposited on the surface, a photoresist 33 is formed on a region other than an overflow drain region 32, As or F ions are implanted into the region 32 using the photoresist 33 as a mask to form an impurity layer 34. In succession, the gate oxide film 31 in the region 32 is removed, the photoresist 33 is removed, polycrystalline poly-Si 2 and 27 serving as a first gate electrode are selectively built, a second gate 28 and a third gate 29 are formed to finish the formation of an element, and an overflow drain 26 is formed through diffusion of impurities from the first poly-Si. A crystal defect layer 30 of high density grown from the damaged layer 34 in an oxidation process is formed inside the overflow drain region. By this setup, crystal defects can be prevented.

27. 发明专利

JPH02260428A SEMICONDUCTOR SUBSTRATE AND DEVICE 失效
公开(公告)号：JPH02260428A
公开(公告)日：1990-10-23
申请号：JP7823089
申请日：1989-03-31
申请人： HITACHI LTD
发明人： HORIUCHI KATSUTADA , AOKI SHIGERU
IPC分类号： H01L21/322 , H01L21/02 , H01L27/12
摘要： PURPOSE:To realize a high performance of a semiconductor device by a method wherein, when a first semiconductor substrate and a second semiconductor substrate are pasted, a region which captures impurity atoms deteriorating an element characteristic is formed in a region to be pasted. CONSTITUTION:Before an Si film 2 acting as a region to capture contamination impurities is deposited, a silicon thermal oxide film 4 is formed. When the silicon oxide film 4 having a large difference in a coefficient of thermal expansion is adjacent to the region 2 used to capture the contamination impurities, a large stress is generated in the Si film during a cooling process at a heat treatment and it is possible to prevent the captured impurities from being liberated from the SiO2 film 2. Thereby, a gettering effect can be enhanced and a performance of a semiconductor device can be made high.

28. 发明专利

JPS57199227A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS57199227A
公开(公告)日：1982-12-07
申请号：JP8434481
申请日：1981-06-03
申请人： HITACHI LTD
发明人： AOKI SHIGERU , ISOMAE SEIICHI , WATANABE KIKUO
IPC分类号： H01L21/322 , H01L21/316 , H01L21/324
摘要： PURPOSE:To protect a wafer surface by an oxide film and avoid cntamination and roughness effectively and give the getter effect securely by annealing the wafer in an oxidizing atmosphere before it is annealed in a non-oxidizing atmosphere and at high temperature. CONSTITUTION:An oxide film is formed on an Si wafer surface by subjecting the Si wafer to the thermal treatment in an oxidizing atmosphere. Then the oxygen in the Si wafer is diffused to the outward by subjecting the Si wafer to the thermal treatment in a non-oxidizing atmosphere at approximately 900- 1,200 deg.C. Then a fine defect is formed in the Si wafer by subjecting the Si wafer to the thermal treatment in an oxidizing or non-oxidizing atmosphere at approximately 600-800 deg.C.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式