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    • 17. 发明专利
    • ECHO CANCELLER
    • JPS62203432A
    • 1987-09-08
    • JP4521886
    • 1986-03-04
    • TOSHIBA CORP
    • MINAMI SHIGENOBU
    • H04B3/20H03H21/00H04B3/23H04S5/00
    • PURPOSE:To attain the echo canceller for pseudo stereo sound at low cost by applying arithmetic to an estimated tap coefficient in added information different in the part, at the time of added information is changed so as to set initially a tap coefficient against a variation in an echo line. CONSTITUTION:When the location of a caller changes, since the deterioration in the cancelling quantity is caused, the relation of characteristic between three consecutive blocks viewing an echo path from the echo canceller is obtained and in using the relation, when the caller location is changed, the estimated tap coefficient at the past location of the caller is used to apply initial set to the taps coefficient. Through the operation above, the continuity of the estimated tap coefficient when the location of caller changes to prevent the deterioration in the cancelling quantity. A memory 110 stores the past taps coefficient for this processing, and a tap coefficient setting section, when the added information changes, uses the present tap coefficient and the tap coefficient in a memory to calculate a new tape coefficient thereby applying initial reset to an adaptive filter 108.
    • 20. 发明专利
    • Echo cancelling device
    • ECHO取消设备
    • JPS59167131A
    • 1984-09-20
    • JP4073783
    • 1983-03-14
    • Toshiba Corp
    • MINAMI SHIGENOBU
    • H04B7/015H04B3/23
    • H04B3/234
    • PURPOSE:To improve the echo cancelling capacity overall to improve the service quality by providing a detecting circuit which detects whether signals other than an echo signal are added to a receiving signal or not and using an estimated echo path of a register instead of a current estimated echo path when they are detected. CONSTITUTION:An estimated echo path delay circuit HSFT 404 is provided for attaining an estimated echo path (k-T'+1) of T'-number of samples ago and consists of a shift register to which an estimated echo path HI(K) from an EST 403 is inputted and has individual elements hi(k) (i=1-N) shifted by T'-number of samples to output hi(k- T'+1). At a time other than a simultaneous call time, a switch 505 selects a terminal B by a signal from a control circuit 504, and HI(k+1) corrected by it is loaded to an H register 501 instead of HI(k). Consequently, an ordinary echo path estimating operation is performed at this time. When a simultaneous call is detected, the control circuit 504 instructs the switch 505 to select a terminal C, and an estimated echo path HI(K- T'-1) of T'-number of samples ago from the HSFT 404 is loaded to the H register 501, and thereafter, the control circuit 504 instructs the switch 505 to select a terminal A, and thus, a disturbed estimated echo path is eliminated to return to an estimated echo path before disturbance.
    • 目的:通过提供一种检测电路,检测回波信号以外的信号是否被添加到接收信号,并使用寄存器的估计回波路径而不是估计的电流来提高整体的回波消除能力以提高服务质量 回波路径被检测到。 构成:提供估计的回波路径延迟电路HSFT 404,用于获得T'个样本的估计回波路径(k-T'+ 1),并由估计的回波路径HI(K)的移位寄存器组成, 输入来自EST403的单个元素hi(k)(i = 1-N)移位T'个样本以输出hi(k-T'+ 1)。 在除了同时呼叫时间之外的时刻,开关505通过来自控制电路504的信号选择终端B,并且由其校正的HI(k + 1)被加载到H寄存器501而不是HI(k)。 因此,此时进行通常的回波路径估计动作。 当检测到同时呼叫时,控制电路504指示开关505选择终端C,并且将来自HSFT 404的先前的T'个样本的估计回波路径HI(K-T'-1)加载到 H寄存器501,此后,控制电路504指示开关505选择端子A,从而消除了干扰的估计回波路径,以在干扰之前返回到估计回波路径。