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11. 发明专利

JPH0399520A A/D CONVERTER 失效
公开(公告)号：JPH0399520A
公开(公告)日：1991-04-24
申请号：JP23641389
申请日：1989-09-12
申请人： SONY CORP
发明人： SASAKI TADAO
IPC分类号： H03M1/12
摘要： PURPOSE:To reduce an influence of offset with a simple constitution by outputting the analog signal, whose polarity is inverted with a prescribed period, from a modulating circuit to demodulate an A/D-converted digital signal. CONSTITUTION:The analog signal whose polarity is inverted with a prescribed period is outputted from a modulating circuit 3 by a chopper. The signal is amplified in an amplifier 5 by the control of a clock generator and is supplied to an A/D converter 6. When a voltage Vc(N) of a first digital signal Pc obtained from the converter 6 has a DC offset OF(N)N. Vc(N) is expressed with a formula I. A voltage Vd(N) of a second digital signal Pd outputted from a demodulating circuit 7 is expressed with a formula II. Offset components OF(2m) and OF(2m+1) are the frequency component of a half of 80kHz sampling frequency, namely, 40kHz frequency in this case and are eliminated by an LPF 8.

12. 发明专利

JPH02254823A MULTIPLE INTEGRATION TYPE A/D CONVERTER 失效
公开(公告)号：JPH02254823A
公开(公告)日：1990-10-15
申请号：JP7690689
申请日：1989-03-29
申请人： SONY CORP
发明人： SASAKI TADAO
IPC分类号： H03M1/52
摘要： PURPOSE:To simplify a circuit deciding the end of each integration cycle by changing the integration direction alternately in plural integration cycles and calculating digital ration through addition and subtraction corresponding to the charge or discharge for the count of the integration time, thereby allowing the end of each integration cycle to be decided through the comparison between the result of integration and a common prescribed value. CONSTITUTION:An integration circuit 1 stores a charge corresponding to an analog input signal Vin and applies integration in two integration cycles composed of the discharge and the charging of the charge. A charge/discharge circuit 2 has two current sources with a different current direction from the current to switch the discharging/ charging corresponding to the switching of the integration cycle. A comparator 3 compares the integration output of the integration circuit 1 with a prescribed value V1 to vary the output polarity. A control circuit 4 controls the switching of the integration cycle and the end of A/D conversion to each section. A counting circuit 5 adds or subtracts the clock signal CK based on an instruction issued from the control circuit 4 corresponding to the output polarity from the comparator circuit 3 synchronously with the switching command of the integration cycle to digitize the analog input signal Vin.

13. 发明专利

JPS60201386A DISPLAY UNIT 失效
公开(公告)号：JPS60201386A
公开(公告)日：1985-10-11
申请号：JP5886084
申请日：1984-03-26
申请人： SONY CORP
发明人： SASAKI TADAO , KAWAKAMI TATSU
IPC分类号： G09G5/00 , G09G1/02 , G09G1/28 , G09G5/02 , G09G5/39 , G09G5/395

14. 发明专利

JPS601773B2 失效
公开(公告)号：JPS601773B2
公开(公告)日：1985-01-17
申请号：JP1075478
申请日：1978-02-02
申请人： SONY CORP
发明人： SASAKI TADAO , SATO MASARU
IPC分类号： H03J5/00 , H03J5/02

15. 发明专利

JPS5925489B2 JPS5925489B2 - 失效
公开(公告)号：JPS5925489B2
公开(公告)日：1984-06-18
申请号：JP3247377
申请日：1977-03-24
申请人： Sony Corp
发明人： FUJIMOTO TOSHIHIRO , SASAKI TADAO
IPC分类号： H03J7/18 , H03J5/02 , H03J5/04 , H03J7/28

16. 发明专利

JPS58100891A SIGNAL CONVERSION CIRCUIT 失效
公开(公告)号：JPS58100891A
公开(公告)日：1983-06-15
申请号：JP20064881
申请日：1981-12-11
申请人： SONY CORP
发明人： SASAKI TADAO , OOKUBO YUTAKA
IPC分类号： G06F3/153 , G09G1/00 , G09G1/28 , G09G5/02

17. 发明专利

JPS57166657A MEMORY CIRCUIT 失效
公开(公告)号：JPS57166657A
公开(公告)日：1982-10-14
申请号：JP5033081
申请日：1981-04-03
申请人： SONY CORP
发明人： NISHIOKA HISAO , FUKUDA JIYOUJI , SASAKI TADAO , MATSUMOTO YOSHIHIKO , OOKUBO YUTAKA , TAKEZAWA AKIRA
IPC分类号： G06F9/32 , G06F12/06 , G06F15/78
摘要： PURPOSE:To expand the spaces of addresses by accessing the operation code and operand of a data transfer instruction from a CPU to a memory from an instruction bank and also accessing the data to be executed from a data bank. CONSTITUTION:Random access memories (RAMs) 2 and 3 and a CPU1 are connected to each other through a data bus 4 and an address bus 5, the RAM2 and the RAM3 are used as an instruction bank and a data bank, respectively. The RAMs 2 and 3 are assigned to the spaces of the CPU1 and an instruction detecting circuit 11 supplies an instruction code fetching signal SS from the RAM2 to the RAM3. Thus, the operation code and the operand from the CPU1 are accessed from the RAM2, and data to be exectured by a memory transfer instruction is accessed from the RAM3. Consequently, the RAMs 2 and 3 use the address spaces in common, expanding the address spaces.

18. 发明专利

JPS5627438A KEY INPUT CIRCUIT 失效
公开(公告)号：JPS5627438A
公开(公告)日：1981-03-17
申请号：JP10253579
申请日：1979-08-10
申请人： SONY CORP
发明人： SASAKI TADAO
IPC分类号： G06F3/023 , H03M11/20
摘要： PURPOSE:To make it possible to double key input numbers without increasing terminal pins by connecting directional elements to common-connected row lines or column lines. CONSTITUTION:In key input parts 30 and 40 shaped in a matrix of 4 rows by 4 columns, 32 keys K1-K32 are constituted in all (marks '' '' represent key contacts). Of input parts 30 and 40, respective row lines are connected in common to corresponding terminals of the 1st port A with four terminals, and respective column lines are connected via directional element, e.g. diodes D0-D3 while connected to corresponding terminals of the 2nd port B with four terminals. Further, circuit 20 that decides which key of input part 30 or 40 has been operated is provided to decide which key the key input signal corresponds to. Since key input circuit 10 is thus constituted, key input numbers can be doubled without increasing input-output ports.

19. 发明专利

JPH1094188A CHARGING CIRCUIT 失效
公开(公告)号：JPH1094188A
公开(公告)日：1998-04-10
申请号：JP26351396
申请日：1996-09-12
申请人： SONY CORP
发明人： SASAKI TADAO
IPC分类号： H02J7/10
摘要： PROBLEM TO BE SOLVED: To judge the existence of a recharge able battery without providing a mechanical switch. SOLUTION: This circuit 20 charges a recharge able battery 30 with constant currents, and then, charges it with constant voltage. In the period of performing charging with constant currents, the existence of the recharge able battery 30 is judged from the magnitude of the charging current. The period of performing charging with a constant voltage includes the period of performing charging by its constant voltage intermittently in specified cycles. In the period of performing the constant-voltage charging intermittently, the differential voltage between the terminal voltage of the battery 30 at the time of being supplied with constant voltage and the terminal voltage of the battery 30 at the time of being not supplied with constant voltage is obtained. The existence of the recharge able battery 30 is judged from the magnitude of this differential voltage.

20. 发明专利

JPH07336227A D/A CONVERTER AND A/D CONVERTER 失效
公开(公告)号：JPH07336227A
公开(公告)日：1995-12-22
申请号：JP13155594
申请日：1994-06-14
申请人： SONY CORP
发明人： SASAKI TADAO
IPC分类号： H03M1/74 , H03M5/18
摘要： PURPOSE:To provide a D/A converter by which a resolution equal to that of a conventional D/A converter is obtained with small number of components than that of the conventional D/A converter processing basically a binary number. tie CONSTITUTION:An-output current Iout depending on a 4-digit offset ternary code [ABCD] is generated by adding currents A.I1, B.I2, C.I3 and D.I4 resulting from applying a weight [-1, 0, +1] of the 4-digit offset ternary code [ABCD] to currents I1, I2, I3, I4 of each digit fed from a weight generating section 10 comprising four constant current sources 11A-11D having currents 11, I2, I3, I4 in a weight of 3 via changeover switches 21A-21D.

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