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    • 12. 发明专利
    • Optical disk drive
    • 光盘驱动器
    • JP2005129178A
    • 2005-05-19
    • JP2003365650
    • 2003-10-27
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • KIMURA NAOHIROISHIBASHI HIROMICHI
    • G11B7/0045G11B7/005G11B7/095G11B7/125G11B21/10
    • PROBLEM TO BE SOLVED: To solve the problem that record reproduction speed drops especially when performing high speed record reproduction since the disk drive learns more than required when learning at constant intervals without depending on the signal quality. SOLUTION: This optical disk drive has a disk 10, an optical pickup 11, a laser control circuit 12, a reproduction circuit 13, a jitter detector circuit 14, and a system controller 15. The system controller 15 sets the time until the next laser power learning in the built-in timer according to the jitter value outputted by the jitter detector circuit 14 so that useless learning can be eliminated. COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:为了解决在进行高速记录再现时记录再现速度下降的问题,因为在不依赖于信号质量的情况下以恒定间隔学习时,磁盘驱动器学习多于所需的数据。 解决方案:该光盘驱动器具有盘10,光学拾取器11,激光控制电路12,再现电路13,抖动检测器电路14和系统控制器15.系统控制器15将时间直到 根据由抖动检测器电路14输出的抖动值,内置定时器中的下一个激光功率学习,从而可以消除无用的学习。 版权所有(C)2005,JPO&NCIPI
    • 14. 发明专利
    • OPTICAL DISK DEVICE
    • JP2000200417A
    • 2000-07-18
    • JP31043099
    • 1999-10-29
    • MATSUSHITA ELECTRIC IND CO LTD
    • SHIHARA TETSUYAWATANABE KATSUYAKIMURA NAOHIROTAKAHASHI HIDEMI
    • G11B7/004G11B7/007G11B7/085G11B19/02
    • PROBLEM TO BE SOLVED: To enable a prescribed track to be established by discriminating, on the basis of the output signal of light quantity detection, whether the address part with a light beam passed is on the outer or the inner periphery with respect to the center of the information track, and by reproducing and recording based on the address polarity discrimination result and the address information. SOLUTION: An address read circuit 52 obtains address information based on the output of a differential amplifier 24, while an address polarity discrimination circuit 51 generates an address polarity discrimination signal based on that output. An address information establishing circuit 53 establishes the address of a track on which a light beam is scanning, on the basis of the address polarity discrimination signal and the output of the address information read circuit 52. If the address information read circuit 52 can obtain both pieces of the address information arranged in zigzag, the central processing unit CPU 54 or the like uses the output result of the address information establishing circuit 53 as it is; if the read circuit 52 can obtain only one piece of the information, the establishing circuit 53 refers to the address polarity discrimination signal.
    • 16. 发明专利
    • Method and circuit for error correction, error correction encoding, data reproduction or data recording
    • 用于错误校正,错误校正,数据复制或数据记录的方法和电路
    • JP2005025912A
    • 2005-01-27
    • JP2003374647
    • 2003-11-04
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • HASHIMOTO YUICHITAKAGI YUJIUSUI MAKOTOKIMURA NAOHIROYAMAMOTO GIICHI
    • G11B20/10G11B20/12G11B20/18
    • PROBLEM TO BE SOLVED: To provide a method and a circuit for error correction capable of preventing deterioration of bus accessing, and a method and a circuit for error correction encoding. SOLUTION: Data are read from a recording medium and the reproduced data are deinterleaved and stored in a first memory arbitrating the input/output to/from the first memory is. It is judged whether a predetermined number of data units is stored into the first memory. On the basis of the result data, transfer of the data stored in the first memory to a second memory is permitted. If data transfer is permitted, the reproduced data are transferred from the first memory 11 to the second memory, and input/output to/from the second memory 15 is arbitrated at the transfer. The reproduced data 15 stored in the second memory is then error corrected, and user data contained in the error corrected reproduction data are externally outputted from the second memory 15. COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种用于防止总线访问恶化的纠错方法和电路,以及用于纠错编码的方法和电路。 解决方案:从记录介质读取数据,再现数据被解交织并存储在第一存储器中,对第一存储器的输入/输出进行仲裁。 判断是否将预定数量的数据单元存储到第一存储器中。 基于结果数据,允许将存储在第一存储器中的数据传送到第二存储器。 如果允许数据传送,则再现数据从第一存储器11传送到第二存储器,并且在传送时对来自第二存储器15的输入/输出进行仲裁。 然后,存储在第二存储器中的再现数据15被纠错,并且包含在纠错再现数据中的用户数据从第二存储器15被外部输出。版权所有(C)2005,JPO&NCIPI