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11. 发明专利

JPH07322291A VIDEO SIGNAL AMPLITUDE CONTROL CIRCUIT 失效
公开(公告)号：JPH07322291A
公开(公告)日：1995-12-08
申请号：JP13643294
申请日：1994-05-26
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： TAKEBUCHI KENJI , HORI HIROYUKI , NAKAGAWA TADASHI , YAMAMOTO MOROHISA , KANESHIRO KATSUMI
IPC分类号： H04N5/91 , H04N9/793
摘要： PURPOSE:To eliminate the need for adjustment of a signal amplitude using a variable resistor by controlling automatically an amplitude of the video signal with high accuracy and high reproducibility. CONSTITUTION:A variable gain amplifier circuit 3 varies simultaneously a DC voltage and an amplitude of a luminance signal and gives them to a voltage detection circuit 21 and a voltage detection circuit 58. The voltage detection circuit 21 generates a DC voltage control signal 9 so that a DC voltage VDC 1 and a tip potential of a synchronizing signal of an output video signal are coincident with each other based on a clamp pulse signal 20. The voltage detection circuit 58 generates a signal resulting from superimposing a signal amplifying a voltage between an output video signal and the voltage VDC 1 onto the DC voltage VDCI at an amplifier circuit 8. A charge discharge current corresponding to the voltage between an output of the amplifier circuit 8 and the DC voltage VDC 2 is generated by a voltage current conversion circuit 12, outputted to a capacitor 19 to control the gain of the variable gain amplifier circuit 3 so that the charge / discharge current to the capacitor 19 is made zero.

12. 发明专利

JPH05218764A ELECTRONIC VOLUME 失效
公开(公告)号：JPH05218764A
公开(公告)日：1993-08-27
申请号：JP4748592
申请日：1992-02-03
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： NAGAI SATOKO , YONETANI NOBUAKI , MATSUDA KATSUHISA , NAKAGAWA TADASHI
IPC分类号： H03G3/10
摘要： PURPOSE:To improve the S/N at a low level output while ensuring a wide dynamic range of the electronic volume by providing a variable current source adjusting an operating current of a current conversion section in response to a control voltage to the electronic volume. CONSTITUTION:Signal currents i1, i2 resulting from a converted input signal Vin are branched into a propagation direction and a non-propagation direction depending on a difference between a control voltage Vx and a reference voltage Vs. Only signal current ix1, ix2 branched into the propagation direction are converted into a voltage Vout and it is outputted. An operating current i0 used to convert the input signal Vin into a current is adjusted in response to the voltage Vx to reduce a current noise caused when a level of the input signal Vout is decreased to be a small level. Simultaneously, the current consumption is reduced to a required quantity in matching with the level of the output signal Vout at all times and the S/N at a low level output is improved while ensuring the wide dynamic range of the electronic volume.

13. 发明专利

JPH0548355A ELECTRONIC VOLUME 失效
公开(公告)号：JPH0548355A
公开(公告)日：1993-02-26
申请号：JP22349491
申请日：1991-08-08
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： TAKEBUCHI KENJI , NAKAGAWA TADASHI , KANESHIRO KATSUMI , SATO TETSUO
IPC分类号： H03G3/10 , H03G3/20 , H03G3/30
摘要： PURPOSE:To control digitally the transmission quantity of the electronic volume accurately with excellent reproducibility by using a generating source for a control reference voltage at the side of an electronic volume circuit and a conversion reference voltage at the side of a D/A converter circuit generating a control voltage in common. CONSTITUTION:A control reference voltage Vref1 at the side of the electronic volume circuit 1 and a conversion reference voltage Vref2 at the side of a D/A converter circuit 2 are used in common. Thus, the frequency in the characteristics of the circuits 1,2 is interlocked with each other. Thus, the characteristic fluctuation values are canceled together. Then the transfer quantity of the electronic volume is digitally controlled accurately with excellent reproducibility. Furthermore, The circuits 1,2 are integrated and formed on one and same semiconductor substrate 100 to allow the fluctuation values of the transfer quantity due to the characteristic fluctuation of components such as transistors(TRs) and resistors or the like to be interlocked with each other thereby suppressing the fluctuation small.

14. 发明专利

JPH06197309A FM MODULATOR 失效
公开(公告)号：JPH06197309A
公开(公告)日：1994-07-15
申请号：JP34721592
申请日：1992-12-25
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , KANESHIRO KATSUMI
IPC分类号： H03C3/06 , H04N5/92 , H04N5/922
摘要： PURPOSE:To adjust an FM carrier frequency and a frequency transition automatically with high accuracy and excellent reproducibility by applying feedback control to a modulation input level so that a ratio of an FM carrier period and a subcarrier period of a chrominance carrier signal is a prescribed expected value. CONSTITUTION:When an FM carrier frequency in a synchronization period is higher than an object frequency fco, a 1st pulse width TW1 being a reciprocal to the FM signal is decreased and then a charged charge quantity in a capacitor Ca is decreased more than a discharged charge quantity and a level control voltage Va extracted from a terminal of the capacitor Ca is decreased. Thus, the level control voltage Va of a level variable circuit 13 is varied in response to the FM carrier frequency for a horizontal synchronizing signal period and a level of an input radio wave Tin to an FM modulation oscillator 141 is varied by the control voltage Va, then a feedback control loop to set the FM carrier frequency for the horizontal synchronizing signal period is an object frequency fsc is formed.

15. 发明专利

JPH0241013A IMPEDANCE CIRCUIT 失效
公开(公告)号：JPH0241013A
公开(公告)日：1990-02-09
申请号：JP19236988
申请日：1988-08-01
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , ARAI IZUMI , KASHIMA HIDEO
IPC分类号： H03H11/04 , H03H11/48
摘要： PURPOSE:To obtain a capacitor with a large capacitance equivalently under a comparatively low voltage by detecting a current flowing to an impedance element and applying current feedback it to the input side. CONSTITUTION:A DC bias current corresponding to a constant current io flows to transistors(TRs) Q5, Q6 to decrease its AC impedance to be negligibly small in comparison with the impedance of a capacitor C3. Thus, the current flowing to the capacitor C3 flows to the TRs Q5, Q6 superimposingly on the said bias current. Since a current mirror circuit cancels the bias current by giving it to the output between power voltages, a current flowing actually and an AC current being a multiple of (n) flows to the output terminal OUT according to the voltage applied to the capacitor C3. Thus, the capacitance is increased equivalently.

16. 发明专利

JPH01219674A PEAK DETECTING CIRCUIT 失效
公开(公告)号：JPH01219674A
公开(公告)日：1989-09-01
申请号：JP4719488
申请日：1988-02-29
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , KASHIMA HIDEO
IPC分类号： G01R19/22 , H03D1/00
摘要： PURPOSE:To reduce a ripple component sharply by a method wherein an input signal is subjected to double wave rectification, first peak detection of this double wave is executed, the polarity of a double wave signal is inverted with an output of said peak detection used as a reference, and the double wave signal and a polarity-inverted signal are added up and subjected to second peak detection. CONSTITUTION:Receiving an input signal, a double wave rectifier circuit 1 inverts the polarity on one side and forms a double wave signal. This double wave signal is sent to a first peak detection circuit 2, and when an output signal of this first peak detection circuit 2 used as a reference, the polarity of the signal is inverted in an inverter circuit 3. This polarity-inverted current Ib is converted into an extrusion current Ib' of 1/2 by a current mirror circuit comprising PNP transistors TR Q14 and Q15, and it is added up with a double wave rectified current Ia obtained from an output TR Q9 of the double wave rectifier circuit 1. A current Ia+Ib' obtained by this addition is subjected to peak detection by a second peak detection circuit 4. By the detection by this second peak detection circuit 4, a ripple component can be reduced sharply.

17. 发明专利

JPS6084981A CONTROL CIRCUIT FOR MOTOR 失效
公开(公告)号：JPS6084981A
公开(公告)日：1985-05-14
申请号：JP19077483
申请日：1983-10-14
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： NAKAGAWA TADASHI , TAKESHITA RITSUJI
IPC分类号： H02P29/00 , H02P1/16
摘要： PURPOSE:To enable to control the rotating speed of a motor to a high speed in a short time at the motor starting time and at a low speed rotation time by supplying a constant voltage of high level to a motor drive circuit. CONSTITUTION:When a motor 1 is started, the output signal f0 of a rotating speed detector 2 is remarkably low frequency as compared with a reference frequency signal fref. Accordingly, a signal VH which transmits that the rotating speed of the motor is slow as compared with the control range is transmitted through an output line l2 to a gate circuit 8 from a control range detector 7 in this case. At this time, the gate circuit 8 becomes open, and the output signal V0 of the converter 3 is not transmitted to a driver 9. However, the constant voltage of high level for abruptly accelerating the motor is supplied from the gate circuit 8 to the motor drive circuit 9.

18. 发明专利

JPS59231925A PLL CIRCUIT AND FM/AM RECEIVER USING IT 失效
公开(公告)号：JPS59231925A
公开(公告)日：1984-12-26
申请号：JP10571483
申请日：1983-06-15
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： NAKAGAWA TADASHI , HABUKA TOSHITO
IPC分类号： H03L7/18 , H03J5/00 , H03L7/193
摘要： PURPOSE:To improve the degree of circuit integration by applying an output signal to plural programmable counters having different frequency dividing ratio and providing a prescaler whose frequency dividing ratio is changed over so as to reduce number of FFs constituting a frequency dividing circuit. CONSTITUTION:The prescaler 2 whose frequency dividing ratio is changed over by a control signal VS and programmable counters 3, 4 counting at the same time an output signal of the prescaler 2 and having different frequency dividing ratio are provided. One of the counters 3, 4 generates a signal VS at the same time when the count is finished and a desired frequency signal by the frequency dividing ratio of the prescaler 2 and the frequency dividing ratio of the programable counters is obtained. Thus, the number of FF circuits constituting the counters 3, 4 is reduced, the chip area is reduced in case of the circuit integration and the degree of circuit integration is improved.

19. 发明专利

JPS57208882A SPEED CONTROLLING CIRCUIT FOR MOTOR 失效
公开(公告)号：JPS57208882A
公开(公告)日：1982-12-22
申请号：JP9392781
申请日：1981-06-19
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI
IPC分类号： H02P29/00
摘要： PURPOSE:To simplify a circuit by a method wherein a common frequency-division circuit is provided for two frequency-division circuits shaping speed controlling reference time signals. CONSTITUTION:A signal output by a crystal oscillator circuit 4 is divided in a frequency-division circuit 5 to form a reference frequence pulse fr. The speed- controlling frequency-division circuit consists of a frequency-division circuit 1 receiving the reference frequency pulse fr, and first and second frequency-division circuits 2a and 2b both receiving the output signal from the common frequency-division circuit 1. For example, resetting pulses (a) and (b) representing the behavior of the frequency-division circuits 2a and 2b are inputted to a speed comparator circuit 6 wherein a speed controlling signal FV and a lock detecting signal LD are shaped corresponding to the phase difference between the two resetting pulses (a) and (b). The phase controlling circuit is composed of a frequency-division circuit 3 and a digital phase detecting circuit 7 receiving both the output of the frequency-division circuit 3 and a rotation detecting pulse FGP.

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