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    • 12. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS61251039A
    • 1986-11-08
    • JP8991585
    • 1985-04-27
    • HITACHI LTDHITACHI HARAMACHI SEMI CONDUCT
    • YAGIHARA TOSHIKINAKAJIMA YOICHIKUROSU TOSHIKITAKANOBU SADAOOTAKA HIROMI
    • H01L21/316
    • PURPOSE:To obtain a sufficient withstand voltage even when a material having the surface charge density of the same polarity is used in the manufacture of a semiconductor device and to simplify the manufacturing method by a method wherein the respective thicknesses of the passivation materials to fill two pieces of the annular grooves in a unisurface double moat structure are made to differ from each other. CONSTITUTION:A glass 110, which is a passivation material having a negative surface charge density, is made to fill a groove 90 in such a thickness of 30mum that its surface charge density becomes 2X10 cm . A glass 100, which is also a passivation material having a negative surface charge density, is made to fill a groove 80 in such a thickness of 10mum that its surface charge density becomes 0X10 cm . In such a constitution, when forward voltage is impressed, the stretch of the depletion layer is good on a P-N junction J2 and the depletion layer is easy to reach a channel stopper 16 and when reverse voltage is impressed, the depletion layer is hard to stretch on a P-N junction J1 due to the glass 100, whose surface charge density becomes roughly zero. Accordingly, by adjusting the surface charge densities of the glasses and the polarities thereof in depths of two pieces of the annular grooves, forward and reverse withstand voltages can be given. The groove 80 of two pieces of the annular grooves is provided shallower and the other groove 90 is provided deeper, and ZnO2 glass powder is made to deposit herein.
    • 17. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS6484654A
    • 1989-03-29
    • JP24077287
    • 1987-09-28
    • HITACHI LTD
    • KOTSUJI NORITOSHIOTAKA HIROMIFUJII MASAMIKUROSU TOSHIKINAKAJIMA YOICHI
    • H01L23/34H01L23/28H01L23/50
    • PURPOSE:To reduce the size of an insulating board to the minimum and to keep adequate the creeping distance between a semiconductor chip and a conductor by a method wherein a bend in a connecting terminal near to a section mounted with a semiconductor chip and a part of the same serving as an inner lead are formed thin by using a press or the like. CONSTITUTION:An insulating board 2 is bonded through the intermediary of a soldering material 8 to a primary surface of a heat radiating substrate 1. A plurality of semiconductor chips 4 and a plurality of connecting terminals 3 are installed on a primary surface of the insulating board 2. Inner leads 5 are provided, electrically connecting the semiconductor chips 4 and the connecting terminals 3. The insulating board 2 and parts to be installed thereon are molded, which is accomplished in a case 6. In this process, the bend of the connecting terminal 4 near to a section mounted with a semiconductor chip 4 and a part of the same serving as an inner lead 5 are formed thin. This design reduces in size the insulating board 2 to the minimum and a proper creeping distance is secured between the chip 4 and a conductor.