专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明专利

JPS5542448A SIGNAL RECEPTION*DISTRIBUTION SYSTEM 失效
公开(公告)号：JPS5542448A
公开(公告)日：1980-03-25
申请号：JP11576578
申请日：1978-09-22
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： OBARA SUSUMU , KITANO HIROSHI , NISHIYAMA SHIGERU , OGUCHI SEISHIROU , AWAJI TOSHIO
IPC分类号： H04Q3/545
摘要： PURPOSE:To decrease the number of the signal lines by adding part of the information stored in the register of the storage program control type to the internal device designation window circuit and carrying out the identification for the command via the output of the window circuit and internal device. CONSTITUTION:The command given from control processor CC of the storage program control exchange is stored in SRD register 3 of signal reception/distribution device SRD. This stored information is applied to internal device number decision circuit 7 by the signal to timing circuit 4 which produces various types of control timing based on the synchronous bit information of processor CC and applied also to internal parity check circiut 5. After confirmation of the normalcy of the reception signal, the number codes of internal devices 1n-11 are transmitted to drive these internal devices. Then the normal operation confirming signals sent from devices 1n-11 plus the output gate sent from internal device designation window circuit 21 which supplies the internal device number sent from register 3 are secured at repeating circuit 22, which is informed to processor CC.

12. 发明专利

JPS5530203A CONTROL SYSTEM FOR HARDWARE WITH CONTROL DATA GENERATOR 失效
公开(公告)号：JPS5530203A
公开(公告)日：1980-03-04
申请号：JP10229478
申请日：1978-08-24
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： MANABE SHIROU , KITANO HIROSHI , KUNISADA ISAO , TOKUNAGA KAORU , FUKUI TOSHIMASA
IPC分类号： H04Q3/545
摘要： PURPOSE:To eliminate the occurrence of a dissidence between the actual equipment of a trunk and its trunk class by reading the trunk class from a trunk side where a control data generator is built through the scanning operation of a central controller. CONSTITUTION:According to a system program stored in memory unit MEM, central controller CC assigns the equipment position of trunk TRK and then sends scan order 11 to trunk TRK to otbain simultaneously scan result 13 indicating the state of trunk TRK and scan result 24 indicating the trunk class. Next, driving order 12 is generated by taking both scan results 13 and 24 into consideration and then sent to trunk TRK.

13. 发明专利

JPS5691596A CONSTITUTION OF LINE CONCENTRATION STAGE CONTROLLER 失效
公开(公告)号：JPS5691596A
公开(公告)日：1981-07-24
申请号：JP16865079
申请日：1979-12-25
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： AOKI TOSHIROU , KITANO HIROSHI , KAMEDA KIYOTAKA , MORI MAKOTO , AWAJI TOSHIO
IPC分类号： H04Q3/60 , H04Q11/04
摘要： PURPOSE:To improve the reliability by realizing system constitution on the whole by controlling a PCM circuit and line concentration stage by one processor, by confounding the PCM circuit and a circuit control part and by providing a system constitution part to each system. CONSTITUTION:The constitution that enables access from central processing parts 2 and 3 is realized by single line concentration stage control part 1, and transmission and reception parts 6 and 7, and circuit control parts 4 and 5 are confounded by information lines l47 and l56. Consequently, if circuit L0 or transmission and reception part 6 runs into trouble during operation via control part 1, (l12), processing part 2, (l24), control part 4, (l46), and transmission and reception part 6, the pattern of control part 1, (l12), processing part 2, (l24), control part 4, (l47), and transmission and reception part 7 is used to realize the system constitution of phase 1 that keeps a calling state. For this purpose, the system constitution part is provided to every system to attain the system constitution on the whole, so that while the reliability is improved, the relief of a call made during another call and economization will be attained.

14. 发明专利

JPS5537074A SIGNAL PROCESS SYSTEM 失效
公开(公告)号：JPS5537074A
公开(公告)日：1980-03-14
申请号：JP11050178
申请日：1978-09-08
申请人： NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD , FUJITSU LTD
发明人： SAITOU ISAO , KITANO HIROSHI , OGUCHI SEISHIROU , TOKUNAGA KAORU , MANABE SHIROU , AWAJI TOSHIO
IPC分类号： H04M3/08 , H04M3/00 , H04M7/00
摘要： PURPOSE:To realize a high-freedom storage of the analog circuit by installing the signal processors for both the digital and analog circuits in separation and securing no relation for the analog circuit storage to the digital circuit. CONSTITUTION:In case the circuit individual signal is processed for the digital telephone exchange, digital circuit 1 is connected directly to digital channel 2 of channel subunit j with the signal part supplied to digital trunk 3. On the other hand, the control information given from CPU4 is applied to digital circuit processor 7 via signal reception distributor 6 to carry out the signal process based on the information of trunk 3. The signal of analog circuit 8 is applied to analog trunk 9 to extract the signal component, and the sound is supplied to channel 2 via encoder 10. Then the signal process is given to the information given from trunk 9 via analog processor 11 and based on the command given from CPU4. In such way, the storage becomes possible for the high-freedom analog circuit.

15. 发明专利

JPS5530204A PERIPHERAL CONTROLLER 失效
公开(公告)号：JPS5530204A
公开(公告)日：1980-03-04
申请号：JP10229578
申请日：1978-08-24
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： NISHIYAMA SHIGERU , KITANO HIROSHI , MATSUMOTO TAKASHI , TOKUNAGA KAORU , FUKUI TOSHIMASA
IPC分类号： G06F13/12 , H04Q3/545
摘要： PURPOSE:To obtain efficient trunk control constitution by simplifying a control interface between a central processor and the trunk by centralizing a trunk control function and state supervisory display function on a peripheral controller. CONSTITUTION:Control instructions sent from central processor 10 are edited and arrayed in a control signal format needed for the control operation of trunk driver 60 and then stored temporarily until the control operation ends. The time control of the switching of bus through which information is transferred between driver 60 and peripheral controller 50 is carried out and state information as to units 40, 50 and 60, including a judgement of no response through the time supervision over the response of a lower unit in unit 50, is generated and sent back to unit 10. In addition, when the execution of one control instruction of unit 10 ends or when no response from the lower unit is detected, unit 50 resets by itself and is ready to receive the control instruction of unit 10 again.

16. 发明专利

JPS60136835A GUARD PROCESSING METHOD OF IMPORTANT SIGNAL 失效
公开(公告)号：JPS60136835A
公开(公告)日：1985-07-20
申请号：JP24405783
申请日：1983-12-26
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO
发明人： TAKI YOSHIHARU , KITANO HIROSHI , ABE HIROAKI
IPC分类号： G06F9/46 , G06F9/48 , G06F11/00 , G06F11/07
摘要： PURPOSE:To prevent an important signal from malfunction even if softwave runs away by executing respective program tasks independently and sending output information in accordance with respective program tasks. CONSTITUTION:A task schedular 7 makes the program tasks 5, 6 execute alternately at 100ms period by a time interrupting method or the like. If an output signal 3 is set up to ''1'' and sent in error when a processor 1 executes malfunction due to noise or the like, a program runs away, the program task 5 executes a step for setting up the outut signal 3 to ''1'', and an input signal 2 is ''0'', the execution of the program is returned to the task schedular 7, so that the program task 6 is executed from its head and an output signal 4 is not turned to ''1''. Thus both the output signals 3, 4 are scarecely set up to ''1'' simultaneously.

17. 发明专利

JPS60136451A SYNCHRONOUS SERIAL TRANSFER SYSTEM 失效
公开(公告)号：JPS60136451A
公开(公告)日：1985-07-19
申请号：JP24405883
申请日：1983-12-26
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO
发明人： TAKAYAMA AKIRA , KITANO HIROSHI , YAMAGUCHI KENJI
IPC分类号： H04L29/06 , H04L13/00
摘要： PURPOSE:To generate a program without paying attentions to a fixed length by inserting frame information indicating start and continuity of transfer information and inserting information indicating the quantity of information only in case of start of transfer information. CONSTITUTION:The quantity of transfer information and transfer information designated by the program are stored in a data buffer 8, and the quantity of transfer information is stored in a subtracting counter 11. It is discriminated whether the quantity of transfer information exceeds a fixed frame length or not only after these two frames, and a continuity pattern is selected in a start/continuity pattern generating circuit 10 in accordance with the discrimination result. A frame synchronizing pattern generating circuit 9 generates and sends a discrimination pattern for every fixed frame length. These controls are performed by a fixed frame length counter 12. Parallel data outputted from individual circuits are converted to serial data by a parallel/serial converting circuit 13.

18. 发明专利

JPS61107435A System for preventing mis-starting of automatic initial program load 失效
标题翻译：防止自动初始程序负载启动的系统
公开(公告)号：JPS61107435A
公开(公告)日：1986-05-26
申请号：JP22779684
申请日：1984-10-31
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： DAIDOJI YUTAKA , KITANO HIROSHI , IGAWA IKUTOSHI , TAKAYAMA AKIRA , KANAZAWA NOBUHARU
IPC分类号： G06F9/445 , G06F11/00
CPC分类号： G06F11/004
摘要： PURPOSE:To prevent mis-transmission of IPL processing request with single circuit constitution by adopting the constitution that a control section and other hardware are supervised mutually in an adaptor for IPL processing request. CONSTITUTION:When a counter circuit 4 reaches a prescribed count while processors 1,1' are not restored regardless of the operation of an emergency control circuit, the counter circuit 4 outputs an IPL start signal (b). The signal (b) gives a command for the IPL processing request to a control section 7. In order to discriminate whether or not the IPL start request from various hardwares in an adaptor 8 is normal, the IPL processing operation resets an IPL start request FF5 and then reads the state of the IPL start request FF5 again. Even when the IPL start request FF5 resets the control section 7 due to any fault, if the section 7 is still in on-state, the section 7 discriminates it as a fault of the adaptor 8 and no IPL command signal (b) is transmitted.
摘要翻译：目的：通过采用控制部分和其他硬件在适配器中相互监督以进行IPL处理请求的结构，防止单电路构成的IPL处理请求错误传输。构成：当计数器电路4达到规定的计数而不管应急控制电路的操作如何而不会恢复处理器1,1'时，计数器电路4输出IPL启动信号（b）。信号（b）向控制部分7给出IPL处理请求的命令。为了区分适配器8中各种硬件的IPL开始请求是否正常，IPL处理操作将IPL开始请求FF5 然后再次读取IPL启动请求FF5的状态。即使IPL启动请求FF5由于任何故障而使控制部分7复位，如果部分7仍然处于开启状态，则部分7将其识别为适配器8的故障，并且不发送IPL命令信号（b）。

19. 发明专利

JPS5914059A Method for informing fault 失效
标题翻译：通知故障的方法
公开(公告)号：JPS5914059A
公开(公告)日：1984-01-24
申请号：JP12116382
申请日：1982-07-14
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： IWAMOTO YOSHIHARU , KITANO HIROSHI , ENDOU AKIRA , ITOU TOSHINORI , FUKUI TOSHIMASA
IPC分类号： G06F11/30 , G06F11/07 , G06F13/00
CPC分类号： G06F11/0703
摘要： PURPOSE:To simplify a soft constitution, by classifying fault information into interruption causes to inform the classified results to a control device and reading out the details when necessary. CONSTITUTION:When data and status information ACOD=001 is returned from a processor PRC for control information sent from a control unit CNT, its answer data are temporarily stored in an answer data register 1. Subsequently, ''001'' is latched in an answer code register 2 and a buffer gate 5 is enabled by a decoder 3, so that the answer data are sent to the control unit CNT. The latch timing of the information is applied to the control device CNT. At the sending of control information, a timing circuit 4 is enabled by an EN input to supervise an ASYN signal. If the monitoring time is overflowed, an ISC signal is outputted through an OR gate 8. Detail fault information is stored in the answer code register 2.
摘要翻译：目的：为了简化软结构，将故障信息分类为中断原因，将分类结果通知给控制设备，并在必要时阅读详细信息。构成：当从控制单元CNT发送的控制信息的处理器PRC返回数据和状态信息ACOD = 001时，其应答数据被临时存储在应答数据寄存器1中。随后，将“001”锁存在应答码寄存器2和缓冲器门5由解码器3使能，使得应答数据被发送到控制单元CNT。信息的锁存定时被施加到控制装置CNT。在发送控制信息时，通过EN输入使能定时电路4来监视ASYN信号。如果监视时间溢出，则通过或门8输出ISC信号。详细故障信息存储在应答码寄存器2中。

20. 发明专利

JPS61134135A Transfer controlling system 失效
标题翻译：传输控制系统
公开(公告)号：JPS61134135A
公开(公告)日：1986-06-21
申请号：JP25611984
申请日：1984-12-04
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： SHIBUYA TADASHI , KITANO HIROSHI , WANAMI MASAO , DAIDOJI YUTAKA , KANAZAWA NOBUHARU
IPC分类号： G06F13/00 , H04L1/00 , H04L1/16
摘要： PURPOSE: To strengthen checking of important controlling data by providing a comparator circuit that compares collating data and data to be collated, and after collating, invalidating the content of storing register of the data and enables sending out of controlling data and a device that invalidates the controlling data when collation of the data is dissident.
CONSTITUTION: Discrimination of collating data, data to be collated and controlling data is made in a data discriminating circuit 7 and inputted to corresponding registers 8, 9, 10. As another function of the data discriminating circuit 7, it checks procedures at the time of receiving the controlling data, that is, collating data are received first and then controlling data and data to be collated are received. The comparator circuit 11 compares the content of the collating data storing register 8 and data to be collated storing register 9. When the two kinds of data are coincident as the result of comparison, the content of storing registers 8, 9 is invalidated, and when collating data and data to be collated coincide, controlling data are invalidated.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过提供比较电路，比较整理数据和要整理的数据，并在整理后，使数据存储寄存器的内容无效，并使控制数据和使无效的设备无效，控制数据在整理数据时是不同意的。构成：在数据鉴别电路7中进行对照数据的鉴别，要整理的数据和控制数据，并输入到相应的寄存器8,9,10。作为数据识别电路7的另一个功能，它检查在首先接收控制数据，即对照数据，然后接收控制要整理的数据和数据。比较电路11比较对照数据存储寄存器8的内容和要对照存储寄存器9的数据。当两种数据作为比较的结果一致时，存储寄存器8,9的内容无效，并且当整理数据和要整理的数据一致，控制数据无效。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式