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11. 发明专利

JP2004288726A Heat dissipating method of electronic device 有权
公开(公告)号：JP2004288726A
公开(公告)日：2004-10-14
申请号：JP2003076237
申请日：2003-03-19
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： YASU JUNICHI , SUGIURA TAKASHI
IPC分类号： H05K7/20 , H01L23/36
摘要： PROBLEM TO BE SOLVED: To provide a method of dissipating heat released from an electronic device capable of soldering a heat conduction plate to a circuit board mounted with the electronic device in a surface-mounting manner without causing damage on the electronic device by heat so as to enable the electronic device to dissipate heat.
SOLUTION: A plurality of thermal vias 14 are provided to the circuit board 12 under a high-heating IC package 10 between its first and second main surface 6 and 8, so that the IC package 10 is thermally coupled with the thermal vias 14. A projection 22 is provided to the heat conduction plate 20, and the projection 22 and a region of the second main surface where the thermal vias 14 are provided are thermally and physically joined together by soldering. Heat released from the electronic device 10 is conducted to a case 16 through the intermediary of the heat conduction plate 20 and dissipated. Only the projection 22 is soldered, so that a large amount of heat is not required to be applied, and the peripheral electronic devices are hardly damaged. Other electronic devices 30 can be arranged on the second main surface at positions near the IC package 10.
COPYRIGHT: (C)2005,JPO&NCIPI

12. 发明专利

JP2004258031A Waveform display apparatus, user interface, and oscilloscope 有权
公开(公告)号：JP2004258031A
公开(公告)日：2004-09-16
申请号：JP2004045860
申请日：2004-02-23
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： PICKERD JOHN J
IPC分类号： G01R13/22 , G01R13/02 , G01R13/28
CPC分类号： G01R13/029
摘要： PROBLEM TO BE SOLVED: To automatically adjust the number and intervals of vertical graduations (horizontal lines) according to zoom in the case of zooming in and out on waveforms on a display means of a signal capturing device. SOLUTION: Sample signals to be tested are captured by a preamplifier 110, a track and hold circuit 120, an A/D converter 130, and a decimator 140 and accumulated in a memory 150. When the waveforms of the accumulated samples are displayed on the display device 190 with a grid as the graduations, a processing and display controller 160 adjusts the relation of the waveforms and the grid according to an amplitude range parameter. When the grid is locked to the waveforms, the intervals and number of the grid are controlled according to zoom on the waveforms. When the grid is locked to a display frame, the grid does no change according to zoom on the waveforms. COPYRIGHT: (C)2004,JPO&NCIPI

13. 发明专利

JP2004240432A Audio data display device and simultaneous display method 有权
标题翻译：音频数据显示装置和同时显示方法
公开(公告)号：JP2004240432A
公开(公告)日：2004-08-26
申请号：JP2004030442
申请日：2004-02-06
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： ALBRIGHT EVAN
IPC分类号： G10L13/00 , G10L19/00 , G10L21/06 , H04N5/60 , H04N17/00
CPC分类号： H04N17/00 , H04N5/60
摘要： PROBLEM TO BE SOLVED: To display audio data and video data simultaneously by using a common display technique without throwing away any data. SOLUTION: FIFO (first-in, first-out) 20 transforms audio data from an audio clock domain to a video (rasterizer) clock domain, and a sample ratio converter 22 upsamples the audio data in the video clock domain. A multiplexer 26 selects an output signal or the video data from the converter 22 for display data. A polyphase filter 16 upsamples the display data, and a rasterizer 12 raster-displays the up-sampled display data on a display 14. COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：通过使用常用的显示技术同时显示音频数据和视频数据，而不会丢弃任何数据。解决方案：FIFO（先进先出）20将音频数据从音频时钟域转换为视频（光栅化器）时钟域，并且采样率转换器22对视频时钟域中的音频数据进行上采样。复用器26选择来自转换器22的输出信号或视频数据用于显示数据。多相滤波器16对显示数据进行上采样，并且光栅化器12在显示器14上光栅地显示上采样的显示数据。（C）2004年，JPO和NCIPI

14. 发明专利

JP2003329709A Digital oscilloscope and its signal capturing device 审中-公开
标题翻译：数字振荡器及其信号捕获器件
公开(公告)号：JP2003329709A
公开(公告)日：2003-11-19
申请号：JP2003126471
申请日：2003-05-01
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： PICKERD JOHN J
IPC分类号： G01R13/20 , G01R13/28 , G01R13/34
CPC分类号： G01R13/345 , G01R13/28
摘要： PROBLEM TO BE SOLVED: To simply detect a predetermined fault by a digital oscilloscope for recording long data.
SOLUTION: Analog-to-digital converters 531-534 each generates a digital sample of a signal to be tested. A trigger circuit 520 generates a trigger signal, and capturing memories 551-554 each stores the digital sample of the signal to be tested. Multiplexers 541-544 each controls the flow of the sample to the memory. Processing circuits 561-564 each tests the digital sample stored in a post capturing operation mode, and designates the range of a storing position of the memory including the data regarding a predetermined event. A system processor 670 reads the predetermined quantity of the stored digital sample from the memory in response to the event detection signal and the memory address signal, and transmits the sample for processing and displaying for the signal processing part of the oscilloscope.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：简单地通过数字示波器检测预定的故障来记录长数据。解决方案：模数转换器531-534各自产生待测信号的数字采样。触发电路520产生触发信号，并且捕捉存储器551-554各自存储要测试的信号的数字样本。多路复用器541-544各自控制样品到存储器的流动。处理电路561-564各自测试以后捕获操作模式存储的数字样本，并且指定包括关于预定事件的数据的存储器的存储位置的范围。系统处理器670响应于事件检测信号和存储器地址信号从存储器读取存储的数字样本的预定量，并发送用于示波器的信号处理部分的处理和显示的样本。版权所有（C）2004，JPO

15. 发明专利

JP2003279609A Calibrating method for vector network analyzer 有权
标题翻译：矢量网络分析仪的校准方法
公开(公告)号：JP2003279609A
公开(公告)日：2003-10-02
申请号：JP2003057201
申请日：2003-03-04
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： HILL THOMAS C , FEOFEN CHEN , MATOS SORAYA J , WILLMANN LEROY J , BERNARD KYLE L , GUMM LINLEY F
IPC分类号： G01R35/00 , G01R23/173 , G01R27/28 , G01R27/32
CPC分类号： G01R27/32 , G01R35/005
摘要： PROBLEM TO BE SOLVED: To correct measurement by performing the measurement in individual frequency steps across a specific measurement frequency range for users, which is narrower than synthetic frequency range of a vector network analyzer, and using calibration data generated from reference impedance.
SOLUTION: Sparse calibration data is stored as the calibration data across calibration frequency range which is wider than the specific measurement frequency range for the users. Detail system error data is interpolated from the sparse calibration data for each of the measurement (26). Each of the measurement is corrected using the detail system error data, and calibrated measurement is performed (32).
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：通过在比矢量网络分析仪的合成频率范围窄的用户的特定测量频率范围内的各个频率步长中进行测量并使用从参考阻抗产生的校准数据来校正测量。
解决方案：稀疏校准数据作为校准数据存储在比用户特定测量频率范围宽的校准频率范围内。对于每个测量（26），从稀疏校准数据内插详细系统误差数据。使用细节系统误差数据对每个测量进行校正，并执行校准测量（32）。版权所有（C）2004，JPO

16. 发明专利

JP2009053032A Waveform display method 有权
标题翻译：波形显示方法
公开(公告)号：JP2009053032A
公开(公告)日：2009-03-12
申请号：JP2007219969
申请日：2007-08-27
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： MIYAZAKI TSUYOSHI
IPC分类号： G01R13/20 , G01R31/28
摘要： PROBLEM TO BE SOLVED: To divide and display write and read cycles in a source synchronous bus.
SOLUTION: Each of DQS and DQ of each of read and write cycles is received by a different channel of a waveform display device. In the next step, idle time before a burst signal in the DQS of the read or write cycle is detected, a trigger is applied in a first part of a burst signal, and the frequency of the burst signal is measured. Next, using the measured frequency, an estimated edge position of the DQ of each of both cycles with respect to an edge position of the burst signal is determined. Using the phase relationship between the edge position of the burst signal and the estimated edge position of the DQ is used, a trigger is applied to the DQS of each of the read and write cycles with a setup/hold time contravention trigger, and then each amplitude is measured. Then, using the difference between the amplitudes of the DQSs of respective cycles, the waveform of DQS or DQ related to one selected cycle is displayed.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：在源同步总线中划分和显示写入和读取周期。解决方案：每个读和写周期的DQS和DQ中的每一个由波形显示设备的不同通道接收。在下一步骤中，检测到在读或写周期的DQS中的脉冲串信号之前的空闲时间，在脉冲串信号的第一部分中施加触发，并测量脉冲串信号的频率。接下来，使用测量的频率，确定两个周期中的每一个相对于突发信号的边缘位置的DQ的估计边缘位置。使用脉冲串信号的边沿位置和DQ的估计边缘位置之间的相位关系，使用建立/保持时间违反触发器对每个读取和写入周期的DQS施加触发，然后每个测量振幅。然后，使用各个周期的DQS的振幅之差，显示与一个选择的周期相关的DQS或DQ的波形。版权所有（C）2009，JPO＆INPIT

17. 发明专利

JP2007147410A Electronic device 审中-公开
标题翻译：电子设备
公开(公告)号：JP2007147410A
公开(公告)日：2007-06-14
申请号：JP2005341281
申请日：2005-11-25
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： SUGIYAMA TOSHIO , TAKAI TORU
IPC分类号： G01D7/00
CPC分类号： G01R13/029 , G01R1/025
摘要： PROBLEM TO BE SOLVED: To provide an electronic device for executing a desired operation corresponding to a program, capable of easily accessing information on a description method of a command, and providing information including a description method of a concrete set value.
SOLUTION: A command help bar 100 is provided in a window 99, and thereby descriptions 102 of a command and an argument corresponding to a user operation and information 104 relative to explanation on the description method are displayed corresponding to the user operation. In this case, since a set value input by the user is used as the argument, the user can understand a more concrete description method. A plurality of windows can be displayed on a display screen, and the descriptions of the command and the argument including the concrete set value on the command help bar 100 are copied in the window 99, and they can be used as a paste in a source code of a program under production in a programming window displayed separately. Consequently, the efficiency of a programming work can be heightened.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于执行与程序相对应的期望操作的电子设备，能够容易地访问关于命令的描述方法的信息，并且提供包括具体设定值的描述方法的信息。解决方案：在窗口99中提供命令帮助栏100，并且相应于用户操作来显示相对于关于描述方法的说明的与用户操作和信息104相对应的命令和参数的描述102。在这种情况下，由于用户输入的设定值被用作参数，所以用户可以理解更具体的描述方法。可以在显示屏幕上显示多个窗口，并且在窗口99中复制包括命令帮助栏100上的具体设置值的命令和参数的描述，并且它们可以用作源中的粘贴在编程窗口中单独显示正在生产的程序的代码。因此，可以提高编程工作的效率。版权所有（C）2007，JPO＆INPIT

18. 发明专利

JP2006333272A Data pattern generation device 有权
标题翻译：数据模式生成装置
公开(公告)号：JP2006333272A
公开(公告)日：2006-12-07
申请号：JP2005156464
申请日：2005-05-27
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： TAKAHASHI HISAO
IPC分类号： H03K5/135
CPC分类号： H03K5/135 , G01R31/31709 , H03K5/156
摘要： PROBLEM TO BE SOLVED: To enable a data pattern with a desired edge position to be output at a high speed.
SOLUTION: A pattern generator circuit 10 stores and outputs a data pattern and corresponding position control data. A delay circuit 16 generates a position control clock by delaying a clock CLK according to the position control data. An output flip-flop 18 outputs a data pattern according to the position control clock. Namely, not by delaying data itself, but by controlling the position of the clock which becomes an operation reference of the data, an edge position of the data is controlled to a desired position as a result.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：使得能够以高速输出具有所需边缘位置的数据图案。解决方案：模式发生器电路10存储和输出数据模式和对应的位置控制数据。延迟电路16通过根据位置控制数据延迟时钟CLK来产生位置控制时钟。输出触发器18根据位置控制时钟输出数据模式。也就是说，不是通过延迟数据本身，而是通过控制成为数据的操作参考的时钟的位置，结果将数据的边缘位置控制到期望的位置。版权所有（C）2007，JPO＆INPIT

19. 发明专利

JP2006270849A Frequency converting circuit 审中-公开
标题翻译：频率转换电路
公开(公告)号：JP2006270849A
公开(公告)日：2006-10-05
申请号：JP2005089333
申请日：2005-03-25
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： NARA AKIRA
IPC分类号： H04B1/26
CPC分类号： H04L5/06 , H04B1/0057 , H04B1/28
摘要： PROBLEM TO BE SOLVED: To enable frequency conversion to be performed in a low cost while maintaining transfer characteristics between a plurality of input signals.
SOLUTION: A first frequency conversion stage 50 has a first and second frequency conversion paths 501, 502, respectively producing a first and second intermediate frequencies after receiving a first and second input signals. A combiner 19 is designed to add the first and second intermediate frequencies, and to supply to a following frequency conversion stage 60. At this time, frequency difference FD is to be provided between oscillation frequencies of local oscillation circuits 141, 142, and respective central frequencies of the first and second intermediate frequencies are made to be controlled so as to generate the frequency difference FD. Since an output signal of the combiner 19 is processed by a common circuit, difference etc. are hard to be produced in the transfer characteristics between channels.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：在保持多个输入信号之间的传送特性的同时，以低成本实现频率转换。解决方案：第一变频级50具有第一和第二变频路径501,502，分别在接收第一和第二输入信号之后产生第一和第二中频。组合器19被设计成添加第一和第二中频，并提供给后续的频率转换级60.此时，将在本地振荡电路141,142的各个振荡频率和相应的中心频率之间提供频差FD 使第一和第二中频的频率被控制以产生频差FD。由于组合器19的输出信号由公共电路处理，所以在通道之间的传输特性中难以产生差异等。版权所有（C）2007，JPO＆INPIT

20. 发明专利

JP2005311797A Despreading method 审中-公开
标题翻译：解决方法
公开(公告)号：JP2005311797A
公开(公告)日：2005-11-04
申请号：JP2004127438
申请日：2004-04-22
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： AKITA YONEO
IPC分类号： H04B1/707 , H04B1/7103
CPC分类号： H04B1/7107
摘要： PROBLEM TO BE SOLVED: To reduce noises in a demodulation by despreading.
SOLUTION: When paths A, B and C are supplied with a total spread signal, despreading circuits 82 for each path despread respectively in corresponding spread codes, and separate channels by channel separation circuits 84. Symbol estimation circuits 86 estimate the estimated symbol values of the digital modulation signals of each channel, and generate estimated digital modulation signals. Channel adders 88 generate the estimated digital modulation signals corresponding to each spread code by adding the estimated digital modulation signals at every each path. Spreading circuits 90 spread the estimated digital modulation signals in the corresponding spread codes, and generate estimated spread signals. Subtracters 78 and 80 subtract the estimated spread signals, which do not correspond to the spread codes of each path, from the total spread signal, and the despreading circuits 82 despread values obtained by the subtraction in the spread codes of each path. Accordingly, interference components by signals spread in the spread codes of other paths are reduced in each path.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过解扩来减少解调中的噪声。解决方案：当路径A，B和C被提供总扩展信号时，每个路径的解扩电路82分别以相应的扩展码解扩，并由信道分离电路84分开。符号估计电路86估计估计符号每个通道的数字调制信号的值，并产生估计的数字调制信号。通道加法器88通过在每个路径上相加估计的数字调制信号来产生与每个扩展码对应的估计数字调制信号。扩展电路90将估计的数字调制信号扩展到对应的扩展码中，并产生估计的扩展信号。减法器78和80从总扩展信号中减去不对应于每个路径的扩展码的估计扩展信号，并且解扩电路82对通过每个路径的扩展码中的减法获得的解扩值。因此，在每个路径中减少了在其他路径的扩展码中扩展的信号的干扰分量。版权所有（C）2006，JPO＆NCIPI

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