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1. 发明专利

JP2008288990A Device and method for evaluating state of propagation path 审中-公开
标题翻译：评估传播状态的装置和方法
公开(公告)号：JP2008288990A
公开(公告)日：2008-11-27
申请号：JP2007133132
申请日：2007-05-18
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： AKITA YONEO
IPC分类号： H04J15/00 , H04B7/04 , H04J11/00
CPC分类号： H04L1/06 , H04B7/0413 , H04B17/345 , H04L27/2647
摘要： PROBLEM TO BE SOLVED: To easily evaluate whether the cause of a problem is present in a propagation path in MIMO. SOLUTION: Noise on the propagation path in the MIMO increases and decreases in proportion to the summation of absolute values of components g i, j, k of demodulation matrixes. Then, the square root of the square sum of g i, j, k is calculated for all the reception antennas (j=1 to N) and is made a noise amplification factor NA i, k of a subcarrier k from a transmission antenna i. Furthermore, its inverse number is made transmission efficiency TE i, k of the propagation path. Then, when the transmission efficiency TE i, k is displayed on a graph using subcarrier numbers as a horizontal axis, in the case there is the problem on the propagation path, a low value is displayed. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了容易地评估在MIMO中的传播路径中是否存在问题的原因。解决方案：MIMO中的传播路径上的噪声与解调矩阵的分量绝对值g（i，j，k）的总和成正比地增加和减小。然后，对于所有的接收天线（j = 1〜N）计算出g i，j，k 的平方和的平方根，并将其作为噪声放大系数NA < 从发送天线i的子载波k的k 。此外，其倒数成为传播路径的传输效率TE i，k 。然后，当使用子载波号作为横轴在图形上显示传输效率TE i，k 时，在传播路径存在问题的情况下，显示低值。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2008267994A Digital signal analyzing device and method 有权
标题翻译：数字信号分析装置及方法
公开(公告)号：JP2008267994A
公开(公告)日：2008-11-06
申请号：JP2007111673
申请日：2007-04-20
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： OBATA TOSHIAKI
IPC分类号： G01R13/20 , G01R29/02
摘要： PROBLEM TO BE SOLVED: To selectively display an eye pattern and a jitter analysis result by specifying a part which conventionally cannot be specified in a digital signal. SOLUTION: A selecting means 24 is displayed on a display screen 20. The selecting means 24 is changed by selecting a mode in a mode selection menu 25, and even the part which is unspecifiable by a specific bit pattern, such as a random pattern in the digital signal, can be selected. If the BW bit pattern is selected in a sub-menu 53 and two specification patterns are specified in menus 58, 60, even the random pattern held in between can be selected, and the eye pattern and the jitter analysis result that is formed only from them can be displayed. Furthermore, desired characteristics of the digital signal may be specified from the measured result, to display the eye pattern and the jitter analysis result only from those included in predetermined conditions. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过指定在数字信号中不能指定的部分来选择性地显示眼图和抖动分析结果。解决方案：在显示屏幕20上显示选择装置24.选择装置24通过选择模式选择菜单25中的模式，甚至通过特定位模式不可指定的部分（例如可以选择数字信号中的随机码型。如果在子菜单53中选择了BW位模式，并且在菜单58,60中指定了两个指定模式，则可以选择其中保持的随机模式，并且只能从...形成的眼图和抖动分析结果他们可以显示。此外，可以根据测量结果指定数字信号的期望特性，仅从预定条件中包括的那些显示眼图和抖动分析结果。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008045900A Jitter characteristics analysis program and table or graph representation of jitter characteristics 有权
标题翻译：抖动特征分析程序和表或图表示抖动特性
公开(公告)号：JP2008045900A
公开(公告)日：2008-02-28
申请号：JP2006219462
申请日：2006-08-11
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： OBATA TOSHIAKI
IPC分类号： G01R29/02
CPC分类号： H03D7/161
摘要： PROBLEM TO BE SOLVED: To display the jitter characteristics of each of a plurality of bit patterns in a comparable manner. SOLUTION: The plurality of bit patterns included in a waveform data of a digital signal are identified from a waveform data created by a waveform display device, and jitter characteristics for each bit pattern are calculated. On the basis of the obtained results, a table or a graph representing the relationship between the bit patterns and the jitter characteristics is displayed. For each of the plurality of bit patterns, graphs of the time elapsed and jitter amounts (maximum value, minimum value, peak-to-peak, or the like) or frequency may be displayed. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：以可比较的方式显示多个位模式中的每一个的抖动特性。解决方案：根据由波形显示装置产生的波形数据识别包括在数字信号的波形数据中的多个位模式，并且计算每个位模式的抖动特性。基于获得的结果，显示表示位图形和抖动特性之间的关系的表格或曲线图。对于多个位模式中的每一个，可以显示经过的时间和抖动量（最大值，最小值，峰峰值等）或频率的曲线图。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2008026188A Signal analyzer and program for the same 有权
标题翻译：信号分析仪及其相关程序
公开(公告)号：JP2008026188A
公开(公告)日：2008-02-07
申请号：JP2006200101
申请日：2006-07-21
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： NARA AKIRA
IPC分类号： G01R23/16
CPC分类号： G01R13/0254 , G01R13/0263
摘要： PROBLEM TO BE SOLVED: To automatically set a mask capable of capturing an unknown extremely rare peak.
SOLUTION: A signal analyzer repeatedly stores waveform data on a signal to be measured, and detects the peaks P1 to P6 of the waveform data. A waveform width of the waveform data in a mask reference level which is decreased from the peak by a predetermined level is obtained as a mask reference width for each of the peaks, and the mask is set using the mask reference level and the mask reference width in each of the peaks. Because the mask is automatically set, a user can easily obtain time domain data or frequency domain data including a characteristic part of the signal to be measured.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：自动设置能够捕获未知非常罕见峰值的面罩。解决方案：信号分析仪反复存储要测量的信号的波形数据，并检测波形数据的峰值P1至P6。获得从峰值减小预定水平的掩模基准电平中的波形数据的波形宽度作为每个峰值的掩码基准宽度，并且使用掩码基准电平和掩码基准宽度来设置掩码在每个峰。因为掩模被自动设置，用户可以容易地获得包括要测量的信号的特征部分的时域数据或频域数据。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2007295132A Data generating apparatus 有权
标题翻译：数据发生装置
公开(公告)号：JP2007295132A
公开(公告)日：2007-11-08
申请号：JP2006118524
申请日：2006-04-21
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： MIKI YASUHIKO
IPC分类号： H03K3/78 , H03M9/00
CPC分类号： G11C7/16 , G11C7/1006 , G11C7/1051 , G11C7/106 , G11C7/1066 , G11C7/1069 , G11C29/02 , G11C29/023 , G11C29/028 , G11C2207/107
摘要： PROBLEM TO BE SOLVED: To provide a technology of stabilizing a time from the arrival of a trigger signal to a substantial data output start. SOLUTION: In this data generating apparatus, a memory 54 supplies parallel data according to a frequency division clock D_CLK. An address counter 52 gives the same address to the memory 54 until the trigger signal arrives and advances addresses when the trigger signal arrives. A hexadecimal counter 62 counts a clock CLK faster than the frequency division clock and the count is circulated by each period of the frequency division clocks. A trigger information latch 64 latches the count of the counter 62 when receiving the trigger signal and gives the latched count to an MUX 58. The MUX 58 selectively generates parallel data in 16 bits from parallel data in total 32 bits received at first and second input terminals I 1 , I 2 according to the latch count. A parallel serial conversion circuit 60 converts rearranged parallel data from the MUX 58 into serial data according to the clock CLK. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种将从触发信号的到达到实质数据输出开始的时间稳定的技术。解决方案：在该数据生成装置中，存储器54根据分频时钟D_CLK提供并行数据。地址计数器52向存储器54提供相同的地址，直到触发信号到达并且当触发信号到达时提前地址。十六进制计数器62比时分钟时钟更快地对时钟CLK进行计数，并且计数被分频时钟的每个周期循环。触发信息锁存器64在接收到触发信号时锁存计数器62的计数，并将锁存的计数提供给MUX 58.MUX 58有选择地从并行数据产生16位并行数据，总共32位在第一和第二输入端端子I 1 ，I 2 。并行串行转换电路60根据时钟CLK将从MUX 58重新排列的并行数据转换为串行数据。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2005337993A Method for measuring transfer function of frequency analysis system 有权
标题翻译：测量频率分析系统传递函数的方法
公开(公告)号：JP2005337993A
公开(公告)日：2005-12-08
申请号：JP2004159797
申请日：2004-05-28
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： YOSHIHARA KOICHI , MIYAKE KENICHI , AKITA YONEO
IPC分类号： G01R27/28 , G01R23/16
CPC分类号： G01R27/28 , G01R23/16
摘要： PROBLEM TO BE SOLVED: To supply a frequency analysis system with a test signal which is sent from a test signal source and expressed by a first transfer function G(w), and to obtain a second transfer function F(w), independently of the first transfer function G(w).
SOLUTION: A first measurement data set is acquired, while supplying the frequency analysis system 20 with a first test signal from the test signal source 10, and a second measurement data set is acquired, while supplying the frequency analysis system 20 with a second test signal obtained by shifting the first test signal by a known frequency value. When the corresponding data of the first and second measurement data sets are compared, although it is recognized that G(w) components are identical, F(w) components are different in the first and second measurement data sets. This characteristic is utilized, and the G(w) components are canceled out, by carrying out calculations using the first and second data sets, thereby the second transfer function F(w) is calculated, independently of the first transfer function G(w).
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了向频率分析系统提供从测试信号源发送并由第一传递函数G（w）表示的测试信号，并获得第二传递函数F（w）独立于第一传递函数G（w）。解决方案：在向频率分析系统20提供来自测试信号源10的第一测试信号的同时获取第一测量数据集，并且获取第二测量数据集，同时向频率分析系统20提供一个通过将第一测试信号移位已知频率值而获得的第二测试信号。当比较第一和第二测量数据集的对应数据时，虽然认识到G（w）分量相同，但是在第一和第二测量数据集中，F（w）分量是不同的。利用该特性，并且通过使用第一和第二数据集进行计算来消除G（w）分量，从而与第一传递函数G（w）无关地计算第二传递函数F（w）。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2005217990A Digital arithmetic processing method and delay analogue signal generator 有权
标题翻译：数字算术处理方法和延迟模拟信号发生器
公开(公告)号：JP2005217990A
公开(公告)日：2005-08-11
申请号：JP2004024889
申请日：2004-01-30
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： KITAGAWA TAKESHI
IPC分类号： H03K5/135 , G06F7/68 , H03M1/66
CPC分类号： G06F7/68
摘要： PROBLEM TO BE SOLVED: To generate a delay signal whose delay amount is precisely and continuously changed.
SOLUTION: A digital arithmetic circuit 18 comprising a well-known arithmetic means produces second digital data corresponding to a delay analogue signal obtained by delaying, by a desired amount, an analogue signal corresponding to first digital data that are input. At that time, the second digital data are equivalent to data that should be obtained when the delay analogue signal is analogue-to-digital-converted according to a reference clock CLK of the first digital data. The second digital data are, however, calculated from the first digital data directly by means of the digital operation. The delay amount of the analogue signal can be precisely controlled as well as being able to be continuously changed by varying a coefficient sequence used at the digital operation.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：产生延迟量被精确且连续地改变的延迟信号。解决方案：包括众所周知的算术装置的数字运算电路18产生对应于延迟模拟信号的第二数字数据，该延迟模拟信号通过以期望的量延迟对应于输入的第一数字数据的模拟信号而获得。此时，第二数字数据等效于当根据第一数字数据的参考时钟CLK对延迟模拟信号进行模数转换时应获得的数据。然而，第二数字数据通过数字操作直接从第一数字数据计算。可以精确地控制模拟信号的延迟量，并且能够通过改变在数字操作中使用的系数序列来连续地改变模拟信号的延迟量。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2005184833A Triggered dds pulse generator 有权
标题翻译： TRIGGERED DDS脉冲发生器
公开(公告)号：JP2005184833A
公开(公告)日：2005-07-07
申请号：JP2004366071
申请日：2004-12-17
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： SULLIVAN STEVEN K , VEITH RAYMOND L , AKIYAMA IWAO , FUJISAWA YASUMASA , AIZAWA YUKIO
IPC分类号： H03K5/153 , G06F1/02 , G06F1/03
CPC分类号： G06F1/0328
摘要： PROBLEM TO BE SOLVED: To generate an output pulse at a fixed time after receiving a trigger signal while maintaining an accurate and stable frequency.
SOLUTION: A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit 14 determines a time interval between the arrival of a trigger signal and a subsequent cycle of the DDS clock, the time interval is used to either adjust an initial phase accumulator value or delay the DDS clock so that a constant time is maintained between the arrival of the trigger signal and the desired output signal.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：在保持精确和稳定的频率之后，在接收到触发信号之后，在固定时间产生输出脉冲。解决方案：触发DDS发生器架构响应于DDS时钟积累相位增量值，以产生相位累加器值，用于寻址包含所需输出信号的波形查找表。时间测量电路14确定触发信号的到达与DDS时钟的后续周期之间的时间间隔，该时间间隔用于调整初始相位累加器值或延迟DDS时钟，从而保持恒定时间在触发信号的到达和期望的输出信号之间。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2005184057A Digital signal demodulator 有权
标题翻译：数字信号解调器
公开(公告)号：JP2005184057A
公开(公告)日：2005-07-07
申请号：JP2003417460
申请日：2003-12-16
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： OKUYAMA HIDEO
IPC分类号： H04J11/00 , H04K1/10 , H04L27/26
CPC分类号： H04L27/2675 , H04L27/2657 , H04L27/2662
摘要： PROBLEM TO BE SOLVED: To provide a technology of correcting a carrier frequency error or the like caused when an OFDM signal is demodulated.
SOLUTION: An A/D converter circuit 10 samples the OFDM signal according to a frequency of an output signal from a sampling frequency oscillation circuit 12 to apply analog digital conversion to the signal and to produce a digital OFDM signal. A complex multiplier circuit 14 applies FFT processing to the digital OFDM signal to convert the digital OFDM signal into a complex symbol. A pilot signal extract circuit 22 extracts a pilot signal from the complex symbol. An arithmetic circuit 24 calculates an inter-symbol difference of a phase difference between subcarriers of the pilot signal and controls the sampling frequency oscillation circuit 12 in response to the inter-symbol difference to correct a sampling frequency of the A/D converter circuit 10.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种校正OFDM信号解调时引起的载波频率误差等的技术。解决方案：A / D转换器电路10根据来自采样频率振荡电路12的输出信号的频率对OFDM信号进行采样，以将模拟数字转换应用于信号并产生数字OFDM信号。复数乘法电路14对数字OFDM信号进行FFT处理，将数字OFDM信号转换为复数符号。导频信号提取电路22从复符号中提取导频信号。算术电路24计算导频信号的子载波之间的相位差的符号间差异，并且响应于符号间差异来控制采样频率振荡电路12，以校正A / D转换电路10的采样频率。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2005024487A Signal analyzer, measuring method using the same, and frequency domain data generation method 有权
标题翻译：信号分析仪，使用该信号分析仪的测量方法和频域数据生成方法
公开(公告)号：JP2005024487A
公开(公告)日：2005-01-27
申请号：JP2003270247
申请日：2003-07-02
申请人： Tektronix Japan Ltd , 日本テクトロニクス株式会社
发明人： NARA AKIRA
IPC分类号： G01R23/16 , G01R35/00
CPC分类号： G01R23/16 , G01R35/005
摘要： PROBLEM TO BE SOLVED: To attain a wide band span exceeding a limit by a sampling frequency of an AD conversion circuit concerning a signal analyzer attaining the wider band span than the conventional.
SOLUTION: A front frequency conversion circuit 13 generates a first intermediate frequency by receiving a signal to be measured. First, second and third frequency conversion passes 100, 200 and 300 generate time domain data by frequency-converting frequency bands different in a first intermediate frequency respectively. DSP 22 generates the time domain data of the number necessary for generating frequency domain data composing a band width processed with three frequency conversion passes by interpolating each of a plurality of time domain data. Therefrom one frequency domain data are generated by calculation.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了获得超过常规的宽带跨度的信号分析仪的AD转换电路的采样频率超过极限的宽带跨度。解决方案：前置频率转换电路13通过接收待测信号来产生第一中频。首先，第二和第三变频通路100,200和300分别通过对第一中频不同的频带进行频率转换来生成时域数据。 DSP22通过内插多个时域数据中的每一个，生成用于生成构成通过三个频率转换通过处理的带宽的频域数据所需的数量的时域数据。通过计算产生一个频域数据。版权所有（C）2005，JPO＆NCIPI

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