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121. 发明专利

JPS53112677A SCHOTTKY BARRIER DIODE 失效
公开(公告)号：JPS53112677A
公开(公告)日：1978-10-02
申请号：JP2744677
申请日：1977-03-12
申请人： SANYO ELECTRIC CO
发明人： HARADA YASOO , MATSUMOTO FUMIO
IPC分类号： H01L29/872 , H01L29/47
摘要： PURPOSE:To manufacture the device small in series resistance and easily mountable on MIC or the like, by constituting three layers of semi-insulating layer 3-n, layer 2-n , and layer 1 with GaAs, providing the holes reaching the layers 1 and 2, and providing the ohmic electrode and Schottky barrier electrode in the holes.

122. 发明专利

JPS53105176A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS53105176A
公开(公告)日：1978-09-13
申请号：JP2056477
申请日：1977-02-24
申请人： SANYO ELECTRIC CO
发明人： HARADA YASOO
IPC分类号： H01L21/52 , H01L21/58 , H01L21/60 , H01L23/02 , H01L23/04 , H01L23/12
摘要： PURPOSE:To make the positioning with the fine pattern of a semiconductor substrate electrode easy by separately forming the electrode to be provided to the bonding plate and support metal pattern, and to obtain the connection part with high mechanical strength through an alloying process.

123. 发明专利

JPS5338272A PRODUCTION OF SCHOTTKY BARRIER GATE TYPE FIELD EFFECT TRANSISTOR 失效
公开(公告)号：JPS5338272A
公开(公告)日：1978-04-08
申请号：JP11390676
申请日：1976-09-20
申请人： SANYO ELECTRIC CO
发明人： HARADA YASOO
IPC分类号： H01L29/80 , H01L21/28 , H01L21/338 , H01L29/417 , H01L29/812
摘要： PURPOSE:To readily isolate and form source drain electrodes without undergoing mask alignment at the accuracy corresponding to photoetching and metal side etching techniques.

124. 发明专利

JPH09284168A MICROWAVE INTEGRATED CIRCUIT AND COMMUNICATION SYSTEM TERMINAL EQUIPMENT USING THE MICROWAVE INTEGRATED CIRCUIT 失效
公开(公告)号：JPH09284168A
公开(公告)日：1997-10-31
申请号：JP11819596
申请日：1996-04-17
申请人： SANYO ELECTRIC CO
发明人： SAWAI TETSUO , UDA NAONORI , HIRAI TOSHIKAZU , HARADA YASOO
IPC分类号： H04B1/44
摘要： PROBLEM TO BE SOLVED: To make the equipment small and to reduce the cost by simplifying a circuit configuration for the terminal equipment corresponding to two or more kinds of mobile communication systems. SOLUTION: A low noise amplifier LNA1 amplifying a reception signal is used in common in a reception system and a mixer MIX2 used to apply frequency conversion to a transmission signal is used in common in a transmission system, two terminals are adopted for an input section A of the amplifier LNA1 and an output section B of the MIX2 respectively and band rejection filters BRF10-BRF40 consisting of an inductor L1, a capacitor C1 and an inductor L2, a capacitor C2 are added to each terminal to prevent input of a reception signal from the input section A to a personal digital cellular(PDC) use filter BRF20 in the case of personal handy phone system(PHS), or to prevent input of a signal from the input section A to the PHS use filter BRF10 (in the case of PDC), to prevent output of a transmission signal from the output section B to the PDC filter BRF40 (in the case of PHS) or to prevent output of signal from the output section B to the PHS filter BRF30 (in the case of PDC).

125. 发明专利

JPH09257869A MEASURING METHOD FOR HIGH FREQUENCY SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH09257869A
公开(公告)日：1997-10-03
申请号：JP6083796
申请日：1996-03-18
申请人： SANYO ELECTRIC CO
发明人： OKAMOTO SHIGEYUKI , MURAI SHIGEYUKI , HARADA YASOO
IPC分类号： G01R31/26 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a measuring method wherein oscillation does not occur when a characteristic of a high frequency semiconductor device is measured. SOLUTION: On an MIC substrate 4, a circumference of a GaAsFET 8 connected to a micro-strip conductor 9 is surrounded by a cylindrical ferrite bead 7 and the cylindrical ferrite bead 7 is brought into contact with a surface of the micro-strip conductor 9. Measuring pins 6 are brought into contact with the micro-strip conductor 9, then a characteristic of the GaAsFET 8 is measured by using a measuring instrument.

126. 发明专利

JPH0936384A INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0936384A
公开(公告)日：1997-02-07
申请号：JP17836095
申请日：1995-07-14
申请人： SANYO ELECTRIC CO
发明人： NISHIDA MASAO , SAWAI TETSUO , HONDA KEIICHI , UDA NAONORI , HIRAI TOSHIKAZU , HARADA YASOO
IPC分类号： H01L29/812 , H01L21/338
摘要： PROBLEM TO BE SOLVED: To provide an integrated circuit device with improved isolation. SOLUTION: In an MMIC where a field effect transistor TR, an inductor Lg, and an inductor Ld1 are formed on GaAs substrate 1, the inductor Lg is connected to the gate of the field effect transistor TR, and the inductor Ld1 is connected to a drain, a grounding metal layer 10 which is connected to the field effect transistor TR is formed at a region among the field effect transistor TR, the inductor Lg, and the inductor Ld1.

127. 发明专利

JPH08316453A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH08316453A
公开(公告)日：1996-11-29
申请号：JP12027895
申请日：1995-05-18
申请人： SANYO ELECTRIC CO
发明人： MATSUSHITA SHIGEHARU , HARADA YASOO
IPC分类号： H01L21/28 , H01L21/338 , H01L29/40 , H01L29/812
摘要： PURPOSE: To provide a method of manufacturing a semiconductor device having the structure with which an electrode can be formed in a self-alignment manner while element characteristics are being improved and also the uniformity of element characteristics and the yield of production are being improved. CONSTITUTION: A gate lower layer 3 is formed on an n-layer, and a side wall part 4, composed of an insulating film, is formed on both side faces of the gate lower layer 3 respectively. Using the gate lower layer 3 and the side wall part 4 as a mask, n layers 5a and 5b are formed by an ion implanting method, and an electrode layer is formed on the whole surface of the gate lower layer 3, the side wall part 4 and the n layers 5a and 5b. An insulating layer 7 is formed on the electrode layer, and after the side wall part of the insulating layer 7 has been removed, ohmic electrodes 6a and 6b are separated from an upper layer 6c by removing the electrode layer on the side face of the side wall part 4 by etching.

128. 发明专利

JPH08316245A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH08316245A
公开(公告)日：1996-11-29
申请号：JP12027995
申请日：1995-05-18
申请人： SANYO ELECTRIC CO
发明人： BABA SEIICHI , SAWADA MINORU , HARADA YASOO
IPC分类号： H01L21/312 , H01L21/338 , H01L29/812
摘要： PURPOSE: To provide a semiconductor integrated circuit whose high-frequency characteristic is good, which can be miniaturized and which is integrated highly. CONSTITUTION: A MES-FET 100 is formed on the surface of a GaAs substrate 1, and polyimide films 11, 12, 13, 14 are laminated on the GaAs substrate 1. The polyimide films 11, 12, 13, 14 in an upper-part region 18 at the MES-FET 100 are removed.

129. 发明专利

JPH08306987A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08306987A
公开(公告)日：1996-11-22
申请号：JP11088695
申请日：1995-05-09
申请人： SANYO ELECTRIC CO
发明人： NAGAMATSU AKIHITO , MURAI SHIGEYUKI , HARADA YASOO
IPC分类号： H01L21/265 , H01L47/00 , H03B9/00
摘要： PURPOSE: To provide a method for easily and stably manufacturing at high yield a TED having a prescribed oscillation frequency. CONSTITUTION: A low-concentration region 3 is formed on a semi-insulating GaAs substrate 1, a photoresist 9 is formed on the low-concentration region 3, and a high-concentration region 4 is formed by obliquely implanting Si ions into the surface of the GaAs substrate 1 from above at a prescribed angle to it. An SiO2 film is formed on all the GaAs substrate 1 and the photoresist 9, and then the SiO2 film and the photoresist 9 are removed through a lift-off method. Thereafter, Si ions are implanted using an SiO2 film as a mask, whereby a conductive region is formed. A low-concentration region 3 located between the conductive region and the high-concentration 4 is made to serve as a high electrical field region.

130. 发明专利

JPH08306708A SEMICONDUCTOR DEVICE AND ITS FABRICATION 失效
公开(公告)号：JPH08306708A
公开(公告)日：1996-11-22
申请号：JP11088595
申请日：1995-05-09
申请人： SANYO ELECTRIC CO
发明人： TOMINAGA HISAAKI , TOUNO HIROSHIGE , HARADA YASOO
IPC分类号： H01L29/41 , H01L21/338 , H01L29/812
摘要： PURPOSE: To provide a semiconductor device having low parasitic capacity, and its fabrication method, in which a self-aligned electrode can be formed while monitoring the magnitude of source-drain current. CONSTITUTION: A resist pattern having inverse trapezoidal cross-section is formed on a working layer 2 followed by formation of an insulating film on the entire surface. The insulating film is then removed from the upper surface of the working layer 2 and resist pattern thus forming a pair of inclining side wall parts 4a, 4b of insulating film. Subsequently, a first electrode layer is formed on the upper surface of the working layer 2 and resist pattern, the first electrode layer on the resist pattern is removed together with the resist pattern, and heat treatment is effected thus forming ohmic electrodes 5a, 5b. While monitoring the magnitude of current flowing between the ohmic electrodes 5a, 5b, a recess is made in the region of working layer 2 exposed between the pair of side wall parts 4a, 4b and a gate electrode, i.e., a second electrode layer 7c, is formed in the recess and on the inner face at the side wall parts 4a, 4b.

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