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1. 发明专利

JPH0536596A FORMATION METHOD OF METAL PATTERN 失效
公开(公告)号：JPH0536596A
公开(公告)日：1993-02-12
申请号：JP19177291
申请日：1991-07-31
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L21/28 , H01L21/027
摘要： PURPOSE:To minimize the occupied ratio of an alignment mark to a semiconductor substrate by using the following: a mark formation process a negative resist pattern formation process; a positive resist formation process; a mark position detection process; an electron beam exposure process; a positive resist pattern formation process; a metal film formation process; and a resist pattern removal process. CONSTITUTION:An alignment mark 2 is formed on a semiconductor substrate 1; a negative resist pattern 3 is formed so as to cover one part of the alignment mark 2; a positive resist 4 is formed on the whole surface. Then, the alignment mark 2 is scanned by using an electron beam and its position is detected. A desired region in the positive resist 4 is exposed to the electron beam. Then, the positive resist 4 is developed; a positive resist pattern 8 is formed; a metal film 9 is formed on the whole surface. Then, the negative resist pattern 3 and the positive resist pattern 8 are removed. Thereby, the region of the semiconductor substrate where a semiconductor device can be manufactured is expanded.

2. 发明专利

JPH04252035A FIELD-EFFECT TRANSISTOR 失效
公开(公告)号：JPH04252035A
公开(公告)日：1992-09-08
申请号：JP858491
申请日：1991-01-28
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L29/812 , H01L21/338
摘要： PURPOSE:To provide a field-effect transistor whose source resistance is small and whose drain breakdown strength is large without providing a high-accuracy recess. CONSTITUTION:A field-effect transistor by this invention is provided with the following: a semi-insulating substrate 1; a contact layer 9 formed in the semi- insulating substrate; action layers 4 which have been formed on both sides of the contact layer 9 in the semi-insulating substrate 1 and whose impurity concentration is lower than that of the contact layer 9; a source electrode 11 formed on the contact layer 9; and gate electrodes 13 and drain electrodes 12 which have been formed on the respective action layers 4.

3. 发明专利

JPH02303158A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH02303158A
公开(公告)日：1990-12-17
申请号：JP12490789
申请日：1989-05-18
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L27/04 , H01L21/822 , H01L27/095
摘要： PURPOSE:To simply correct a resistance value even when it is displaced to a large direction or to a small direction as compared with a design value by executing a hydrogen plasma treatment of a crystal layer in a resistance region. CONSTITUTION:A photoresist film 2 is formed on a GaAs semiinsulating substrate 1; an opening 3 is made in a desired part; Si ions of a desired amount are implanted from the upper part of the main surface of the substrate 1; an ion implantation layer 4 is formed; the photoresist film 2 is removed; after that, the ion implantation layer 4 is activated by a short-time annealing operation. A photoresist film 5 formed; an ohmic metal film 6 is applied from the upper part of the main surface by a vapor deposition method. The ohmic metal film on the photoresist film 5 is removed together with the photoresist film 5; the remaining ohmic metal film 6 is heat-treated in an atmosphere of hydrogen; ohmic electrodes 8 are formed. In succession, an ECR hydrogen plasma treatment is executed; one part 7 of the ion implantation layer 4 is made inert; a resistor 9 using the ion implantation layer 4 as a resistance region is completed. After that, when a resistance value of the resistor 9 has been displaced to a large value as compared with a design value, the ECR hydrogen plasma treatment is executed again. When the value has been displaced to a small value, a heat treatment is executed; the resistance value of the resistor 9 is set to a desired value.

4. 发明专利

JPH01256163A RESISTOR 失效
公开(公告)号：JPH01256163A
公开(公告)日：1989-10-12
申请号：JP8443388
申请日：1988-04-06
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L27/04 , H01L21/822 , H01L27/08
摘要： PURPOSE:To avoid an increase in the cost of a chip and an augmentation in the area of the chip by a method wherein 2 pieces of first ohmic electrodes obtainable by alloying heat-resistant ohmic metals are formed on a semiconductor conducting layer formed on the main surface of a semi-insulating substrate. CONSTITUTION:An ohmic metal consisting of AuGe and Ni, for example, is deposited on a semi-insulative substrate A, on which first ohmic electrodes 2 and 3 are formed. When an alloying is performed to make an ohmic region 8 penetrate in a semiconductor conducting layer 1 and a second ohmic electrode 6 is formed, a resistor 9 provided with the electrode 5 and having a corrected resistance value R is completed. As the resistance value of this ohmic region 8 is smaller than that of the layer 1, the resistance value R of the resistor 9 provided with the electrode 5 becomes smaller than that of a resistor 4. Thereby, there is no need to prepare a resistor for correction for the case where the resistance value of the resistor is shifted to a value larger than a design value and an increase in the cost of a chip and an augmentation in the area of the chip can be avoided.

5. 发明专利

JPS61214466A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61214466A
公开(公告)日：1986-09-24
申请号：JP5533785
申请日：1985-03-19
申请人： SANYO ELECTRIC CO
发明人： HONMA KAZUNARI , TOUNO HIROSHIGE
IPC分类号： H01L21/76 , H01L29/47 , H01L29/861 , H01L29/872
摘要： PURPOSE:To equalize the characteristics of first and second diodes by positively conforming first parasitic capacitance related to the first diode and second parasitic capacitance related to the second diode. CONSTITUTION:First parasitic capacitance 18 consists of first Schottky junction capacitance 20, first insulating capacitances 21, 21... and first insulating region capacitance 22, and second parasitic capacitance 19 is composed of second Schottky junction capacitance 23, second insulating film capacitances 24, 24... and second insulating region capacitance 28. That is, the first and second parasitic capacitances 18, 19 have mutually corresponding constitution, and each corresponding section is formed severally to the same shape. The capacitance values of the first and second insulating region capacitance 22, 28 considerably disperse in comparison among respective element, but the first and second insulating region capacitance 22, 28 positively coincide as element units because the first insulating region capacitance 22 and the second insulating region capacitance 28 display an equal value regarding the dispersion. Accordingly, the first and second parasitic capacitances 18, 19 severally take the equal value.

6. 发明专利

JP2002190482A COMPOUND SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2002190482A
公开(公告)日：2002-07-05
申请号：JP2001308536
申请日：2001-10-04
申请人： SANYO ELECTRIC CO
发明人： ASANO TETSUO , HIRAI TOSHIKAZU , TOUNO HIROSHIGE , HIRATA KOICHI , SAKAKIBARA MIKITO
IPC分类号： H01L21/338 , H01L27/095 , H01L29/80 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To solve the problems of a gate width Wg being taken large for reducing insertion loss as much as possible, the design method of reducing the ON-resistance of a FET being adopted and the clearance of a pad and an adjacent wiring layer being taken to be 20 μm or larger. SOLUTION: The design of omitting a shunt FET and securing isolation in the high-frequency band of 2.4 GHz or higher is noticed, and the conventional reduction of the ON-resistance of the FET is considered secondarily. That is, in the compound semiconductor device, and gate width of the FET for a switch is set to 700 μm or smaller and the size is reduced. Also, an impurity region 40 is provided below the pad and the wiring layer, and the coupling of high frequency signals and the securing of a breakdown voltage are carried out in a small space. As a result, a chip size is reduced substantially.

7. 发明专利

JP2001326333A COMPOUND SEMICONDUCTOR SWITCH CIRCUIT DEVICE 失效
公开(公告)号：JP2001326333A
公开(公告)日：2001-11-22
申请号：JP2000141385
申请日：2000-05-15
申请人： SANYO ELECTRIC CO
发明人： ASANO TETSUO , TOUNO HIROSHIGE , HIRATA KOICHI
IPC分类号： H01L27/06 , H01L21/06 , H01L21/8232 , H01L27/095 , H01P1/15 , H03K17/00 , H03K17/693
摘要： PROBLEM TO BE SOLVED: To resolve the problems of a conventional compound semiconductor switch circuit device such as that a design method of lowering the ON resistance of an FET by taking the gate width Wg large so as to minimize insertion loss as far as possible has been adopted and that 20 μm or over has been taken as an interval between adjacent wiring layers. SOLUTION: The reduction of the ON resistance of an FET until now is considered secondarily, fixing eyes upon the design of securing isolation, omitting a shunt FET in a high frequency band of 2.4 GHz or over. That is, in a compound semiconductor switch circuit device, the size is made small, by setting the gate width of the FET for a switch, and also the coupling of high frequency signals and the security of breakdown strength are performed in small space, by providing a high concentration region right under a pad. As a result, the chip size can be made remarkably small.

8. 发明专利

JPH06275651A FIELD EFFECT TRANSISTOR 失效
公开(公告)号：JPH06275651A
公开(公告)日：1994-09-30
申请号：JP6565993
申请日：1993-03-24
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE , HARADA YASOO
IPC分类号： H01L21/265 , H01L21/338 , H01L29/43 , H01L29/47 , H01L29/812 , H01L29/872 , H01L29/48 , H01L29/62
摘要： PURPOSE:To increase only the intrinsic gate capacitance and decrease the input impedance of an MESFET, without exerting influence upon the characteristics of the MESFET. CONSTITUTION:A first electrode part 13a is formed on a channel region 2, so as to leave 0.3mum from the drain region 4a side. A second electrode 13b is formed on a source electrode 4b. Thereby only the intrinsic gate capacitance can be increased without changing the mutual conductance and the current value. Hence the input impedance of an MOSFET can be decreased, and the constitution of an input matching circuit in the case of MMIC configuration can be simplified. Not only the generation of mismatching can be evaded, but also the internal loss of input matching circuit itself and the loss caused by reflection of electric signal can be reduced.

9. 发明专利

JPH02305445A MANUFACTURE OF FIELD-EFFECT TRANSISTOR 失效
公开(公告)号：JPH02305445A
公开(公告)日：1990-12-19
申请号：JP12730689
申请日：1989-05-19
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L29/812 , H01L21/338 , H01L29/43
摘要： PURPOSE:To make it possible to make a high-concentration layer thick regardless of the thickness of an operating layer by a method wherein the high- concentration layer is formed at scheduled ohmic electrode formation sites, an opening part is formed at a scheduled gate electrode formation site and the operating layer is formed. CONSTITUTION:A high-concentration n layer 3 is formed at scheduled ohmic electrode formation sites of a compound semiconductor substrate (a semi- insulative GaAs substrate) 1 by implanting ions in the scheduled ohmic electrode formation sites, an opening part 5 is formed by etching a scheduled gate electrode formation site of the substrate 1 up to a prescribed depth and an operating layer 8 is formed by implanting ions in the opening part 5. Then, ohmic electrodes 10 are formed on the layer 3 and a gate electrode 9 is formed on the layer 6. Thereby, as the surface of the layer 3 can be arranged at a position higher than that of the surface of the layer 6, the thickness of the layer 3 can be made thick regardless of the thickness of the layer 6.

10. 发明专利

JPH01291441A MANUFACTURE OF SAMPLE FOR MEASURING IMPURITY CONCENTRATION 失效
公开(公告)号：JPH01291441A
公开(公告)日：1989-11-24
申请号：JP12230388
申请日：1988-05-19
申请人： SANYO ELECTRIC CO
发明人： TOUNO HIROSHIGE
IPC分类号： H01L21/66
摘要： PURPOSE:To form an ohmic electrode without addition of a heat treatment by forming a plurality of small and large electrodes on a semiconductor film, and applying a high voltage between one of the small electrodes and the large electrode. CONSTITUTION:A plurality of small electrodes 2 made of aluminium films having 300 to 400mum of diameter and a large electrode 3 made of an aluminum film having sufficiently larger electrode area than that of the electrodes 2 are formed on a semiconductor film 2 to be measured for its impurity concentration. An Au film, a Ti film, etc., may be employed instead of the aluminum film. Then, a DC voltage of several V is applied between one of the electrodes 2 and the electrode 3. After a DC voltage is applied, current/voltage characteristic is measured with probes 5, 6, and if ohmic characteristics are not obtained, it may be discharged by further higher voltage. Thus, since the large electrode is ohmically formed, even if a forward bias is applied or the electrode is small, an accurate impurity concentration can be obtained.

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