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    • 91. 发明专利
    • SOUND MULITPLEX DEMODULATOR
    • JPS61146024A
    • 1986-07-03
    • JP26970684
    • 1984-12-20
    • MATSUSHITA ELECTRIC IND CO LTD
    • MIURA KOICHI
    • H04N5/60H04B1/10H04B1/16H04H1/00H04H40/36H04H40/63
    • PURPOSE:To constitute a titled demodulator so that its performance is not deteriorated even in case when an input signal level has been dispersed, by adjusting in advance the sensitivity of a detecting circuit of a pilot signal so as to be constant, and keeping an input level to a sound multiplex demodulating circuit of a voice detecting output constant. CONSTITUTION:When receiving a stereophonic broadcast, first of all, a user operates a switch so that a signal is attenuated by a prescribed quantity by an attenuator 3, also a variable resistor 2 is adjusted to a point where an indicator 7 is switched to a stereophonic mode from a monaural mode, and an adjustment is executed so that a level of a pilot signal becomes lower than a rated input by an attenuation quantity of the attenuator 3. Subsequently, when the switch 4 is operated so that the attenuator 3 is not attenuated, the level of the pilot signal becomes the rated input, and accordingly, an input level of the whole sound multiplex signal to a demodulating circuit 5 also becomes a reference value, an (L-R) component is inputted as per a reference to a noise reducing circuit 8, too, and the deterioration of the performance can be prevented.
    • 92. 发明专利
    • Sound processing circuit
    • 声音处理电路
    • JPS61118100A
    • 1986-06-05
    • JP23836084
    • 1984-11-14
    • Hitachi Ltd
    • ISHIKAWA YUICHI
    • H04N5/60H04H1/00H04H20/47H04H40/36H04S1/00
    • H04H20/47H04S1/00
    • PURPOSE:To attenuate effectively the sound signal by emphasizing a frequency band signal lower than the sound signal with a monoral and adjusting a level of the frequency band signal lower than the sound signal. CONSTITUTION:Right and left input signals are applied to phase dividing transistors 1 and 2 and transistors for 9 and 10 for the monoral. The reverse phase signal obtained from the collector side of the transistors 1 and 2 passes through LPE 14 and 15, applied respectively to amplifying transistors 3 and 4 at the reverse side, and from the transistors 3 and 4 the signal of the frequency band higher than the sound signal is adjusted by the level and outputted by adjusting volumes 16 and 17. The output of the transistors 9 and 10 passes through LPF 13, and the signal of the frequency band lower than the sound signal is added to the output of the transistors 3 and 4. Thus, the low area is emphasized, the high area level can be adjusted and therefore, the sound can be effectively attenuated.
    • 目的:通过将声带信号强调为低于声音信号的单声道并调整低于声音信号的频带信号的电平,来有效衰减声音信号。 构成:左和右输入信号被施加到相位分离晶体管1和2,并且用于9和10的晶体管用于单路。 从晶体管1和2的集电极侧获得的反相信号通过LPE 14和15,分别施加在反向侧的放大晶体管3和4,并且从晶体管3和4将频带的信号高于 声音信号由电平调节并通过调节音量16和17输出。晶体管9和10的输出通过LPF 13,并且低于声音信号的频带信号被加到晶体管的输出端 因此,低区域被强调,可以调节高区域水平,因此可以有效地减弱声音。
    • 94. 发明专利
    • Identification device of amplitude modulation stereo broadcast system
    • AMPLITUDE MODULATION STEREO BROADCAST系统的识别装置
    • JPS6163122A
    • 1986-04-01
    • JP18441984
    • 1984-09-05
    • Fujitsu Ten Ltd
    • SASAKI KAZUTOSHISHINTANI HIROYUKI
    • H04H1/00H04H40/36H04H40/45H04H5/00
    • H04H20/88
    • PURPOSE:To simplify the constitution of a counter circuit by applying a pilot signal inputted to a frequency identification circuit to a counter circuit after it is frequency-divided for identification to decrease the maximum calculating value of the counter circuit. CONSTITUTION:A pulse pilot signal from a waveform shaping circuit is led to an input terminal of an AND gate 41 of a frequency identification circuit 4, an output of the gate 41 is inputted to a frequency divider 420 of a count section 42, and the frequency division output is led to an AND gate 427 and counters 421-423. The output of the counter 423 is led to the input terminal of gates 427-429 via an inverter 426 and to an input terminal of a circuit 464, and similarly an output of the counter 422 is fed to each input terminal of the gates 427, 428 via an inverter 425 and an output of the counter 421 is led to each input terminal of the gate 427 via the gate 428 and inverter 424 respectively. The counters 421-423 output logical 1 when the number of the pulse signals is 2-4, 4-6, 9-13.
    • 目的:为了简化计数器电路的结构,通过在对频率识别电路进行分频之后,将输入频率识别电路的导频信号应用于计数器电路,进行识别,以减小计数器电路的最大计算值。 构成:来自波形整形电路的脉冲导频信号被引导到频率识别电路4的与门41的输入端,门41的输出被输入到计数部42的分频器420, 分频输出被导通到与门427和计数器421-423。 计数器423的输出通过反相器426和电路464的输入端被引导到门427-429的输入端,类似地,计数器422的输出被馈送到门427的每个输入端, 经由反相器425输出的逻辑电路428和计数器421的输出分别通过门428和反相器424被引导到门427的每个输入端。 当脉冲信号的数量为2-4,4-6,9-13时,计数器421-423输出逻辑1。
    • 96. 发明专利
    • Frequency identifying device
    • 频率识别装置
    • JPS6126342A
    • 1986-02-05
    • JP14844784
    • 1984-07-16
    • Fujitsu Ten Ltd
    • SUGAWARA HIDEJI
    • G01R23/15H04H1/00H04H40/36H04H40/45
    • H04H20/88
    • PURPOSE:To identify various stereophonic systems with a common PLL synthesizer, by providing frequency dividing circuits which are driven by pulses corresponding to frequencies to be identified before and after a phase comparator circuit. CONSTITUTION:A PLL synthesizer 32 selectively locks signals of various stereophonic systems, such as Motorola system supplied to an input terminal 21. The synthesizer 32 is composed of a frequency dividing circuit 33, phase comparator circuit 39, LPF41, and voltage controlling oscillating circuit 40. Pulses 34-37 individually corresponding to frequency signals to be identified are successively inputted in the frequency dividing circuit 33 from a pulse generating circuit 48. When any one of the pulses 34-37 is outputted, the synthesizer 32 locks an inputted frequency corresponding to the pulse being outputted. A stereophonic system discriminating section 43 discriminates the stereophonic system of an input signal from the locking output of the synthesizer 32 and the output of the pulse generating circuit 48.
    • 目的:使用通用PLL合成器识别各种立体声系统,通过提供分频电路,该分频电路由相应于在相位比较器电路之前和之后识别的频率的脉冲驱动。 构成:PLL合成器32选择性地锁定各种立体声系统的信号,例如提供给输入端子21的摩托罗拉系统。合成器32由分频电路33,相位比较器电路39,LPF41和电压控制振荡电路40 分别对应于要识别的频率信号的脉冲34-37从脉冲发生电路48连续地输入到分频电路33中。当输出脉冲34-37中的任何一个时,合成器32锁定对应于 输出脉冲。 立体声系统鉴别部分43鉴别来自合成器32的锁定输出的输入信号的立体声系统和脉冲发生电路48的输出。