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91. 发明专利

JPS60229359A HIGH-FREQUENCY SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60229359A
公开(公告)日：1985-11-14
申请号：JP8641484
申请日：1984-04-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIKAWA OSAMU , EZAKI TAKEYA
IPC分类号： H01L29/78 , H01L21/8234 , H01L27/02 , H01L27/06 , H01L27/088
摘要： PURPOSE:To prevent the lowering of the withstanding voltage of a high-frequency semiconductor device by forming a diode for protecting a gate oxide film in the chip of an MOS capacitor for matching input impedance. CONSTITUTION:Diodes D4, D5 for protecting a gate oxide film in an MOS field- effect transistor are shaped in the chip of an MOS capacitor for matching input impedance. The MOS capacito for matching input impedance is constituted by an N type substrate 13 for the capacitor, an insulating film 14 and an Al electrode 15. The diodes D4, D5 for protecting the gate oxide film are formed by the N type substrate 13 for the capacitor, a P type diffusion layer 16 and an N type diffusion layer 17.

92. 发明专利

JPS6047738B2 JPS6047738B2 - 失效
公开(公告)号：JPS6047738B2
公开(公告)日：1985-10-23
申请号：JP11070477
申请日：1977-09-14
申请人： Matsushita Electric Ind Co Ltd
发明人： EZAKI TAKEYA , ISHIKAWA OONORI
IPC分类号： H01L21/28 , H01L21/302 , H01L21/306 , H01L21/3065

93. 发明专利

JPS6032989B2 失效
公开(公告)号：JPS6032989B2
公开(公告)日：1985-07-31
申请号：JP3952976
申请日：1976-04-07
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： EZAKI TAKEYA
IPC分类号： H01L29/78 , H01L21/265

94. 发明专利

JPS60124873A PROTECTIVE CIRCUIT FOR INPUT TO MOS TYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60124873A
公开(公告)日：1985-07-03
申请号：JP23301383
申请日：1983-12-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： EZAKI TAKEYA , ISHIKAWA OSAMU
IPC分类号： H03F1/52 , H01L21/822 , H01L27/02 , H01L27/04 , H01L29/78 , H02H7/20 , H03F1/42
摘要： PURPOSE:To increase withstanding voltage by preventing the floating of a P well, making the potential of the P well the same as the lower potential of an N region connected to a source or an N region connected to a gate at all times and obviating positive potential to the N regions of the P well. CONSTITUTION:The potential of a P well 11 and an N region 10, a gate G, is made the same by a metallic electrode 17 because an MOSFET2 is conducted and the potential of N regions 10 and 13 is made the same on gate potential of VGS O. The MOSFETs 1 and 2 are not conducted when gate potential VGS is equal to O volt or is lower than the thresholds VT1, VT2 of the MOSFETs 1 and 2, but an MOSFET3 is conducted and the potential of N regions 19 and 9 is made the same. The potential of the P well 11 is made the same as that of the source S because the N region 19 is connected to the P well 11 by a metallic electrode 20.

95. 发明专利

JPS6022509B2 失效
公开(公告)号：JPS6022509B2
公开(公告)日：1985-06-03
申请号：JP4382276
申请日：1976-04-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： EZAKI TAKEYA
IPC分类号： H01L29/78 , H01L21/265 , H01L21/302 , H01L21/306 , H01L21/336

96. 发明专利

JPS59219965A METAL OXIDE SEMICONDUCTOR TYPE FIELD-EFFECT TRANSISTOR 失效
公开(公告)号：JPS59219965A
公开(公告)日：1984-12-11
申请号：JP9633183
申请日：1983-05-30
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIKAWA OSAMU , EZAKI TAKEYA , KUBOTA MASABUMI
IPC分类号： H01L29/06 , H01L29/40 , H01L29/78
摘要： PURPOSE:To improve dielectric resistance between a source and a drain without increasing ON resistance by forming a first source electrode being in contact with a source region and a second source electrode arranged through a thick insulating film. CONSTITUTION:A second source electrode 13 is disposed onto the surface of an epitaxial layer 2 held by a channel forming region 3 through a gate oxide film 5 and a second oxide film 12, and connected to a first source electrode 14 being in contact with the channel forming region 3 and an N type source region 4. Since the sum of the second oxide film 12 and the gate oxide film 5 is thicker than the thickness of the gate oxide film 5 positioned under gate electrodes 6, the elongation of a depletion layer 15 generated by the second source electrode 13 is inhibited, the rise of ON resistance can be suppressed to a low value, and depletion layers 10 extending to the epitaxial layer 2 from the channel forming region 3 are connected mutually, thus improving dielectric resistance between a source and a drain.

97. 发明专利

JPS58180066A Electrostatic induction type semiconductor device 失效
标题翻译：静电诱导型半导体器件
公开(公告)号：JPS58180066A
公开(公告)日：1983-10-21
申请号：JP6425482
申请日：1982-04-16
申请人： Matsushita Electric Ind Co Ltd , Semiconductor Res Found
发明人： EZAKI TAKEYA , NISHIZAWA JIYUNICHI
IPC分类号： H01L29/80
CPC分类号： H01L29/80
摘要： PURPOSE:To increase the drain current of an electrostatic induction type transistor SIT by a method wherein the impurity density in the first conductive type thin layer is made higher than that of the semiconductor layer located around the thin layer. CONSTITUTION:An N type thin layer 5 is formed between gates 3, and 3' located in an N type layer 1-2 and, as a result, the N type channel region spreading from a source 2 and a drain 1-1 is divided into the region A on the side close to the source 2 and the region B on the side close to the drain 1-1. The thin layer 5 is formed in the impurity density several times higher than that of the N type regions A and B located around the thin layer. Drain current becomes larger as the density degree of the N type thin layer 5 becomes higher, but if said impurity density becomes too high, the withstand voltage of the gates 3 and 3', the source 2 and the drain 1-1 is reduced and the electrostatic capacity increases. Therefore, the impurity density of 3-5 times or thereabout against the density of epitaxial layer 1-1 is desirable.
摘要翻译：目的：通过使第一导电型薄层中的杂质浓度高于位于薄层周围的半导体层的杂质浓度的方法来增加静电感应型晶体管SIT的漏极电流。构成：在N型层1-2中的栅极3和3'之间形成有N型薄层5，结果从源极2和漏极1-1扩散的N型沟道区被分割进入靠近源极2侧的区域A和靠近漏极1-1的一侧的区域B. 薄层5形成的杂质密度比位于薄层周围的N型区域A和B的杂质密度高几倍。漏极电流随着N型薄层5的密度变大而变大，但如果杂质浓度过高，则栅极3，3'，源极2和漏极1-1的耐压降低，静电容量增加。因此，期望与外延层1-1的密度相关的3-5倍的杂质密度。

98. 发明专利

JPS58180045A High-frequency semiconductor device 失效
标题翻译：高频半导体器件
公开(公告)号：JPS58180045A
公开(公告)日：1983-10-21
申请号：JP6273082
申请日：1982-04-14
申请人： Matsushita Electric Ind Co Ltd
发明人： KUBOTA MASABUMI , EZAKI TAKEYA , ISHIKAWA OSAMU
IPC分类号： H01L23/12 , H01L23/66
CPC分类号： H01L23/66 , H01L2223/6644 , H01L2224/48 , H01L2224/48011 , H01L2224/4813 , H01L2224/49 , H01L2224/49175 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To contrive to enhance assembling yield of the high-frequency semiconductor device by a method wherein bonding pads for transmission are provided to attain curtailment of wire length, while the number of pieces of long wires is reduced. CONSTITUTION:The bonding pads 31, 32 for transmission are the metal electrodes for transmission short-circuited to neither electrode of an emitter, a base nor a collector formed on the field oxide film of a chip other than the bonding wires, and have the role to distribute the input signals of the bonding wires 38, 39 to respective two wires 40, 41 and 42, 43. Moreover the bonding pads 31, 32 for transmission are connected by the wire 44. The wire thereof is used to prevent generation of unbalance of input electric power to respective unit BPT's 19-22 according to dispersion of lengths of the long wires 38, 39, or dispersion of the characteristics of the unit BPT's, and accordingly abnormal oscillation can be suppressed, and allowable input electric power can be increased.
摘要翻译：目的：为了提高高频半导体器件的组合收益率，通过提供用于传输的接合焊盘以减少线长度的方法，同时减少长导线数量。构成：用于透射的接合焊盘31,32是用于传输短路的金属电极，其不仅形成在除接合线之外的芯片的场氧化膜上形成的发射极，基极和集电极的电极，并且具有作用以将接合线38,39的输入信号分配到相应的两根导线40,41和42,43。此外，用于传输的接合焊盘31,32通过导线44连接。其导线用于防止产生不平衡根据长导线38,39的长度的分散或单位BPT的特性的偏差，对各单元BPT19-22的输入电力进行输入，从而可以抑制异常振荡，能够增加容许输入电力。

99. 发明专利

JPS5837994B2 失效
公开(公告)号：JPS5837994B2
公开(公告)日：1983-08-19
申请号：JP566376
申请日：1976-01-20
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： EZAKI TAKEYA , OGAWA KUNI , KAJIWARA KOSEI , YASUNO KOSUKE
IPC分类号： H01L29/80 , H01L29/06

100. 发明专利

JPS5836496B2 失效
公开(公告)号：JPS5836496B2
公开(公告)日：1983-08-09
申请号：JP6907276
申请日：1976-06-11
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKAGI YOSHUKI , EZAKI TAKEYA
IPC分类号： H01L29/78 , H01L21/20 , H01L21/86 , H01L29/786

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