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1. 发明专利

JP2006044557A Display device 审中-公开
标题翻译：显示设备
公开(公告)号：JP2006044557A
公开(公告)日：2006-02-16
申请号：JP2004230780
申请日：2004-08-06
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KODA HIROYUKI , SAKAMOTO NORIHIDE , ISHIKAWA OSAMU
IPC分类号： B60R11/02
摘要： PROBLEM TO BE SOLVED: To store a display part in a box body and to mount the box body onto a curved dashboard while retaining the stable state.
SOLUTION: The display device has the box body 1 having a mounting part 4; and a mounting plate 6 fixed onto the dashboard of the vehicle. The mounting plate 6 has left and right mounting brackets detachably fixed with a mounting part 4 of the display device 1 and a rib 10, i.e., a rigid part is formed between the mounting brackets. A flexible part F is formed on a periphery of the mounting bracket 7 by an opening hole 8 and a slit 9.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：将显示部分存储在盒体中并将盒体安装在弯曲的仪表板上，同时保持稳定状态。
解决方案：显示装置具有具有安装部分4的盒体1; 以及固定在车辆仪表板上的安装板6。安装板6具有可拆卸地与显示装置1的安装部分4固定的左右安装支架，并且在安装支架之间形成有肋10，即刚性部分。柔性部分F通过开孔8和狭缝9形成在安装支架7的周边上。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2002151965A HIGH FREQUENCY CIRCUIT 失效
公开(公告)号：JP2002151965A
公开(公告)日：2002-05-24
申请号：JP2000346110
申请日：2000-11-14
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： IN SAKAE , KUNIHISA TAKETO , ISHIKAWA OSAMU
IPC分类号： H03D7/14 , H03D7/00 , H03F3/45
摘要： PROBLEM TO BE SOLVED: To provide a single balanced mixer with a novel circuit configuration that can be integrated in the inside of a monolithic semiconductor chip. SOLUTION: A source of a 1st field-effect transistor(FET) 101a and a source of a 2nd FET 103a are connected, a source of a 1st dual gate FET 201a having 1st and 2nd gates and a source of a 2nd dual gate FET 203a having 3rd and 4th gates are connected, the drain of the 1st FET 101a is connected to the 1st gate, the drain of the 2nd FET 103a is connected to the 3rd gate, a 1st high frequency input signal is given to the gate of the 1st or 2nd FET and a 2nd high frequency input signal is given to the 2nd and 4th gates.

3. 发明专利

JP2002141714A HYBRID COUPLER 失效
公开(公告)号：JP2002141714A
公开(公告)日：2002-05-17
申请号：JP2000337530
申请日：2000-11-06
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： IN SAKAE , FUKUDA KENJI , KOIZUMI HARUHIKO , KUNIHISA TAKETO , ISHIKAWA OSAMU
IPC分类号： H01P3/08 , H01P5/22 , H03D9/06
摘要： PROBLEM TO BE SOLVED: To To provide a hybrid coupler that is formed on a printed circuit board an MMIC(Monolithic Microwave Integrated Circuit) mounted thereon and can prevent the mount area from being extended and the coupler characteristic from being deteriorated. SOLUTION: In the hybrid coupler 100, a 1st straight line 101 with a length of 1/2 λ, a 2nd line 102 connected to the 1st line 101 and having a length of 1/2 λ, and a 3rd line 103 connected to the 1st line 101 and the 2nd line 102 and having a length of 1/2 λ are placed to configure a triangle loop. A 1st terminal 104 is connected to the middle of the 1st line 101, a 2nd terminal 105 is connected to the middle of the 2nd line 102, and a 3rd terminal 106 is connected to a cross point between the 1st line 101 and the 2nd line 102, and a 4th terminal 107 is connected to a cross point between the 1st line 101 and the 3rd line 103.

4. 发明专利

JPH1093111A HIGH-FREQUENCY SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1093111A
公开(公告)日：1998-04-10
申请号：JP15628897
申请日：1997-06-13
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIKAWA OSAMU
IPC分类号： H01L29/41 , H01L21/338 , H01L29/812 , H01P1/00 , H01P3/08 , H03H7/38
摘要： PROBLEM TO BE SOLVED: To provide a high-frequency semiconductor device, permitting its high-frequency characteristics to be accurately measured, without assembling. SOLUTION: The device comprises input side and output side matching circuits 1, 2 integrated with the input and output of an FET 3 on a main surface of a semi-insulating GaAs substrate 4, a surface ground electrodes 5 which are disposed at both sides of strip lines at the input and output and electrically connected to back-side electrodes, and a strip line surface electrode 7 located at the center of the surface ground electrode 5 electrically are connected through V-grooves 6 to a strip line back electrode 8. The input and output impedances of a chip can be measured from the surface side in wafer or chip state, using a high-frequency prober, etc., without assembling the chip by bonding wires.

5. 发明专利

JPH1070159A HIGH-FREQUENCY MODULE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JPH1070159A
公开(公告)日：1998-03-10
申请号：JP15393497
申请日：1997-06-11
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIKAWA OSAMU , MAEDA MASAHIRO
IPC分类号： H01L25/18 , H01L21/60 , H01L25/04
摘要： PROBLEM TO BE SOLVED: To cut down the part numbers, size and manufacturing man-hours thereby making feasible of the automatic inspection by the remarry and electrically coupling a semiconductor element with the second metallic film provided on the second main surfaces opposing to the first main surface provided with the first metallic film. SOLUTION: The high-frequency module is provided with a printed circuit board 1 which is provided with metallic films 10 provided on the main surface of insulating substrates 30 as well as a metallic film 20 provided on the back opposing to the main surface, while the thickness of the metallic film 20 is larger than that of the metallic films 10. The printed circuit board 1 is provided with an aperture part 50 passing through the metallic films 10 and the insulating substrates 30. The metallic film 20 is exposed in the aperture part 51 so as to mount a semiconductor chip 40 on this exposed part. This semiconductor chip 40 is die-bonded onto the metallic film 20 inside the aperture part 50 by solder bonding step. Accordingly, the semiconductor ship 40 can be thermally and electrically coupled with the metallic film 20 by a solder layer 42.

6. 发明专利

JPH07154159A HIGH FREQUENCY AMPLIFIER INTEGRATED CIRCUIT AND ITS DRAIN BIAS CIRCUIT 失效
公开(公告)号：JPH07154159A
公开(公告)日：1995-06-16
申请号：JP29957293
申请日：1993-11-30
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIDA KAORU , IKEDA HIKARI , KOSUGI HIROAKI , KUNIHISA TAKETO , YOKOYAMA TAKAHIRO , ISHIKAWA OSAMU
IPC分类号： H03F1/02 , H03F3/195 , H03F3/60
摘要： PURPOSE:To reduce an output voltage of a drain power supply and power consumption by applying a drain bias directly to a drain of a FET provided between input an output matching circuits so as to eliminate a loss due to a voltage drop caused by the insertion of the output side matching circuit. CONSTITUTION:A drain bias terminal 12, output and input side matching circuits 13, 14, MMIC input output terminals 16,17 and a FET 11 connecting to the circuits 13, 14 are formed on a semiconductor substrate 10. Input/output DC cut-off capacitors 18, 19 are connected to the terminals 16, 17, and the FET 11 and a terminal 111 connecting to the terminal 12 form a drain bias circuit. Thus, a loss of a voltage drop due to the insertion of the circuit 13 is avoided and a DC equivalent circuit of the drain bias circuit is only a drain-source resistance of the FET 11. Thus, a drain bias is applied to the terminal 111 directly, a low voltage is adopted for the voltage of a drain power supply and power consumption of an amplifier is reduced.

7. 发明专利

JPH065881A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JPH065881A
公开(公告)日：1994-01-14
申请号：JP16248092
申请日：1992-06-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： AZUMA CHINATSU , NISHIJIMA MASAAKI , OTA TOSHIMICHI , ISHIKAWA OSAMU
IPC分类号： H01L25/00 , H01L21/822 , H01L23/48 , H01L25/04 , H01L25/16 , H01L25/18 , H01L27/04 , H01L29/80 , H01L29/804
摘要： PURPOSE:To improve a productive yield, by making an active element and a passive element separately and joining good ones thereof to form an IC chip. CONSTITUTION:In a semiconductor device, passive element chips 9 and 11, and an FET chip as an active element chip on the main face are provided. The FET chip on a main face of a semi-insulating substrate 1 is formed in a diffusion step, in which a channel 2, a source region 3, and a drain region 4 are formed. A gate electrode 7 for the FET on the channel 2 is provided, and a source electrode 5 and a drain electrode 6 are formed. The gate electrode 7 is connected through a bonding wire 15 to the input-side passive element 9 in the passive element chip, while the drain electrode 6 is connected to the output-side passive element device 11. Moreover, good-quality passive and positive elements are joined together to form an IC chip, and a productive yield can be improved as compared with a case of an MMIC, in which both the elements should be good in quality at the same time.

8. 发明专利

JPH05243323A 失效
公开(公告)号：JPH05243323A
公开(公告)日：1993-09-21
申请号：JP4440092
申请日：1992-03-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： AZUMA CHINATSU , OTA TOSHIMICHI , MAEDA MASAHIRO , ISHIKAWA OSAMU
IPC分类号： H01L21/60 , H01L21/768 , H01L21/82 , H01L21/822 , H01L27/04 , H01L21/90
摘要： PURPOSE:To prevent an electrode pad from flaking off, by forming a protective- film adhering metal layer made of titanium to join the electrode pad adhesively with a surface protective CONSTITUTION:A semi-insulating GaAs substrate 1 having a conductive region 2 is all coated with an insulating film 3. An insulating film formed on the places of an ohmic electrode 5 and of a Schottky electrode 6 is removed so that the ohmic electrode 5 and the Schottky electrode 6, which are connected to electrode pads through a metallic wiring 8, are formed. Then, a protective-film adhering metal layer 10 made of titanium is deposited around the electrode pad, and a surface protective film 11 is deposited on the other place than the wire- bonding area on the electrode pad. Consequently, the surface protective 11 and the protective-film adhering metal layer 10 are joined highly adhesively with each other, and the flaking of the protective film can be prevented.

9. 发明专利

JPH0595017A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0595017A
公开(公告)日：1993-04-16
申请号：JP25516691
申请日：1991-10-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： AZUMA CHINATSU , OTA TOSHIMICHI , ISHIKAWA OSAMU
IPC分类号： H01L21/60
摘要： PURPOSE:To reduce the size of an electrode pad for a semiconductor device. CONSTITUTION:The title semiconductor device is provided with the following: an electrode pad 1 for bonding use where a surface protective film is not overhung at its periphery; and the surface protective film 3 wherein the height from the surface of a semiconductor substrate to the surface of the surface protective film is formed to be lower than the height from the surface of the semiconductor substrate to the surface of the electrode pad.

10. 发明专利

JPH04361535A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04361535A
公开(公告)日：1992-12-15
申请号：JP13689591
申请日：1991-06-10
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YANAGIHARA MANABU , NISHII KATSUNORI , OTA TOSHIMICHI , ISHIKAWA OSAMU
IPC分类号： H01L21/28 , H01L21/338 , H01L29/47 , H01L29/812 , H01L29/872
摘要： PURPOSE:To enable the Schottky diode characteristics and FET characteristics of excellent gate electrode to be displayed. CONSTITUTION:Within a two layer structure of an SiN film 6 and an SiO2 film 7 for a spacer layer to form a gate electrode by lift off step, the window- making steps of the SiO2 film 7 and the SiN film 6 are performed by siotropical chemical dry-etching step respectively using fluoric acid and CF4+O2. Through these procedures, since the window-making step of the SiN film 6 is performed by the isotropical chemical etching step causing little damage to the GaAs surface, good Schottky characteristics and FET characteristics can be displayed. Meanwhile, since the SiN film 6 can be thinly formed, the resist pattern need not be expanded during the etching step thereby enabling the gate length conforming to the design to be stably secured.

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