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91. 发明专利

JPH11324710A GAS TURBINE POWER PLANT 失效
公开(公告)号：JPH11324710A
公开(公告)日：1999-11-26
申请号：JP13796098
申请日：1998-05-20
申请人： HITACHI LTD
发明人： TSUKAMOTO MORIAKI , NOGUCHI YOSHIKI , HATAMIYA SHIGEO
IPC分类号： F02C3/30 , F01K21/04 , F02C6/00 , F02C6/18 , F02C7/08 , F02C7/143
摘要： PROBLEM TO BE SOLVED: To improve the power generating efficiency of a gas turbine power plant by increasing a water content in air supplied to a combustor so as to increase the flow of the working medium of turbine and also increase a heat recovery amount of exhaust gas delivered from the turbine. SOLUTION: This gas turbine power plant is equipped with a compressor 1 compressing air 10 and the like, a combustor 5 producing combustion gas by burning compressed air 11 and fuel 6, a turbine 7 operated by this combustion gas, a generator 20 generating electricity by being driven by the turbine 7, a regenerating heat exchanger 3 indirectly thermally exchanging exhaust gas 8 for a whole or a part of compressed air 11, and an atomizer 4 atomizing water or steam to compressed air flowing in the inside of the regenerating heat exchanger 3.

92. 发明专利

JPH11303646A GAS TURBINE GENERATION PLANT 失效
公开(公告)号：JPH11303646A
公开(公告)日：1999-11-02
申请号：JP10897498
申请日：1998-04-20
申请人： HITACHI LTD
发明人： CHINO KOICHI , YOKOMIZO OSAMU , NOGUCHI YOSHIKI
IPC分类号： F02C6/00 , F02C6/14 , F02C7/22 , H02J15/00
摘要： PROBLEM TO BE SOLVED: To provide an energy storing system which has a high power storage amount per unit area and a high energy storage efficiency, by improving the apparent energy storage efficiency to more than 100%, by utilizing the cryogen of the LNG in the manufacture of the liquid air, as well as reutilizing the cryogen of the liquid air effectively. SOLUTION: This plant is provided with a compressor 11; a heat regenerator vessel 12; an expansion valve 13; a liquid air storage tank 14; a combustor 3; a gas turbine 1; and a generator 2. Furthermore, a heat regenerator vessel 7 to cool the compressed air by the compressor 11 by the cryogen of the LNG, as well as to recover and store the cryogen of the LNG to feed to the combustor 3 as a fuel and/or the cryogen of the LNG to feed to an LNG utilizing equipment 9 to utilize the other LNG is also provided.

93. 发明专利

JP2585557B2 失效
公开(公告)号：JP2585557B2
公开(公告)日：1997-02-26
申请号：JP30841286
申请日：1986-12-26
申请人： HITACHI LTD
发明人： HANAWA MAKOTO , NAKAZAWA TAKUICHIRO , NOGUCHI YOSHIKI
IPC分类号： G11C15/04 , G11C16/06 , G11C17/00 , G11C17/18

94. 发明专利

JP2581484B2 失效
公开(公告)号：JP2581484B2
公开(公告)日：1997-02-12
申请号：JP29954095
申请日：1995-11-17
申请人： HITACHI LTD
发明人： NOGUCHI YOSHIKI , HAGIWARA YOSHIMUNE , IWASAKI KAZUHIKO , AOKI HIROKAZU , SHIMADA SHIGERU
IPC分类号： G06F13/362 , G06F13/42

95. 发明专利

JPH08227393A DATA PROCESSING SYSTEM 失效
公开(公告)号：JPH08227393A
公开(公告)日：1996-09-03
申请号：JP29954095
申请日：1995-11-17
申请人： HITACHI LTD
发明人： NOGUCHI YOSHIKI , HAGIWARA YOSHIMUNE , IWASAKI KAZUHIKO , AOKI HIROKAZU , SHIMADA SHIGERU
IPC分类号： G06F13/362 , G06F13/42
摘要： PURPOSE: To shorten bus occupation time by generating a bus cycle end signal at the time of accessing a specific device, and at the time of accessing another device, ending a bus cycle by a bus end signal. CONSTITUTION: Address space for generating a bus cycle end signal at the time of internal access is specified by an area specifying register 1. The address space specified by the register 1 is inputted to a coincidence detecting circuit 2. When the circuit 2 for comparing an access address with address specification information stored in the register 1 indicates coincidence between both the addresses, a bus cycle is allowed to end in response to an output signal from the circuit 2, and when the circuit 2 does not indicate the coincidence, the bus cycle is allowed to end in response to a bus cycle end signal inputted from the outside of a chip. The address specification information stored in the register 1 is written when a processor executes an instruction.

96. 发明专利

JPH07334267A LOGIC LSI 失效
公开(公告)号：JPH07334267A
公开(公告)日：1995-12-22
申请号：JP12529894
申请日：1994-06-07
申请人： HITACHI LTD
发明人： NOGUCHI YOSHIKI , NISHIOKA KIYOKAZU , OBA SHINYA , NARITA SUSUMU
IPC分类号： G06F1/04 , G06F1/08 , G06F1/10 , G06F1/32 , H01L21/82
摘要： PURPOSE:To reduce power consumption and to accelerate a response at the same time by selecting an internal clock signal based on the designation information of an operating frequency to be changed out of plural internal clock signals while being interlocked with an operation inside a module. CONSTITUTION:The module is composed of peripheral circuits such as a CPU 1 of the processor of a software, memory 2 and timer 3. A clock generating circuit (CPG) 4 outputs a reference clock signal 9 to be used for generating the plural internal clock signals at the respective modules. The changing command of the operating frequency is transmitted to all the modules as the object of an operating frequency change, and any designated module fetches the information of the operating frequency to be changed, selects the internal clock signal based on the designation information of the operating frequency to be changed out of the plural internal clock signal at good timing while being interlocked with the operation inside that module and changes the internal clock signal to be used inside the module.

97. 发明专利

JPH06323162A STEAM-COOLED GAS TURBINE POWER PLANT 失效
公开(公告)号：JPH06323162A
公开(公告)日：1994-11-22
申请号：JP11304793
申请日：1993-05-14
申请人： HITACHI LTD
发明人： ENDOU SHINYA , SUGITA NARIHISA , SEIKI NOBUHIRO , HOIZUMI SHINICHI , SASAKI TOSHIHIKO , NOGUCHI YOSHIKI , NAKAMURA SHOZO
IPC分类号： F01D25/12 , F01K17/04 , F01K23/10 , F02C7/16
摘要： PURPOSE:To provide a steam-cooled gas turbine power plant wherein the plant can be stably operated by properly cooling a gas turbine high temperature part by cooling steam. CONSTITUTION:In a steam-cooled gas turbine power plant using cooling steam as a cooling medium for cooling a gas turbine high temperature part 24, the plant is constituted by setting up a steam compressor 28 in a cooling steam supply pipe 107 for supplying the cooling steam to the gas turbine high temperature part 24 and a steam compressor 25 in a heat collection cooling steam discharge pipe 110 for feeding heat collection cooling steam after cooling the gas turbine high temperature part 24 to a steam turbine system.

98. 发明专利

JPH06264763A COMBINED PLANT SYSTEM 失效
公开(公告)号：JPH06264763A
公开(公告)日：1994-09-20
申请号：JP5036893
申请日：1993-03-11
申请人： HITACHI LTD
发明人： SUGITA NARIHISA , NAKAMURA SHOZO , SEIKI NOBUHIRO , HOIZUMI SHINICHI , SASAKI TOSHIHIKO , NOGUCHI YOSHIKI
IPC分类号： F01K23/10 , F02C6/00 , F02C7/06 , F02C7/16
摘要： PURPOSE:To efficiently cool a high temperature part of a gas turbine in starting a system, by laying piping for making supply of steam produced in an exhaust heat recovery boiler of one side combined plant on the high temperature part of the gas turbine in the other side combined plant. CONSTITUTION:A whole system comprises a gas turbine system and a plurality of combined plants. The gas turbine system performs combustion by using air compressed in a compressor 1 and fuel so as to drive a gas turbine 3 by obtained combustion gas. On the other hand, the combined plants comprise an exhaust heat recovery boiler 5 for exchanging heat of gas exhausted from the gas turbine 3 with intake water for generating steam and respective steam turbines 19-21 of which drive source is steam produced in the recovery boiler 5. In this case, piping 527 for supplying steam generated in the exhaust heat recovery boiler 5 of a second combined plant into a high temperature part 526 of the gas turbine in a first combined plant.

99. 发明专利

JPH06162225A SINGLE CHIP MICROCOMPUTER INCORPORATED WITH SELF-TEST FUNCTION 失效
公开(公告)号：JPH06162225A
公开(公告)日：1994-06-10
申请号：JP30674792
申请日：1992-11-17
申请人： HITACHI LTD
发明人： OSUGA HIROSHI , NOGUCHI YOSHIKI , KATO KANJI
IPC分类号： G06F11/22 , G06F13/00 , G06F15/78
摘要： PURPOSE:To automatically detect a fault of a built-in peripheral module by retaining a result obtained at the time when it is assumed that there is no fault at the time of test operation of the inside of the peripheral module, and comparing this expected value with the result of operation. CONSTITUTION:To a peripheral module 102, a test operation setting means 205, an expected value retaining means 206 and a comparing means 207 are added, and the expected value retaining means 206 retains a result obtained at the time when it is assumed that there is no fault at the time of test operation. In such a state, when the peripheral module 102 is in a test operation state, the test operation setting means 205 fetches a test operation set value sent from a CPU 100, a control means 201 generates a control signal of a data bus 200 based on this set value, and the data bus outputs the result of execution of a test. The comparing means 207 compares this result of execution and an expected value outputted from the expected value retaining means 206, and outputs a fault detecting signal to an interruption control circuit 103, in the case of noncoincidence. Accordingly, the fault of the peripheral module can be detected in the course of operation of a microcomputer.

100. 发明专利

JPH06149545A SEMICONDUCTOR INTEGRATED CIRCUIT PROVIDED WITH CPU AND MULTIPLIER 失效
公开(公告)号：JPH06149545A
公开(公告)日：1994-05-27
申请号：JP29677892
申请日：1992-11-06
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KISHI KAZUMASA , MASUMURA SHIGEKI , NAKAMURA HIDEO , NOGUCHI YOSHIKI , KAWASAKI SHUNPEI , AKAO YASUSHI
IPC分类号： G06F7/52 , G06F7/506 , G06F7/523 , G06F9/302 , G06F9/32 , G06F9/38 , G06F15/78
摘要： PURPOSE:To provide a semiconductor integrated circuit capable of facilitating design change matched with the target performance of a multiplier and directly transferring data between a memory and the multiplier. CONSTITUTION:This circuit is provided with a CPU 1, buses 5 and 4, the memory 3 accessed by the CPU 1, the multiplier 2 and a command signal line 6 for transferring the command of a multiplication instruction relating to read data from the CPU 1 to the multiplier 2 while reading the memory 3 from the CPU 1 through the bus 4. Since the CPU 1 and the multiplier 2 are different module constitution, the CPU 1 is not related to the performance change of the multiplier 2 and design change layout is facilitated. Since the command of the multiplication instruction relating to the read data is transferred from the CPU 1 to the multiplier 2 while reading the memory 3 from the CPU 1, the data can be directly transferred between the memory 3 and the multiplier 2.

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