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    • 2. 发明公开
    • CHARGE SAMPLING FILTER CIRCUIT AND CHARGE SAMPLING METHOD
    • LADUNGSSAMPLING-FILTERSCHALTUNG UND LADUNGSSAMPLING-VERFAHREN
    • EP2066028A1
    • 2009-06-03
    • EP07806839.2
    • 2007-09-06
    • Sony Corporation
    • YOSHIZAWA, AtsushiIIDA, Sachio
    • H03H15/00H03H19/00
    • H03H19/004H03H15/023
    • (Problem) To provide a charge sampling filter circuit and a charge sampling method.
      (Means for resolution) A charge sampling filter circuit includes a first capacitor that samples an input signal, and in which at least a portion of electric charge stored in the first capacitor by sampling is output to a second capacitor that is connectable with the first capacitor. The charge sampling filter circuit is characterized by including a switching portion that switches a circuit mode including a sampling mode that causes the first capacitor to sample the input signal, and an output mode that causes the first capacitor and the second capacitor to be connected. A capacitance value of the first capacitor in the output mode is set to be lower than the capacitance value in the sampling mode.
    • (问题)提供电荷采样滤波电路和电荷采样方法。 (分辨装置)电荷采样滤波电路包括对输入信号进行采样的第一电容器,其中通过采样将存储在第一电容器中的电荷的至少一部分输出到可与第一电容器连接的第二电容器 。 电荷采样滤波器电路的特征在于包括切换部分,其切换包括使第一电容器对输入信号进行采样的采样模式的电路模式以及使第一电容器和第二电容器连接的输出模式。 输出模式中的第一电容器的电容值被设定为低于采样模式下的电容值。
    • 8. 发明授权
    • Stufenweise einstellbare Kettenleiteranordnung
    • 系列网络布置可在阶段调整
    • EP0220403B1
    • 1990-10-31
    • EP86111164.9
    • 1986-08-12
    • SIEMENS AKTIENGESELLSCHAFT
    • Langer, Erik Prof.Dr.
    • H03H15/00H03G1/00H03F3/60
    • H03H15/00H03F3/607H03G1/0029H03G1/0088
    • 1. Series network arrangement adjustable in stages, consisting of delay sections (ZGm , ZDm , m vepsiln {1, ..., n+1}) and a number of controlled sources (T1 ... Tn ; VCCS), a signal input (E) and a signal output (A) in the manner of a distributed amplifier comprising a delay line in the output circuit, characterized in that a) the controlled sources (VCCS) can be individually optionally connected and disconnected, and in that b) dual-gate FETs (T1 ... Tn ) are used as controlled sources, the first gate (G1 ) of which is in each case connected via delay sections (ZGm ) to the input signal voltage and the second gate (G2 ) of which is in each case connected to suitable direct voltages for connecting or disconnecting the respective FETs.
    • 1.串联网络布置可分阶段进行,包括延迟段(ZGm,ZDm,m vepsiln {1,...,n + 1})和多个受控源(T1 ... Tn; VCCS),一个信号 输入(E)和信号输出(A),其包括在输出电路中包括延迟线的分布式放大器的方式,其特征在于:a)受控源(VCCS)可以单独地可选地连接和断开,并且在该b )双栅极FET(T1 ... Tn)用作受控源,其中的第一栅极(G1)在每种情况下通过延迟部分(ZGm)连接到输入信号电压和第二栅极(G2) 它们在每种情况下都连接到用于连接或断开各个FET的合适的直流电压。