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1. 发明公开

EP1993132A3 Leistungshalbleitersubstrat mit Metallkontaktschicht sowie Herstellungsverfahren hierzu 有权
标题翻译：与金属接触层及其制造方法的功率半导体衬底
公开(公告)号：EP1993132A3
公开(公告)日：2010-09-08
申请号：EP08008713.3
申请日：2008-05-09
申请人： SEMIKRON Elektronik GmbH & Co. KG
发明人： Göbl, Christian , Braml, Heiko, Dr.
IPC分类号： H01L23/373
CPC分类号： H01L21/4867 , C04B35/645 , C04B37/021 , C04B37/026 , C04B2237/124 , C04B2237/125 , C04B2237/343 , C04B2237/407 , C04B2237/408 , C04B2237/704 , C04B2237/706 , C04B2237/72 , H01L23/3735 , H01L23/49811 , H01L24/48 , H01L25/072 , H01L2224/05644 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/75317 , H01L2224/85444 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K1/0306 , H05K3/06 , H05K3/1283 , H05K3/247 , H05K2201/0133 , H05K2201/035 , H05K2203/0191 , H05K2203/0278 , H05K2203/1131 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： Die Erfindung beschreibt ein Leistungshalbleitersubstrat mit einem isolierenden flächigen Grundkörper, mindestens einer Leiterbahn und mindestens einer Kontaktfläche als Teil dieser Leiterbahn, wobei auf dieser Kontaktfläche eine Schicht eines Werkstoffs mittels einer Drucksinterverbindung dieses metallischen Werkstoffs angeordnet ist. Das zugehörige Verfahren weist die wesentlichen Schritten auf: Herstellung eines Leistungshalbleitersubstrats mit einem flächigen isolierenden Grundkörper, Leiterbahnen und Kontaktflächen; Anordnung einer pastösen Schicht, aus einem metallischen Werkstoffs und einem Lösungsmittel, auf mindestens einer Kontaktfläche des Leistungshalbleitersubstrats; Druckbeaufschlagung auf die pastöse Schicht.

2. 发明公开

EP1879254A4 PLANAR ANTENNA AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：平面天线及其制造方法
公开(公告)号：EP1879254A4
公开(公告)日：2010-01-27
申请号：EP06729610
申请日：2006-03-22
申请人： TORAY INDUSTRIES
发明人： ITOH KIYOHIKO , MORI KENTARO
IPC分类号： H01Q1/38 , G06K19/00 , H01Q7/00
CPC分类号： H01Q1/38 , G06K19/0775 , G06K19/07779 , G06K19/07783 , H01Q1/2225 , H01Q7/00 , H05K3/06 , H05K3/061 , H05K3/067 , H05K3/247 , H05K2201/035 , H05K2203/0793 , Y10T29/49016

3. 发明公开

EP2023697A1 WIRING BOARD 审中-公开
标题翻译：接线板
公开(公告)号：EP2023697A1
公开(公告)日：2009-02-11
申请号：EP07744278.8
申请日：2007-05-28
申请人： Fujikura, Ltd.
发明人： HIRATA, Shuzo , ONO, Akinobu
IPC分类号： H05K1/11
CPC分类号： H05K1/117 , H05K1/095 , H05K3/247 , H05K3/28 , H05K2201/035 , H05K2201/0769 , H05K2201/09436 , H05K2201/09709
摘要： A wiring substrate is provided with a substrate, a conductive circuit formed on a surface of the substrate, and an insulating layer which covers the conductive circuit. In a fitting portion of the wiring substrate, the insulating layer is formed with an opening portion through which a portion of the conductive circuit is exposed or displayed as an exposed surface. On the exposed surface of the conductive circuit, an electrode layer is formed which is made of a conductive member. A bottom surface of the electrode layer is connected to the conductive circuit. An upper surface of the electrode layer is extended in the widthwise direction W of wirings of the conductive circuit so as to cover even a part of the insulating layer.
摘要翻译：布线基板设置有基板，形成在基板的表面上的导电电路以及覆盖导电电路的绝缘层。在配线基板的配合部分中，绝缘层形成有开口部分，导电电路的一部分通过开口部分暴露或显示为暴露表面。在导电电路的暴露表面上，形成由导电构件制成的电极层。电极层的底表面连接到导电电路。电极层的上表面在导电电路的配线的宽度方向W上延伸，以便覆盖绝缘层的一部分。

4. 发明公开

EP1906442A3 Fabrication of a wiring pattern and of an active matrix substrate 审中-公开
公开(公告)号：EP1906442A3
公开(公告)日：2008-04-09
申请号：EP07075847.9
申请日：2004-05-10
申请人： Seiko Epson Corporation
发明人： Hirai, Toshimitsu
IPC分类号： H01L21/768 , H01L21/288 , G02F1/1362 , H05K3/12 , H01L21/77 , H01L29/786 , H01L51/00 , H01L27/32
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L21/288 , H01L21/76838 , H01L27/12 , H01L27/1292 , H01L27/3246 , H01L27/3295 , H01L29/78669 , H01L51/0005 , H01L51/0022 , H05K3/1241 , H05K3/125 , H05K3/1258 , H05K3/247 , H05K2203/013 , H05K2203/0568 , H05K2203/1173 , H05K2203/1476 , Y10T428/24802
摘要： A method for fabricating a wiring pattern (33) on a substrate (P) comprises the steps of: forming a first region (H1) corresponding to a formation region of the pattern, and a second region (H2) surrounding the first region, on the substrate; disposing a first function liquid (X1) on the first region; disposing a second function liquid (X2) on the first function liquid; and applying predetermined treatments to the first and the second function liquids which are disposed on the first region so as to form the pattern with plural materials stacked one on the other, wherein the second region has a liquid-repellency with respect to the first function liquid higher than that of the first region, the first and second function liquids include a conductive material.

5. 发明授权

EP1278405B1 CIRCUIT BOARD PRODUCING METHOD AND CIRCUIT BOARD PRODUCING DEVICE 有权
标题翻译：电路板的制造方法和电路板的制造工厂
公开(公告)号：EP1278405B1
公开(公告)日：2007-02-14
申请号：EP01270088.6
申请日：2001-12-04
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： TAKENAKA, Toshiaki , NISHII, Toshihiro , SUGITA, Yuichiro , NAKAMURA, Shinji , KOMODA, Hideaki , KONDO, Toshikazu
IPC分类号： H05K3/40
CPC分类号： H05K3/4069 , H05K1/095 , H05K3/1233 , H05K3/247 , H05K2201/035 , H05K2201/0355 , H05K2203/1461 , H05K2203/1476 , Y10T29/49155 , Y10T29/49165
摘要： A multi-layer circuit board producing method comprising a hole-forming step in which a sheet-like board material (1) is formed with through or non-through holes and a filling step in which the through or non-through holes (3) formed in the hole- forming step are filled with a paste (7) by use of a filling means, wherein in the filling step, the paste is supplemented with a second paste (11) for supplementary purposes by using a paste supplementing means, whereby the viscosity of the paste is stabilized to improve the fillability of paste into the through or non-through holes.

6. 发明授权

EP0818946B1 A printed-wiring board and a production method thereof 失效
标题翻译：印刷电路板和它们的制备方法
公开(公告)号：EP0818946B1
公开(公告)日：2003-06-25
申请号：EP97305014.9
申请日：1997-07-08
申请人： SHARP KABUSHIKI KAISHA
发明人： Matsuno, Yukio
IPC分类号： H05K3/46 , H05K3/40
CPC分类号： H05K1/113 , H05K1/095 , H05K3/0094 , H05K3/181 , H05K3/247 , H05K3/4007 , H05K3/429 , H05K3/4685 , H05K2201/035 , H05K2201/0367 , H05K2201/09436 , H05K2201/0959 , H05K2203/072

7. 发明授权

EP0538978B1 Method of forming an electrically conductive contact on a substrate 失效转让
标题翻译：一种制造导电接触过程
公开(公告)号：EP0538978B1
公开(公告)日：1997-03-19
申请号：EP92304346.7
申请日：1992-05-14
申请人： CIRCO CRAFT Co Inc
发明人： Langevin, Alain , Benoit, Auger , Casavant, Charles , Erat, Wolfgang
IPC分类号： H05K3/40
CPC分类号： H05K3/247 , H05K1/095 , H05K3/06 , H05K3/244 , H05K3/3452 , Y10T29/49126 , Y10T29/49155

8. 发明公开

EP0538978A2 Method of forming an electrically conductive contact on a substrate 失效转让
标题翻译： Verfahren zur Herstellung eines elektrisch leitenden Kontakts。
公开(公告)号：EP0538978A2
公开(公告)日：1993-04-28
申请号：EP92304346.7
申请日：1992-05-14
申请人： CIRCO CRAFT Co Inc
发明人： Langevin, Alain , Benoit, Auger , Casavant, Charles , Erat, Wolfgang
IPC分类号： H05K3/40
CPC分类号： H05K3/247 , H05K1/095 , H05K3/06 , H05K3/244 , H05K3/3452 , Y10T29/49126 , Y10T29/49155
摘要： A method of forming an electrically conductive contact on an insulated substrate such as for example a printed circuit board includes the step of defining a contact area on the substrate and applying a copper buss on the substrate so that it extends beyond the marginal edges of the contact area. A thin layer of soldermask is then applied to cover the upper surface of the copper buss outside of the contact area. Thereafter, a Thick Film Polymer (TFP) conductive paste is applied over the copper buss in the contact area defined on the substrate and over a small portion of the soldermask so that the copper buss is covered completely.
摘要翻译：在诸如印刷电路板的绝缘基板上形成导电触点的方法包括在衬底上限定接触区域并在衬底上施加铜母线以使其延伸超出接触边缘的步骤区。然后施加薄层的焊接掩模以覆盖接触区域外部的铜母线的上表面。此后，将厚膜聚合物（TFP）导电浆料施加在铜母线上的限定在基底上的接触区域中以及在焊接掩模的一小部分上，使得铜母线被完全覆盖。

9. 发明公开

EP0221924A1 FLEXIBLE ELECTRICAL JUMPER CABLE AND ASSEMBLY 失效
标题翻译：灵活的电缆桥架和装配。
公开(公告)号：EP0221924A1
公开(公告)日：1987-05-20
申请号：EP86902620.0
申请日：1986-03-31
申请人： AMP INCORPORATED (a New Jersey corporation)
发明人： DERY, Ronald, Allen , GENTRY, William, Gray , JONES, Warren, Charlie , MAY, Clifton, Carl, Jr. , WENTINK, Steven, George
IPC分类号： H01B7 , H01R4 , H01R11 , H01R12 , H05K3 , H05K1
CPC分类号： H05K3/323 , H01R4/04 , H05K1/0393 , H05K1/095 , H05K1/148 , H05K1/181 , H05K1/189 , H05K3/247 , H05K3/28 , H05K3/361 , H05K2201/035 , H05K2201/09436 , H05K2201/10136 , H05K2203/066
摘要： Assemblage de câbles plats flexibles destiné à former une connexion de faible épaisseur entre deux organes de circuit électrique, possédant chacun une rangée de tracés conducteurs faiblement écartés (18). Le câble (2) comprend une rangée de tracés (18), un film polymère isolant (20) recouvrant chaque côté de la rangée. Celle-ci est également exposée à chaque extrémité du câble cavalier, et la partie d'extrémité exposée est recouverte d'une couche d'un adhésif conducteur anisotrope (22). Le câble est conçu pour relier électriquement un panneau d'affichage plat (220) à une carte de circuit imprimé (222), le câble cavalier (210) formant la connexion entre les conducteurs (221) sur le panneau d'affichage et les conducteurs sur la carte de circuit imprimé. Est également décrit un assemblage de câbles cavaliers, comprenant des composants électriques (224) pouvant être montés en surface, qui sont connectés électriquement et fixés mécaniquement aux tracés (230) de l'assemblage de câbles cavaliers à l'aide d'un adhésif conducteur anisotrope (22). Est également décrit un assemblage de câbles conçu spécialement pour être utilisé comme dérivation.

10. 发明公开

EP3328169A1 METHOD FOR PROVIDING ELECTRICAL CONTINUITY IN A CIRCUIT AND ELECTRONICAL ASSEMBLY 审中-公开
公开(公告)号：EP3328169A1
公开(公告)日：2018-05-30
申请号：EP16382557.3
申请日：2016-11-24
申请人： VALEO ILUMINACION
发明人： TEBA, Daniel , GUZMAN, Alfonso-Manuel , MARTINEZ, Francisco
IPC分类号： H05K3/14 , H05K3/22 , H05K3/24
CPC分类号： H05K3/14 , H05K3/225 , H05K3/247 , H05K2203/1344 , H05K2203/1476 , H05K2203/173
摘要： The invention provides a method for providing electrical continuity in an electronic assembly (1), the method comprising the steps of providing a three-dimensional plastics substrate (2), directly depositing a conductive track (3) on the three-dimensional plastics substrate (2) and providing a conductive material (5). The conductive track (3) has a discontinuity (4) that keeps electric current from passing from a first end (41) of the discontinuity (4) to a second end (42) of the discontinuity (4). The conductive material (5) is provided in electric contact with both the first end (41) and the second end (42) of the discontinuity (4).

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