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    • 5. 发明公开
    • A charge-coupled device
    • 电荷耦合器件
    • EP0298573A1
    • 1989-01-11
    • EP88201442.6
    • 1988-07-08
    • Philips Electronics N.V.
    • Slob, Arie c/o Philips International B.V.
    • H01L27/10G11C19/28
    • G11C27/04H01L27/1057H01L29/42396H01L29/76816H01L29/76875
    • A charge-coupled device has a series register (A) having charge storage electrodes (3a) for defining charge storage wells and charge transfer electrodes (3b) for transporting charge between the charge storage wells and a parallel section (C) having channels (1a,1b) extending transversely of the series register (A). The parallel section (C) has charge storage electrodes (11a,12a,13a....Na) spaced apart along the channels, (1a,1b) to define a respective charge storage well with each channel to provide a respective row of charge storage wells extending transversely of the channels and has charge transfer electrodes (12b....Nb) for transferring charge between adjacent rows of charge storage wells, and a transfer gate (T1) for transferring charge between the series register (A) and an adjacent row of charge storage wells defined by the channels (1a,1b) and a first charge storage electrode (11a) of the parallel section. The first charge storage electrode (11a) of the parallel section (C) is shaped so that, at least over each channel (1a,1b), the first charge storage electrode (11a) is wider than succeeding charge storage electrodes (12a,...Na) of the parallel section (C).
    • 电荷耦合器件具有串联寄存器(A),其具有用于定义电荷存储阱的电荷存储电极(3a)和用于在电荷存储阱和具有沟道(1a)的平行部分(C)之间传输电荷的电荷传输电极(3b) ,1b)横向延伸到串联寄存器(A)。 平行部分(C)具有沿通道间隔开的电荷存储电极(11a,12a,13a ... Na),以限定各自的电荷存储阱,每个通道提供相应的电荷行 存储井,其横向延伸通道并且具有用于在相邻行电荷存储阱之间传输电荷的电荷传输电极(12b ... Nb);以及用于在串联寄存器(A)与电荷存储阱之间传输电荷的传输门(T1) 由通道(1a,1b)和平行部分的第一电荷存储电极(11a)限定的相邻的一排电荷存储阱。 平行部分(C)的第一电荷存储电极(11a)成形为使得至少在每个通道(1a,1b)上,第一电荷存储电极(11a)比后续的电荷存储电极(12a,...)宽。 ..Na)的平行部分(C)。
    • 9. 发明公开
    • Method of manufacturing a semiconductor device comprising two coplanar electrical conductors separated by a dielectric layer and semiconductor device obtained by suel a method
    • 一种用于通过一个介电层制造半导体装置,所述共面的两个过程包括分开的电导体,以及由该方法的半导体装置制造。
    • EP0652589A1
    • 1995-05-10
    • EP94203201.2
    • 1994-11-03
    • PHILIPS ELECTRONICS N.V.
    • Peek, Hermanus Leonardus
    • H01L21/28H01L29/423
    • H01L29/66954H01L29/42396
    • A method of manufacturing a semiconductor device whereby a surface of a semiconductor body 1 is covered with an electrically insulating layer 8 and at least two electrical conductors 20, 23 are provided on the insulating layer next to one another and mutually separated by an interposed dielectric layer 21. The conductor 20 is formed from a first conductive layer deposited on the insulating layer. The upper surface and at least the flank 25 of the conductor 20 facing the other conductor are covered with the dielectric layer 21. Then a second conductive layer 22 is deposited over the entire surface which exhibits a step corresponding to the flank 25 of the first conductor. Subsequently, a mask 24 is formed which defines the second conductor, after which the second conductor 23 is formed from the second conductive layer through etching. According to the invention, the mask 24 is so aligned relative to the first conductor 20 that the edge of the mask facing towards the flank 25 is situated above the dielectric layer on the flank of the first conductor. The layer 22 is etched isotropically, which etching is continued so long after the second conductive layer 22 has been entirely removed from above the first conductor that said step in the second conductive layer has been removed at least partly owing to underetching below the mask. The invention may advantageously be used for the manufacture of a charge coupled device in which the electrodes do not overlap one another.
    • 一种制造半导体器件,其中的半导体主体1的表面在电覆盖有绝缘层8和至少两个电导体20,提供彼此相邻且相互隔开的绝缘层23的方法,在具有介电层 21.导体20从沉积在绝缘层上的第一导电层形成。 的上表面和面向另一个导体的导体20的至少侧面25覆盖有电介质层21。然后形成第二导电层22被沉积在整个表面表现出一个步骤对应于所述第一导体的所述侧面25 , 随后,掩模24形成,其限定所述第二导体,afterwhich第二导体23从第二导电层通过蚀刻而形成。 。根据本发明,掩模24被这样对准相对于第一导体20没有朝向侧面25位于所述第一导体的所述侧面的电介质层的上方朝向所述掩模的边缘。 层22被各向同性地蚀刻,其中蚀刻继续进行第二导电层22后,只要从所述第一导体,所述至少部分地由于钻蚀掩模下面的步骤在所述第二导电层已被除去上述被完全移除。在 本发明可以有利地用于在其中电极不相互重叠的电荷耦合器件的制造。